diff options
| -rw-r--r-- | sim/mips/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/mips/mips.igen | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 4789ba9..3581d5e 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,5 +1,10 @@ 2002-02-27 Chris Demetriou <cgd@broadcom.com> + * mips.igen (PREFX): This is a 64-bit instruction, use '64' + as the filter flag. + +2002-02-27 Chris Demetriou <cgd@broadcom.com> + * mips.igen (PREFX): Tweak instruction opcode fields (i.e., add a comma) so that it more closely match the MIPS ISA documentation opcode partitioning. diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index d19ac97..76b45e9 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -3975,7 +3975,7 @@ } -010011,5.BASE,5.INDEX,5.HINT,00000,001111:COP1X:32::PREFX +010011,5.BASE,5.INDEX,5.HINT,00000,001111:COP1X:64::PREFX "prefx <HINT>, r<INDEX>(r<BASE>)" *mipsIV: *mipsV: |