diff options
| -rw-r--r-- | bfd/ChangeLog | 5 | ||||
| -rw-r--r-- | bfd/elf32-tic6x.c | 26 | ||||
| -rw-r--r-- | ld/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel-rela.d | 62 |
4 files changed, 97 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index c31a1eb..4c8d252 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,8 @@ +2010-09-23 Bernd Schmidt <bernds@codesourcery.com> + + * elf32-tic6x.c (elf32_tic6x_fake_sections): New function. + (elf_backend_fake_sections): Define. + 2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value. diff --git a/bfd/elf32-tic6x.c b/bfd/elf32-tic6x.c index 3815ff1..ed3d3d9 100644 --- a/bfd/elf32-tic6x.c +++ b/bfd/elf32-tic6x.c @@ -1348,6 +1348,31 @@ elf32_tic6x_set_use_rela_p (bfd *abfd, bfd_boolean use_rela_p) } static bfd_boolean +elf32_tic6x_fake_sections (bfd *abfd, + Elf_Internal_Shdr *hdr ATTRIBUTE_UNUSED, + asection *sec) +{ + /* The generic elf_fake_sections will set up REL_HDR using the + default kind of relocations. But, we may actually need both + kinds of relocations, so we set up the second header here. */ + if ((sec->flags & SEC_RELOC) != 0) + { + struct bfd_elf_section_data *esd; + bfd_size_type amt = sizeof (Elf_Internal_Shdr); + + esd = elf_section_data (sec); + BFD_ASSERT (esd->rel_hdr2 == NULL); + esd->rel_hdr2 = bfd_zalloc (abfd, amt); + if (!esd->rel_hdr2) + return FALSE; + _bfd_elf_init_reloc_shdr (abfd, esd->rel_hdr2, sec, + !sec->use_rela_p); + } + + return TRUE; +} + +static bfd_boolean elf32_tic6x_mkobject (bfd *abfd) { bfd_boolean ret; @@ -1765,6 +1790,7 @@ elf32_tic6x_merge_private_bfd_data (bfd *ibfd, bfd *obfd) #define elf_backend_default_use_rela_p 1 #define elf_backend_may_use_rel_p 1 #define elf_backend_may_use_rela_p 1 +#define elf_backend_fake_sections elf32_tic6x_fake_sections #define elf_backend_obj_attrs_arg_type elf32_tic6x_obj_attrs_arg_type #define elf_backend_obj_attrs_section "__TI_build_attributes" #define elf_backend_obj_attrs_section_type SHT_C6000_ATTRIBUTES diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 7b0256b..2e9a8f2 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2010-09-23 Bernd Schmidt <bernds@codesourcery.com> + + * ld-tic6x/pcrel-reloc-local-r-rel-rela.d: New test. + 2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * ld-arm/attr-merge-6.attr: Update for Security Extensions. diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel-rela.d b/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel-rela.d new file mode 100644 index 0000000..81cfc6c --- /dev/null +++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel-rela.d @@ -0,0 +1,62 @@ +#name: C6X PC-relative relocations, local symbols, -r, mixed link of REL/RELA +#as: -mlittle-endian +#ld: -r -melf32_tic6x_le +#source: pcrel-reloc-local-1.s -mgenerate-rel +#source: pcrel-reloc-local-2.s +#objdump: -dr + +.*: *file format elf32-tic6x-le + + +Disassembly of section \.text: + +0+ <[^>]*>: +[ \t]*0:[ \t]+00000000[ \t]+nop 1 +[ \t]*4:[ \t]+00800162[ \t]+addkpc \.S2 0 <[^>]*>,b1,0 +[ \t]*4: R_C6000_PCR_S7[ \t]+\.text\.1 +[ \t]*8:[ \t]+00810162[ \t]+addkpc \.S2 4 <[^>]*>,b1,0 +[ \t]*8: R_C6000_PCR_S7[ \t]+\.text\.1 +[ \t]*c:[ \t]+00000012[ \t]+b \.S2 0 <[^>]*> +[ \t]*c: R_C6000_PCR_S21[ \t]+\.text\.1 +[ \t]*10:[ \t]+00000092[ \t]+b \.S2 4 <[^>]*> +[ \t]*10: R_C6000_PCR_S21[ \t]+\.text\.1 +[ \t]*14:[ \t]+00801022[ \t]+bdec \.S2 0 <[^>]*>,b1 +[ \t]*14: R_C6000_PCR_S10[ \t]+\.text\.1 +[ \t]*18:[ \t]+00803022[ \t]+bdec \.S2 4 <[^>]*>,b1 +[ \t]*18: R_C6000_PCR_S10[ \t]+\.text\.1 +[ \t]*1c:[ \t]+00000122[ \t]+bnop \.S2 0 <[^>]*>,0 +[ \t]*1c: R_C6000_PCR_S12[ \t]+\.text\.1 +[ \t]*20:[ \t]+00010122[ \t]+bnop \.S2 24 <[^>]*>,0 +[ \t]*20: R_C6000_PCR_S12[ \t]+\.text\.1 +[ \t]*\.\.\. +[ \t]*44:[ \t]+00000122[ \t]+bnop \.S2 40 <[^>]*>,0 +[ \t]*44: R_C6000_PCR_S12[ \t]+\.text\.1\+0x20 +[ \t]*48:[ \t]+00000122[ \t]+bnop \.S2 40 <[^>]*>,0 +[ \t]*48: R_C6000_PCR_S12[ \t]+\.text\.1\+0x24 +[ \t]*4c:[ \t]+00801022[ \t]+bdec \.S2 40 <[^>]*>,b1 +[ \t]*4c: R_C6000_PCR_S10[ \t]+\.text\.1\+0x20 +[ \t]*50:[ \t]+00801022[ \t]+bdec \.S2 40 <[^>]*>,b1 +[ \t]*50: R_C6000_PCR_S10[ \t]+\.text\.1\+0x24 +[ \t]*54:[ \t]+00000012[ \t]+b \.S2 40 <[^>]*> +[ \t]*54: R_C6000_PCR_S21[ \t]+\.text\.1\+0x20 +[ \t]*58:[ \t]+00000012[ \t]+b \.S2 40 <[^>]*> +[ \t]*58: R_C6000_PCR_S21[ \t]+\.text\.1\+0x24 +[ \t]*5c:[ \t]+00800162[ \t]+addkpc \.S2 40 <[^>]*>,b1,0 +[ \t]*5c: R_C6000_PCR_S7[ \t]+\.text\.1\+0x20 +[ \t]*60:[ \t]+00800162[ \t]+addkpc \.S2 60 <[^>]*>,b1,0 +[ \t]*60: R_C6000_PCR_S7[ \t]+\.text\.1\+0x24 +[ \t]*\.\.\. + +Disassembly of section \.text\.1: + +0+ <[^>]*>: +[ \t]*0:[ \t]+00000000[ \t]+nop 1 + +0+4 <[^>]*>: +[ \t]*\.\.\. + +0+20 <[^>]*>: +[ \t]*20:[ \t]+00000000[ \t]+nop 1 + +0+24 <[^>]*>: +[ \t]*\.\.\. |