diff options
50 files changed, 74 insertions, 2992 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 353d2b1..6bcdd2b 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,18 @@ 2018-04-16 Alan Modra <amodra@gmail.com> + * Makefile.am: Remove h8300-coff support. + * coffcode.h: Likewise. + * config.bfd: Likewise. + * configure.ac: Likewise. + * reloc16.c: Likewise. + * targets.c: Likewise. + * coff-h8300.c: Delete. + * Makefile.in: Regenerate. + * configure: Regenerate. + * po/SRC-POTFILES.in: Regenerate. + +2018-04-16 Alan Modra <amodra@gmail.com> + * Makefile.am: Remove IEEE 695 support. * archures.c: Likewise. * bfd.c: Likewise. diff --git a/bfd/Makefile.am b/bfd/Makefile.am index afa9ad8..f1f7c74 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -281,7 +281,6 @@ BFD32_BACKENDS = \ coff-arm.lo \ coff-aux.lo \ coff-go32.lo \ - coff-h8300.lo \ coff-h8500.lo \ coff-i386.lo \ coff-m68k.lo \ @@ -465,7 +464,6 @@ BFD32_BACKENDS_CFILES = \ coff-arm.c \ coff-aux.c \ coff-go32.c \ - coff-h8300.c \ coff-h8500.c \ coff-i386.c \ coff-m68k.c \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 6311af4..af602fc 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -615,7 +615,6 @@ BFD32_BACKENDS = \ coff-arm.lo \ coff-aux.lo \ coff-go32.lo \ - coff-h8300.lo \ coff-h8500.lo \ coff-i386.lo \ coff-m68k.lo \ @@ -799,7 +798,6 @@ BFD32_BACKENDS_CFILES = \ coff-arm.c \ coff-aux.c \ coff-go32.c \ - coff-h8300.c \ coff-h8500.c \ coff-i386.c \ coff-m68k.c \ @@ -1314,7 +1312,6 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-aux.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-bfd.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-go32.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-h8300.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-h8500.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-i386.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m68k.Plo@am__quote@ diff --git a/bfd/coff-h8300.c b/bfd/coff-h8300.c deleted file mode 100644 index 3adcf5e..0000000 --- a/bfd/coff-h8300.c +++ /dev/null @@ -1,1387 +0,0 @@ -/* BFD back-end for Renesas H8/300 COFF binaries. - Copyright (C) 1990-2018 Free Software Foundation, Inc. - Written by Steve Chamberlain, <sac@cygnus.com>. - - This file is part of BFD, the Binary File Descriptor library. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, - MA 02110-1301, USA. */ - -#include "sysdep.h" -#include "bfd.h" -#include "libbfd.h" -#include "bfdlink.h" -#include "genlink.h" -#include "coff/h8300.h" -#include "coff/internal.h" -#include "libcoff.h" -#include "libiberty.h" - -#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1) - -/* We derive a hash table from the basic BFD hash table to - hold entries in the function vector. Aside from the - info stored by the basic hash table, we need the offset - of a particular entry within the hash table as well as - the offset where we'll add the next entry. */ - -struct funcvec_hash_entry - { - /* The basic hash table entry. */ - struct bfd_hash_entry root; - - /* The offset within the vectors section where - this entry lives. */ - bfd_vma offset; - }; - -struct funcvec_hash_table - { - /* The basic hash table. */ - struct bfd_hash_table root; - - bfd *abfd; - - /* Offset at which we'll add the next entry. */ - unsigned int offset; - }; - - -/* To lookup a value in the function vector hash table. */ -#define funcvec_hash_lookup(table, string, create, copy) \ - ((struct funcvec_hash_entry *) \ - bfd_hash_lookup (&(table)->root, (string), (create), (copy))) - -/* The derived h8300 COFF linker table. Note it's derived from - the generic linker hash table, not the COFF backend linker hash - table! We use this to attach additional data structures we - need while linking on the h8300. */ -struct h8300_coff_link_hash_table { - /* The main hash table. */ - struct generic_link_hash_table root; - - /* Section for the vectors table. This gets attached to a - random input bfd, we keep it here for easy access. */ - asection *vectors_sec; - - /* Hash table of the functions we need to enter into the function - vector. */ - struct funcvec_hash_table *funcvec_hash_table; -}; - -static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *); - -/* Get the H8/300 COFF linker hash table from a link_info structure. */ - -#define h8300_coff_hash_table(p) \ - ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p)))) - -/* Initialize fields within a funcvec hash table entry. Called whenever - a new entry is added to the funcvec hash table. */ - -static struct bfd_hash_entry * -funcvec_hash_newfunc (struct bfd_hash_entry *entry, - struct bfd_hash_table *gen_table, - const char *string) -{ - struct funcvec_hash_entry *ret; - struct funcvec_hash_table *table; - - ret = (struct funcvec_hash_entry *) entry; - table = (struct funcvec_hash_table *) gen_table; - - /* Allocate the structure if it has not already been allocated by a - subclass. */ - if (ret == NULL) - ret = ((struct funcvec_hash_entry *) - bfd_hash_allocate (gen_table, - sizeof (struct funcvec_hash_entry))); - if (ret == NULL) - return NULL; - - /* Call the allocation method of the superclass. */ - ret = ((struct funcvec_hash_entry *) - bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string)); - - if (ret == NULL) - return NULL; - - /* Note where this entry will reside in the function vector table. */ - ret->offset = table->offset; - - /* Bump the offset at which we store entries in the function - vector. We'd like to bump up the size of the vectors section, - but it's not easily available here. */ - switch (bfd_get_mach (table->abfd)) - { - case bfd_mach_h8300: - case bfd_mach_h8300hn: - case bfd_mach_h8300sn: - table->offset += 2; - break; - case bfd_mach_h8300h: - case bfd_mach_h8300s: - table->offset += 4; - break; - default: - return NULL; - } - - /* Everything went OK. */ - return (struct bfd_hash_entry *) ret; -} - -/* Initialize the function vector hash table. */ - -static bfd_boolean -funcvec_hash_table_init (struct funcvec_hash_table *table, - bfd *abfd, - struct bfd_hash_entry *(*newfunc) - (struct bfd_hash_entry *, - struct bfd_hash_table *, - const char *), - unsigned int entsize) -{ - /* Initialize our local fields, then call the generic initialization - routine. */ - table->offset = 0; - table->abfd = abfd; - return (bfd_hash_table_init (&table->root, newfunc, entsize)); -} - -/* Create the derived linker hash table. We use a derived hash table - basically to hold "static" information during an H8/300 coff link - without using static variables. */ - -static struct bfd_link_hash_table * -h8300_coff_link_hash_table_create (bfd *abfd) -{ - struct h8300_coff_link_hash_table *ret; - bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table); - - ret = (struct h8300_coff_link_hash_table *) bfd_zmalloc (amt); - if (ret == NULL) - return NULL; - if (!_bfd_link_hash_table_init (&ret->root.root, abfd, - _bfd_generic_link_hash_newfunc, - sizeof (struct generic_link_hash_entry))) - { - free (ret); - return NULL; - } - - return &ret->root.root; -} - -/* Special handling for H8/300 relocs. - We only come here for pcrel stuff and return normally if not an -r link. - When doing -r, we can't do any arithmetic for the pcrel stuff, because - the code in reloc.c assumes that we can manipulate the targets of - the pcrel branches. This isn't so, since the H8/300 can do relaxing, - which means that the gap after the instruction may not be enough to - contain the offset required for the branch, so we have to use only - the addend until the final link. */ - -static bfd_reloc_status_type -special (bfd * abfd ATTRIBUTE_UNUSED, - arelent * reloc_entry ATTRIBUTE_UNUSED, - asymbol * symbol ATTRIBUTE_UNUSED, - void * data ATTRIBUTE_UNUSED, - asection * input_section ATTRIBUTE_UNUSED, - bfd * output_bfd, - char ** error_message ATTRIBUTE_UNUSED) -{ - if (output_bfd == (bfd *) NULL) - return bfd_reloc_continue; - - /* Adjust the reloc address to that in the output section. */ - reloc_entry->address += input_section->output_offset; - return bfd_reloc_ok; -} - -static reloc_howto_type howto_table[] = -{ - HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE), - HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), - HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE), - HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE), - HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE), - HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE), - HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), - HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE), - HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE), - HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE), - HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE), - HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE), - HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE), - HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE), - - /* An indirect reference to a function. This causes the function's address - to be added to the function vector in lo-mem and puts the address of - the function vector's entry in the jsr instruction. */ - HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE), - - /* Internal reloc for relaxing. This is created when a 16-bit pc-relative - branch is turned into an 8-bit pc-relative branch. */ - HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE), - - HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE), - - HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE), - - HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE), - - HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE), -}; - -/* Turn a howto into a reloc number. */ - -#define SELECT_RELOC(x,howto) \ - { x.r_type = select_reloc (howto); } - -#define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \ - && H8300HNBADMAG(x) && H8300SNBADMAG(x)) -#define H8300 1 /* Customize coffcode.h */ -#define __A_MAGIC_SET__ - -/* Code to swap in the reloc. */ -#define SWAP_IN_RELOC_OFFSET H_GET_32 -#define SWAP_OUT_RELOC_OFFSET H_PUT_32 -#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ - dst->r_stuff[0] = 'S'; \ - dst->r_stuff[1] = 'C'; - -static int -select_reloc (reloc_howto_type *howto) -{ - return howto->type; -} - -/* Code to turn a r_type into a howto ptr, uses the above howto table. */ - -static void -rtype2howto (arelent *internal, struct internal_reloc *dst) -{ - switch (dst->r_type) - { - case R_RELBYTE: - internal->howto = howto_table + 0; - break; - case R_RELWORD: - internal->howto = howto_table + 1; - break; - case R_RELLONG: - internal->howto = howto_table + 2; - break; - case R_PCRBYTE: - internal->howto = howto_table + 3; - break; - case R_PCRWORD: - internal->howto = howto_table + 4; - break; - case R_PCRLONG: - internal->howto = howto_table + 5; - break; - case R_MOV16B1: - internal->howto = howto_table + 6; - break; - case R_MOV16B2: - internal->howto = howto_table + 7; - break; - case R_JMP1: - internal->howto = howto_table + 8; - break; - case R_JMP2: - internal->howto = howto_table + 9; - break; - case R_JMPL1: - internal->howto = howto_table + 10; - break; - case R_JMPL2: - internal->howto = howto_table + 11; - break; - case R_MOV24B1: - internal->howto = howto_table + 12; - break; - case R_MOV24B2: - internal->howto = howto_table + 13; - break; - case R_MEM_INDIRECT: - internal->howto = howto_table + 14; - break; - case R_PCRWORD_B: - internal->howto = howto_table + 15; - break; - case R_MOVL1: - internal->howto = howto_table + 16; - break; - case R_MOVL2: - internal->howto = howto_table + 17; - break; - case R_BCC_INV: - internal->howto = howto_table + 18; - break; - case R_JMP_DEL: - internal->howto = howto_table + 19; - break; - default: - internal->howto = NULL; - break; - } -} - -#define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry) - -/* Perform any necessary magic to the addend in a reloc entry. */ - -#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ - cache_ptr->addend = ext_reloc.r_offset; - -#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ - reloc_processing (relent, reloc, symbols, abfd, section) - -static void -reloc_processing (arelent *relent, struct internal_reloc *reloc, - asymbol **symbols, bfd *abfd, asection *section) -{ - relent->address = reloc->r_vaddr; - rtype2howto (relent, reloc); - - if (((int) reloc->r_symndx) > 0) - relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; - else - relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; - - relent->addend = reloc->r_offset; - relent->address -= section->vma; -} - -static bfd_boolean -h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address) -{ - asymbol **s; - - s = _bfd_generic_link_get_symbols (abfd); - BFD_ASSERT (s != (asymbol **) NULL); - - /* Search all the symbols for one in INPUT_SECTION with - address ADDRESS. */ - while (*s) - { - asymbol *p = *s; - - if (p->section == input_section - && (input_section->output_section->vma - + input_section->output_offset - + p->value) == address) - return TRUE; - s++; - } - return FALSE; -} - -/* If RELOC represents a relaxable instruction/reloc, change it into - the relaxed reloc, notify the linker that symbol addresses - have changed (bfd_perform_slip) and return how much the current - section has shrunk by. - - FIXME: Much of this code has knowledge of the ordering of entries - in the howto table. This needs to be fixed. */ - -static int -h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc, - unsigned int shrink, struct bfd_link_info *link_info) -{ - bfd_vma value; - bfd_vma dot; - bfd_vma gap; - static asection *last_input_section = NULL; - static arelent *last_reloc = NULL; - - /* The address of the thing to be relocated will have moved back by - the size of the shrink - but we don't change reloc->address here, - since we need it to know where the relocation lives in the source - uncooked section. */ - bfd_vma address = reloc->address - shrink; - - if (input_section != last_input_section) - last_reloc = NULL; - - /* Only examine the relocs which might be relaxable. */ - switch (reloc->howto->type) - { - /* This is the 16-/24-bit absolute branch which could become an - 8-bit pc-relative branch. */ - case R_JMP1: - case R_JMPL1: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* Get the address of the next instruction (not the reloc). */ - dot = (input_section->output_section->vma - + input_section->output_offset + address); - - /* Adjust for R_JMP1 vs R_JMPL1. */ - dot += (reloc->howto->type == R_JMP1 ? 1 : 2); - - /* Compute the distance from this insn to the branch target. */ - gap = value - dot; - - /* If the distance is within -128..+128 inclusive, then we can relax - this jump. +128 is valid since the target will move two bytes - closer if we do relax this branch. */ - if ((int) gap >= -128 && (int) gap <= 128) - { - bfd_byte code; - - if (!bfd_get_section_contents (abfd, input_section, & code, - reloc->address, 1)) - break; - code = bfd_get_8 (abfd, & code); - - /* It's possible we may be able to eliminate this branch entirely; - if the previous instruction is a branch around this instruction, - and there's no label at this instruction, then we can reverse - the condition on the previous branch and eliminate this jump. - - original: new: - bCC lab1 bCC' lab2 - jmp lab2 - lab1: lab1: - - This saves 4 bytes instead of two, and should be relatively - common. - - Only perform this optimisation for jumps (code 0x5a) not - subroutine calls, as otherwise it could transform: - - mov.w r0,r0 - beq .L1 - jsr @_bar - .L1: rts - _bar: rts - into: - mov.w r0,r0 - bne _bar - rts - _bar: rts - - which changes the call (jsr) into a branch (bne). */ - if (code == 0x5a - && gap <= 126 - && last_reloc - && last_reloc->howto->type == R_PCRBYTE) - { - bfd_vma last_value; - last_value = bfd_coff_reloc16_get_value (last_reloc, link_info, - input_section) + 1; - - if (last_value == dot + 2 - && last_reloc->address + 1 == reloc->address - && !h8300_symbol_address_p (abfd, input_section, dot - 2)) - { - reloc->howto = howto_table + 19; - last_reloc->howto = howto_table + 18; - last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr; - last_reloc->addend = reloc->addend; - shrink += 4; - bfd_perform_slip (abfd, 4, input_section, address); - break; - } - } - - /* Change the reloc type. */ - reloc->howto = reloc->howto + 1; - - /* This shrinks this section by two bytes. */ - shrink += 2; - bfd_perform_slip (abfd, 2, input_section, address); - } - break; - - /* This is the 16-bit pc-relative branch which could become an 8-bit - pc-relative branch. */ - case R_PCRWORD: - /* Get the address of the target of this branch, add one to the value - because the addend field in PCrel jumps is off by -1. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1; - - /* Get the address of the next instruction if we were to relax. */ - dot = input_section->output_section->vma + - input_section->output_offset + address; - - /* Compute the distance from this insn to the branch target. */ - gap = value - dot; - - /* If the distance is within -128..+128 inclusive, then we can relax - this jump. +128 is valid since the target will move two bytes - closer if we do relax this branch. */ - if ((int) gap >= -128 && (int) gap <= 128) - { - /* Change the reloc type. */ - reloc->howto = howto_table + 15; - - /* This shrinks this section by two bytes. */ - shrink += 2; - bfd_perform_slip (abfd, 2, input_section, address); - } - break; - - /* This is a 16-bit absolute address in a mov.b insn, which can - become an 8-bit absolute address if it's in the right range. */ - case R_MOV16B1: - /* Get the address of the data referenced by this mov.b insn. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - value = bfd_h8300_pad_address (abfd, value); - - /* If the address is in the top 256 bytes of the address space - then we can relax this instruction. */ - if (value >= 0xffffff00u) - { - /* Change the reloc type. */ - reloc->howto = reloc->howto + 1; - - /* This shrinks this section by two bytes. */ - shrink += 2; - bfd_perform_slip (abfd, 2, input_section, address); - } - break; - - /* Similarly for a 24-bit absolute address in a mov.b. Note that - if we can't relax this into an 8-bit absolute, we'll fall through - and try to relax it into a 16-bit absolute. */ - case R_MOV24B1: - /* Get the address of the data referenced by this mov.b insn. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - value = bfd_h8300_pad_address (abfd, value); - - if (value >= 0xffffff00u) - { - /* Change the reloc type. */ - reloc->howto = reloc->howto + 1; - - /* This shrinks this section by four bytes. */ - shrink += 4; - bfd_perform_slip (abfd, 4, input_section, address); - - /* Done with this reloc. */ - break; - } - /* Fall through. */ - - /* This is a 24-/32-bit absolute address in a mov insn, which can - become an 16-bit absolute address if it's in the right range. */ - case R_MOVL1: - /* Get the address of the data referenced by this mov insn. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - value = bfd_h8300_pad_address (abfd, value); - - /* If the address is a sign-extended 16-bit value then we can - relax this instruction. */ - if (value <= 0x7fff || value >= 0xffff8000u) - { - /* Change the reloc type. */ - reloc->howto = howto_table + 17; - - /* This shrinks this section by two bytes. */ - shrink += 2; - bfd_perform_slip (abfd, 2, input_section, address); - } - break; - - /* No other reloc types represent relaxing opportunities. */ - default: - break; - } - - last_reloc = reloc; - last_input_section = input_section; - return shrink; -} - -/* Handle relocations for the H8/300, including relocs for relaxed - instructions. - - FIXME: Not all relocations check for overflow! */ - -static void -h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, - struct bfd_link_order *link_order, arelent *reloc, - bfd_byte *data, unsigned int *src_ptr, - unsigned int *dst_ptr) -{ - unsigned int src_address = *src_ptr; - unsigned int dst_address = *dst_ptr; - asection *input_section = link_order->u.indirect.section; - bfd_vma value; - bfd_vma dot; - int gap, tmp; - unsigned char temp_code; - - switch (reloc->howto->type) - { - /* Generic 8-bit pc-relative relocation. */ - case R_PCRBYTE: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - dot = (input_section->output_offset - + dst_address - + link_order->u.indirect.section->output_section->vma); - - gap = value - dot; - - /* Sanity check. */ - if (gap < -128 || gap > 126) - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - - /* Everything looks OK. Apply the relocation and update the - src/dst address appropriately. */ - bfd_put_8 (abfd, gap, data + dst_address); - dst_address++; - src_address++; - - /* All done. */ - break; - - /* Generic 16-bit pc-relative relocation. */ - case R_PCRWORD: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* Get the address of the instruction (not the reloc). */ - dot = (input_section->output_offset - + dst_address - + link_order->u.indirect.section->output_section->vma + 1); - - gap = value - dot; - - /* Sanity check. */ - if (gap > 32766 || gap < -32768) - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - - /* Everything looks OK. Apply the relocation and update the - src/dst address appropriately. */ - bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address); - dst_address += 2; - src_address += 2; - - /* All done. */ - break; - - /* Generic 8-bit absolute relocation. */ - case R_RELBYTE: - /* Get the address of the object referenced by this insn. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - bfd_put_8 (abfd, value & 0xff, data + dst_address); - dst_address += 1; - src_address += 1; - - /* All done. */ - break; - - /* Various simple 16-bit absolute relocations. */ - case R_MOV16B1: - case R_JMP1: - case R_RELWORD: - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - bfd_put_16 (abfd, value, data + dst_address); - dst_address += 2; - src_address += 2; - break; - - /* Various simple 24-/32-bit absolute relocations. */ - case R_MOV24B1: - case R_MOVL1: - case R_RELLONG: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - bfd_put_32 (abfd, value, data + dst_address); - dst_address += 4; - src_address += 4; - break; - - /* Another 24-/32-bit absolute relocation. */ - case R_JMPL1: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - value = ((value & 0x00ffffff) - | (bfd_get_32 (abfd, data + src_address) & 0xff000000)); - bfd_put_32 (abfd, value, data + dst_address); - dst_address += 4; - src_address += 4; - break; - - /* This is a 24-/32-bit absolute address in one of the following - instructions: - - "band", "bclr", "biand", "bild", "bior", "bist", "bixor", - "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w", - "stc.w" and "mov.[bwl]" - - We may relax this into an 16-bit absolute address if it's in - the right range. */ - case R_MOVL2: - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - value = bfd_h8300_pad_address (abfd, value); - - /* Sanity check. */ - if (value <= 0x7fff || value >= 0xffff8000u) - { - /* Insert the 16-bit value into the proper location. */ - bfd_put_16 (abfd, value, data + dst_address); - - /* Fix the opcode. For all the instructions that belong to - this relaxation, we simply need to turn off bit 0x20 in - the previous byte. */ - data[dst_address - 1] &= ~0x20; - dst_address += 2; - src_address += 4; - } - else - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - break; - - /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */ - case R_JMP2: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* Get the address of the next instruction. */ - dot = (input_section->output_offset - + dst_address - + link_order->u.indirect.section->output_section->vma + 1); - - gap = value - dot; - - /* Sanity check. */ - if (gap < -128 || gap > 126) - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - - /* Now fix the instruction itself. */ - switch (data[dst_address - 1]) - { - case 0x5e: - /* jsr -> bsr */ - bfd_put_8 (abfd, 0x55, data + dst_address - 1); - break; - case 0x5a: - /* jmp -> bra */ - bfd_put_8 (abfd, 0x40, data + dst_address - 1); - break; - - default: - abort (); - } - - /* Write out the 8-bit value. */ - bfd_put_8 (abfd, gap, data + dst_address); - - dst_address += 1; - src_address += 3; - - break; - - /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */ - case R_PCRWORD_B: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* Get the address of the instruction (not the reloc). */ - dot = (input_section->output_offset - + dst_address - + link_order->u.indirect.section->output_section->vma - 1); - - gap = value - dot; - - /* Sanity check. */ - if (gap < -128 || gap > 126) - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - - /* Now fix the instruction. */ - switch (data[dst_address - 2]) - { - case 0x58: - /* bCC:16 -> bCC:8 */ - /* Get the second byte of the original insn, which contains - the condition code. */ - tmp = data[dst_address - 1]; - - /* Compute the fisrt byte of the relaxed instruction. The - original sequence 0x58 0xX0 is relaxed to 0x4X, where X - represents the condition code. */ - tmp &= 0xf0; - tmp >>= 4; - tmp |= 0x40; - - /* Write it. */ - bfd_put_8 (abfd, tmp, data + dst_address - 2); - break; - - case 0x5c: - /* bsr:16 -> bsr:8 */ - bfd_put_8 (abfd, 0x55, data + dst_address - 2); - break; - - default: - abort (); - } - - /* Output the target. */ - bfd_put_8 (abfd, gap, data + dst_address - 1); - - /* We don't advance dst_address -- the 8-bit reloc is applied at - dst_address - 1, so the next insn should begin at dst_address. */ - src_address += 2; - - break; - - /* Similarly for a 24-bit absolute that is now 8 bits. */ - case R_JMPL2: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* Get the address of the instruction (not the reloc). */ - dot = (input_section->output_offset - + dst_address - + link_order->u.indirect.section->output_section->vma + 2); - - gap = value - dot; - - /* Fix the instruction. */ - switch (data[src_address]) - { - case 0x5e: - /* jsr -> bsr */ - bfd_put_8 (abfd, 0x55, data + dst_address); - break; - case 0x5a: - /* jmp ->bra */ - bfd_put_8 (abfd, 0x40, data + dst_address); - break; - default: - abort (); - } - - bfd_put_8 (abfd, gap, data + dst_address + 1); - dst_address += 2; - src_address += 4; - - break; - - /* This is a 16-bit absolute address in one of the following - instructions: - - "band", "bclr", "biand", "bild", "bior", "bist", "bixor", - "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and - "mov.b" - - We may relax this into an 8-bit absolute address if it's in - the right range. */ - case R_MOV16B2: - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* All instructions with R_H8_DIR16B2 start with 0x6a. */ - if (data[dst_address - 2] != 0x6a) - abort (); - - temp_code = data[src_address - 1]; - - /* If this is a mov.b instruction, clear the lower nibble, which - contains the source/destination register number. */ - if ((temp_code & 0x10) != 0x10) - temp_code &= 0xf0; - - /* Fix up the opcode. */ - switch (temp_code) - { - case 0x00: - /* This is mov.b @aa:16,Rd. */ - data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; - break; - case 0x80: - /* This is mov.b Rs,@aa:16. */ - data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; - break; - case 0x18: - /* This is a bit-maniputation instruction that stores one - bit into memory, one of "bclr", "bist", "bnot", "bset", - and "bst". */ - data[dst_address - 2] = 0x7f; - break; - case 0x10: - /* This is a bit-maniputation instruction that loads one bit - from memory, one of "band", "biand", "bild", "bior", - "bixor", "bld", "bor", "btst", and "bxor". */ - data[dst_address - 2] = 0x7e; - break; - default: - abort (); - } - - bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); - src_address += 2; - break; - - /* This is a 24-bit absolute address in one of the following - instructions: - - "band", "bclr", "biand", "bild", "bior", "bist", "bixor", - "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and - "mov.b" - - We may relax this into an 8-bit absolute address if it's in - the right range. */ - case R_MOV24B2: - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - /* All instructions with R_MOV24B2 start with 0x6a. */ - if (data[dst_address - 2] != 0x6a) - abort (); - - temp_code = data[src_address - 1]; - - /* If this is a mov.b instruction, clear the lower nibble, which - contains the source/destination register number. */ - if ((temp_code & 0x30) != 0x30) - temp_code &= 0xf0; - - /* Fix up the opcode. */ - switch (temp_code) - { - case 0x20: - /* This is mov.b @aa:24/32,Rd. */ - data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; - break; - case 0xa0: - /* This is mov.b Rs,@aa:24/32. */ - data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; - break; - case 0x38: - /* This is a bit-maniputation instruction that stores one - bit into memory, one of "bclr", "bist", "bnot", "bset", - and "bst". */ - data[dst_address - 2] = 0x7f; - break; - case 0x30: - /* This is a bit-maniputation instruction that loads one bit - from memory, one of "band", "biand", "bild", "bior", - "bixor", "bld", "bor", "btst", and "bxor". */ - data[dst_address - 2] = 0x7e; - break; - default: - abort (); - } - - bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); - src_address += 4; - break; - - case R_BCC_INV: - /* Get the address of the target of this branch. */ - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - - dot = (input_section->output_offset - + dst_address - + link_order->u.indirect.section->output_section->vma) + 1; - - gap = value - dot; - - /* Sanity check. */ - if (gap < -128 || gap > 126) - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - - /* Everything looks OK. Fix the condition in the instruction, apply - the relocation, and update the src/dst address appropriately. */ - - bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1, - data + dst_address - 1); - bfd_put_8 (abfd, gap, data + dst_address); - dst_address++; - src_address++; - - /* All done. */ - break; - - case R_JMP_DEL: - src_address += 4; - break; - - /* An 8-bit memory indirect instruction (jmp/jsr). - - There's several things that need to be done to handle - this relocation. - - If this is a reloc against the absolute symbol, then - we should handle it just R_RELBYTE. Likewise if it's - for a symbol with a value ge 0 and le 0xff. - - Otherwise it's a jump/call through the function vector, - and the linker is expected to set up the function vector - and put the right value into the jump/call instruction. */ - case R_MEM_INDIRECT: - { - /* We need to find the symbol so we can determine it's - address in the function vector table. */ - asymbol *symbol; - const char *name; - struct funcvec_hash_table *ftab; - struct funcvec_hash_entry *h; - struct h8300_coff_link_hash_table *htab; - asection *vectors_sec; - - if (link_info->output_bfd->xvec != abfd->xvec) - { - _bfd_error_handler - (_("cannot handle R_MEM_INDIRECT reloc when using %s output"), - link_info->output_bfd->xvec->name); - - /* What else can we do? This function doesn't allow return - of an error, and we don't want to call abort as that - indicates an internal error. */ -#ifndef EXIT_FAILURE -#define EXIT_FAILURE 1 -#endif - xexit (EXIT_FAILURE); - } - htab = h8300_coff_hash_table (link_info); - vectors_sec = htab->vectors_sec; - - /* First see if this is a reloc against the absolute symbol - or against a symbol with a nonnegative value <= 0xff. */ - symbol = *(reloc->sym_ptr_ptr); - value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - if (symbol == bfd_abs_section_ptr->symbol - || value <= 0xff) - { - /* This should be handled in a manner very similar to - R_RELBYTES. If the value is in range, then just slam - the value into the right location. Else trigger a - reloc overflow callback. */ - if (value <= 0xff) - { - bfd_put_8 (abfd, value, data + dst_address); - dst_address += 1; - src_address += 1; - } - else - (*link_info->callbacks->reloc_overflow) - (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), - reloc->howto->name, reloc->addend, input_section->owner, - input_section, reloc->address); - break; - } - - /* This is a jump/call through a function vector, and we're - expected to create the function vector ourselves. - - First look up this symbol in the linker hash table -- we need - the derived linker symbol which holds this symbol's index - in the function vector. */ - name = symbol->name; - if (symbol->flags & BSF_LOCAL) - { - char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); - - if (new_name == NULL) - abort (); - - sprintf (new_name, "%s_%08x", name, symbol->section->id); - name = new_name; - } - - ftab = htab->funcvec_hash_table; - h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); - - /* This shouldn't ever happen. If it does that means we've got - data corruption of some kind. Aborting seems like a reasonable - thing to do here. */ - if (h == NULL || vectors_sec == NULL) - abort (); - - /* Place the address of the function vector entry into the - reloc's address. */ - bfd_put_8 (abfd, - vectors_sec->output_offset + h->offset, - data + dst_address); - - dst_address++; - src_address++; - - /* Now create an entry in the function vector itself. */ - switch (bfd_get_mach (input_section->owner)) - { - case bfd_mach_h8300: - case bfd_mach_h8300hn: - case bfd_mach_h8300sn: - bfd_put_16 (abfd, - bfd_coff_reloc16_get_value (reloc, - link_info, - input_section), - vectors_sec->contents + h->offset); - break; - case bfd_mach_h8300h: - case bfd_mach_h8300s: - bfd_put_32 (abfd, - bfd_coff_reloc16_get_value (reloc, - link_info, - input_section), - vectors_sec->contents + h->offset); - break; - default: - abort (); - } - - /* Gross. We've already written the contents of the vector section - before we get here... So we write it again with the new data. */ - bfd_set_section_contents (vectors_sec->output_section->owner, - vectors_sec->output_section, - vectors_sec->contents, - (file_ptr) vectors_sec->output_offset, - vectors_sec->size); - break; - } - - default: - abort (); - break; - - } - - *src_ptr = src_address; - *dst_ptr = dst_address; -} - -/* Routine for the h8300 linker. - - This routine is necessary to handle the special R_MEM_INDIRECT - relocs on the h8300. It's responsible for generating a vectors - section and attaching it to an input bfd as well as sizing - the vectors section. It also creates our vectors hash table. - - It uses the generic linker routines to actually add the symbols. - from this BFD to the bfd linker hash table. It may add a few - selected static symbols to the bfd linker hash table. */ - -static bfd_boolean -h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info) -{ - asection *sec; - struct funcvec_hash_table *funcvec_hash_table; - bfd_size_type amt; - struct h8300_coff_link_hash_table *htab; - - /* Add the symbols using the generic code. */ - _bfd_generic_link_add_symbols (abfd, info); - - if (info->output_bfd->xvec != abfd->xvec) - return TRUE; - - htab = h8300_coff_hash_table (info); - - /* If we haven't created a vectors section, do so now. */ - if (!htab->vectors_sec) - { - flagword flags; - - /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */ - flags = (SEC_ALLOC | SEC_LOAD - | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY); - htab->vectors_sec = bfd_make_section_with_flags (abfd, ".vectors", - flags); - - /* If the section wasn't created, or we couldn't set the flags, - quit quickly now, rather than dying a painful death later. */ - if (!htab->vectors_sec) - return FALSE; - - /* Also create the vector hash table. */ - amt = sizeof (struct funcvec_hash_table); - funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt); - - if (!funcvec_hash_table) - return FALSE; - - /* And initialize the funcvec hash table. */ - if (!funcvec_hash_table_init (funcvec_hash_table, abfd, - funcvec_hash_newfunc, - sizeof (struct funcvec_hash_entry))) - { - bfd_release (abfd, funcvec_hash_table); - return FALSE; - } - - /* Store away a pointer to the funcvec hash table. */ - htab->funcvec_hash_table = funcvec_hash_table; - } - - /* Load up the function vector hash table. */ - funcvec_hash_table = htab->funcvec_hash_table; - - /* Now scan the relocs for all the sections in this bfd; create - additional space in the .vectors section as needed. */ - for (sec = abfd->sections; sec; sec = sec->next) - { - long reloc_size, reloc_count, i; - asymbol **symbols; - arelent **relocs; - - /* Suck in the relocs, symbols & canonicalize them. */ - reloc_size = bfd_get_reloc_upper_bound (abfd, sec); - if (reloc_size <= 0) - continue; - - relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size); - if (!relocs) - return FALSE; - - /* The symbols should have been read in by _bfd_generic link_add_symbols - call abovec, so we can cheat and use the pointer to them that was - saved in the above call. */ - symbols = _bfd_generic_link_get_symbols(abfd); - reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols); - if (reloc_count <= 0) - { - free (relocs); - continue; - } - - /* Now walk through all the relocations in this section. */ - for (i = 0; i < reloc_count; i++) - { - arelent *reloc = relocs[i]; - asymbol *symbol = *(reloc->sym_ptr_ptr); - const char *name; - - /* We've got an indirect reloc. See if we need to add it - to the function vector table. At this point, we have - to add a new entry for each unique symbol referenced - by an R_MEM_INDIRECT relocation except for a reloc - against the absolute section symbol. */ - if (reloc->howto->type == R_MEM_INDIRECT - && symbol != bfd_abs_section_ptr->symbol) - - { - struct funcvec_hash_table *ftab; - struct funcvec_hash_entry *h; - - name = symbol->name; - if (symbol->flags & BSF_LOCAL) - { - char *new_name; - - new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); - if (new_name == NULL) - abort (); - - sprintf (new_name, "%s_%08x", name, symbol->section->id); - name = new_name; - } - - /* Look this symbol up in the function vector hash table. */ - ftab = htab->funcvec_hash_table; - h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); - - /* If this symbol isn't already in the hash table, add - it and bump up the size of the hash table. */ - if (h == NULL) - { - h = funcvec_hash_lookup (ftab, name, TRUE, TRUE); - if (h == NULL) - { - free (relocs); - return FALSE; - } - - /* Bump the size of the vectors section. Each vector - takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ - switch (bfd_get_mach (abfd)) - { - case bfd_mach_h8300: - case bfd_mach_h8300hn: - case bfd_mach_h8300sn: - htab->vectors_sec->size += 2; - break; - case bfd_mach_h8300h: - case bfd_mach_h8300s: - htab->vectors_sec->size += 4; - break; - default: - abort (); - } - } - } - } - - /* We're done with the relocations, release them. */ - free (relocs); - } - - /* Now actually allocate some space for the function vector. It's - wasteful to do this more than once, but this is easier. */ - sec = htab->vectors_sec; - if (sec->size != 0) - { - /* Free the old contents. */ - if (sec->contents) - free (sec->contents); - - /* Allocate new contents. */ - sec->contents = bfd_malloc (sec->size); - } - - return TRUE; -} - -#define coff_reloc16_extra_cases h8300_reloc16_extra_cases -#define coff_reloc16_estimate h8300_reloc16_estimate -#define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols -#define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create - -#define COFF_LONG_FILENAMES - -#ifndef bfd_pe_print_pdata -#define bfd_pe_print_pdata NULL -#endif - -#include "coffcode.h" - -#undef coff_bfd_get_relocated_section_contents -#undef coff_bfd_relax_section -#define coff_bfd_get_relocated_section_contents \ - bfd_coff_reloc16_get_relocated_section_contents -#define coff_bfd_relax_section bfd_coff_reloc16_relax_section - -CREATE_BIG_COFF_TARGET_VEC (h8300_coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) diff --git a/bfd/coffcode.h b/bfd/coffcode.h index 4a0741a1..9c66e4b 100644 --- a/bfd/coffcode.h +++ b/bfd/coffcode.h @@ -2285,51 +2285,6 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr) break; #endif -#ifdef H8300MAGIC - case H8300MAGIC: - arch = bfd_arch_h8300; - machine = bfd_mach_h8300; - /* !! FIXME this probably isn't the right place for this. */ - abfd->flags |= BFD_IS_RELAXABLE; - break; -#endif - -#ifdef H8300HMAGIC - case H8300HMAGIC: - arch = bfd_arch_h8300; - machine = bfd_mach_h8300h; - /* !! FIXME this probably isn't the right place for this. */ - abfd->flags |= BFD_IS_RELAXABLE; - break; -#endif - -#ifdef H8300SMAGIC - case H8300SMAGIC: - arch = bfd_arch_h8300; - machine = bfd_mach_h8300s; - /* !! FIXME this probably isn't the right place for this. */ - abfd->flags |= BFD_IS_RELAXABLE; - break; -#endif - -#ifdef H8300HNMAGIC - case H8300HNMAGIC: - arch = bfd_arch_h8300; - machine = bfd_mach_h8300hn; - /* !! FIXME this probably isn't the right place for this. */ - abfd->flags |= BFD_IS_RELAXABLE; - break; -#endif - -#ifdef H8300SNMAGIC - case H8300SNMAGIC: - arch = bfd_arch_h8300; - machine = bfd_mach_h8300sn; - /* !! FIXME this probably isn't the right place for this. */ - abfd->flags |= BFD_IS_RELAXABLE; - break; -#endif - #ifdef SH_ARCH_MAGIC_BIG case SH_ARCH_MAGIC_BIG: case SH_ARCH_MAGIC_LITTLE: @@ -2888,20 +2843,6 @@ coff_set_flags (bfd * abfd, return TRUE; #endif -#ifdef H8300MAGIC - case bfd_arch_h8300: - switch (bfd_get_mach (abfd)) - { - case bfd_mach_h8300: *magicp = H8300MAGIC; return TRUE; - case bfd_mach_h8300h: *magicp = H8300HMAGIC; return TRUE; - case bfd_mach_h8300s: *magicp = H8300SMAGIC; return TRUE; - case bfd_mach_h8300hn: *magicp = H8300HNMAGIC; return TRUE; - case bfd_mach_h8300sn: *magicp = H8300SNMAGIC; return TRUE; - default: break; - } - break; -#endif - #ifdef SH_ARCH_MAGIC_BIG case bfd_arch_sh: #ifdef COFF_IMAGE_WITH_PE diff --git a/bfd/config.bfd b/bfd/config.bfd index 1ca8ab4..7165d15 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -60,7 +60,6 @@ case $targ in arm-epoc-pe* | \ arm*-*-aout | \ arm*-*-coff | \ - h8300*-*-coff | \ h8500*-*-coff | \ i[3-7]86-*-sco3.2v5*coff | \ i[3-7]86-*-sysv4* | i[3-7]86-*-unixware* | \ @@ -132,6 +131,7 @@ case $targ in *-*-rtemscoff* | \ a29k-* | \ arm-*-oabi | \ + h8300*-*-coff | \ hppa*-*-rtems* | \ i860-*-* | \ i960-*-* | \ @@ -565,11 +565,6 @@ case "${targ}" in targ_defvec=h8300_elf32_linux_vec ;; - h8300*-*-*) - targ_defvec=h8300_coff_vec - targ_underscore=yes - ;; - h8500-*-*) targ_defvec=h8500_coff_vec targ_underscore=yes diff --git a/bfd/configure b/bfd/configure index 2c7feae..298846c 100755 --- a/bfd/configure +++ b/bfd/configure @@ -14392,7 +14392,6 @@ do fr30_elf32_vec) tb="$tb elf32-fr30.lo elf32.lo $elf" ;; frv_elf32_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;; frv_elf32_fdpic_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;; - h8300_coff_vec) tb="$tb coff-h8300.lo reloc16.lo $coffgen" ;; h8300_elf32_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;; h8300_elf32_linux_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;; h8500_coff_vec) tb="$tb coff-h8500.lo reloc16.lo $coffgen" ;; diff --git a/bfd/configure.ac b/bfd/configure.ac index 7787f0a..aedb3ae 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -469,7 +469,6 @@ do fr30_elf32_vec) tb="$tb elf32-fr30.lo elf32.lo $elf" ;; frv_elf32_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;; frv_elf32_fdpic_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;; - h8300_coff_vec) tb="$tb coff-h8300.lo reloc16.lo $coffgen" ;; h8300_elf32_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;; h8300_elf32_linux_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;; h8500_coff_vec) tb="$tb coff-h8500.lo reloc16.lo $coffgen" ;; diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in index 310d977..3842c05 100644 --- a/bfd/po/SRC-POTFILES.in +++ b/bfd/po/SRC-POTFILES.in @@ -29,7 +29,6 @@ coff-arm.c coff-aux.c coff-bfd.c coff-go32.c -coff-h8300.c coff-h8500.c coff-i386.c coff-m68k.c diff --git a/bfd/reloc16.c b/bfd/reloc16.c index 663afa7..5d67dce 100644 --- a/bfd/reloc16.c +++ b/bfd/reloc16.c @@ -22,8 +22,7 @@ /* Most of this hacked by Steve Chamberlain <sac@cygnus.com>. */ -/* These routines are used by coff-h8300 and coff-z8k to do - relocation. +/* These routines are used by coff-z8k to do relocation. FIXME: This code should be rewritten to support the new COFF linker. Basically, they need to deal with COFF relocs rather than diff --git a/bfd/targets.c b/bfd/targets.c index 0c6d9c1..93285b6 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -647,7 +647,6 @@ extern const bfd_target epiphany_elf32_vec; extern const bfd_target fr30_elf32_vec; extern const bfd_target frv_elf32_vec; extern const bfd_target frv_elf32_fdpic_vec; -extern const bfd_target h8300_coff_vec; extern const bfd_target h8300_elf32_vec; extern const bfd_target h8300_elf32_linux_vec; extern const bfd_target h8500_coff_vec; @@ -1057,7 +1056,6 @@ static const bfd_target * const _bfd_target_vector[] = &frv_elf32_vec, &frv_elf32_fdpic_vec, - &h8300_coff_vec, &h8300_elf32_vec, &h8300_elf32_linux_vec, &h8500_coff_vec, diff --git a/binutils/ChangeLog b/binutils/ChangeLog index d58bc4d..f12ea9b 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,5 +1,9 @@ 2018-04-16 Alan Modra <amodra@gmail.com> + * testsuite/binutils-all/objcopy.exp: Remove h8300-coff support. + +2018-04-16 Alan Modra <amodra@gmail.com> + * Makefile.am: Remove IEEE 695 support. * budbg.h: Likewise. * doc/binutils.texi: Likewise. diff --git a/binutils/testsuite/binutils-all/objcopy.exp b/binutils/testsuite/binutils-all/objcopy.exp index 68fccbe..eec60a9 100644 --- a/binutils/testsuite/binutils-all/objcopy.exp +++ b/binutils/testsuite/binutils-all/objcopy.exp @@ -77,7 +77,6 @@ proc objcopy_test {testname srcfile} { # files in the first place, and may order things a little # differently. Those systems should use setup_xfail here. - setup_xfail "h8300-*-coff" setup_xfail "h8500-*-rtems*" "h8500-*-coff" setup_xfail "hppa*-*-*" setup_xfail "m68*-*-*coff" "m68*-*-hpux*" "m68*-*-lynxos*" diff --git a/gas/ChangeLog b/gas/ChangeLog index c60c86a..c9cf61a 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,18 @@ 2018-04-16 Alan Modra <amodra@gmail.com> + * config/obj-coff.h: Remove h8300-coff support. + * config/tc-h8300.c: Likewise. + * config/tc-h8300.h: Likewise. + * testsuite/gas/h8300/h8300.exp: Likewise. + * testsuite/gas/h8300/branch-coff.s: Delete. + * testsuite/gas/h8300/branchh-coff.s: Delete. + * testsuite/gas/h8300/branchs-coff.s: Delete. + * testsuite/gas/h8300/ffxx1-coff.d: Delete. + * testsuite/gas/h8300/ffxx1-coff.s: Delete. + * testsuite/gas/h8300/h8300-coff.exp: Delete. + +2018-04-16 Alan Modra <amodra@gmail.com> + * app.c: Remove IEEE 695 support. * symbols.c: Likewise. diff --git a/gas/config/obj-coff.h b/gas/config/obj-coff.h index ee28ab4..8168dc2 100644 --- a/gas/config/obj-coff.h +++ b/gas/config/obj-coff.h @@ -85,11 +85,6 @@ #define TARGET_FORMAT "coff-z8k" #endif -#ifdef TC_H8300 -#include "coff/h8300.h" -#define TARGET_FORMAT "coff-h8300" -#endif - #ifdef TC_H8500 #include "coff/h8500.h" #define TARGET_FORMAT "coff-h8500" diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c index f1df514..a00089b 100644 --- a/gas/config/tc-h8300.c +++ b/gas/config/tc-h8300.c @@ -28,10 +28,7 @@ #define h8_opcodes ops #include "opcode/h8300.h" #include "safe-ctype.h" - -#ifdef OBJ_ELF #include "elf/h8.h" -#endif const char comment_chars[] = ";"; const char line_comment_chars[] = "#"; @@ -212,12 +209,10 @@ const pseudo_typeS md_pseudo_table[] = {"page", listing_eject, 0}, {"program", s_ignore, 0}, -#ifdef OBJ_ELF {"section", h8300_elf_section, 0}, {"section.s", h8300_elf_section, 0}, {"sect", h8300_elf_section, 0}, {"sect.s", h8300_elf_section, 0}, -#endif {0, 0, 0} }; @@ -1372,7 +1367,6 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons check_operand (operand, 0xffff, t); bytes[0] |= operand->exp.X_add_number >> 8; bytes[1] |= operand->exp.X_add_number >> 0; -#ifdef OBJ_ELF /* MOVA needs both relocs to relax the second operand properly. */ if (relaxmode != 0 && (OP_KIND(this_try->opcode->how) == O_MOVAB @@ -1382,7 +1376,6 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons idx = BFD_RELOC_16; fix_new_exp (frag_now, offset, 2, &operand->exp, 0, idx); } -#endif break; case L_24: check_operand (operand, 0xffffff, t); @@ -1399,11 +1392,9 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons bytes[3] |= operand->exp.X_add_number >> 0; if (relaxmode != 0) { -#ifdef OBJ_ELF if ((operand->mode & MODE) == DISP && relaxmode == 1) idx = BFD_RELOC_H8_DISP32A16; else -#endif idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1; fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx); } @@ -1418,12 +1409,9 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons case L_32: size = 4; where = (operand->mode & SIZE) == L_24 ? -1 : 0; -#ifdef OBJ_ELF if ((operand->mode & MODE) == DISP && relaxmode == 1) idx = BFD_RELOC_H8_DISP32A16; - else -#endif - if (relaxmode == 2) + else if (relaxmode == 2) idx = R_MOV24B1; else if (relaxmode == 1) idx = R_MOVL1; @@ -1656,17 +1644,9 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand) int x_mode = x & MODE; if (x_mode == IMM || x_mode == DISP) - { -#ifndef OBJ_ELF - /* Remove MEMRELAX flag added in h8300.h on mov with - addressing mode "register indirect with displacement". */ - if (x_mode == DISP) - x &= ~MEMRELAX; -#endif - do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2, - op_at[i] & 1, operand + i, (x & MEMRELAX) != 0, - this_try); - } + do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2, + op_at[i] & 1, operand + i, (x & MEMRELAX) != 0, + this_try); else if (x_mode == ABS) do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2, op_at[i] & 1, operand + i, @@ -1685,14 +1665,6 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand) if (operand[i].exp.X_add_number & 1) as_warn (_("branch operand has odd offset (%lx)\n"), (unsigned long) operand->exp.X_add_number); -#ifndef OBJ_ELF - /* The COFF port has always been off by one, changing it - now would be an incompatible change, so we leave it as-is. - - We don't want to do this for ELF as we want to be - compatible with the proposed ELF format from Hitachi. */ - operand[i].exp.X_add_number -= 1; -#endif if (size16) { operand[i].exp.X_add_number = @@ -1744,7 +1716,6 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand) int where = 0; bfd_reloc_code_real_type reloc_type = R_JMPL1; -#ifdef OBJ_ELF /* To be compatible with the proposed H8 ELF format, we want the relocation's offset to point to the first byte that will be modified, not to the start of the instruction. */ @@ -1756,7 +1727,6 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand) } else where = 1; -#endif /* This jmp may be a jump or a branch. */ diff --git a/gas/config/tc-h8300.h b/gas/config/tc-h8300.h index 8000121..8545a93 100644 --- a/gas/config/tc-h8300.h +++ b/gas/config/tc-h8300.h @@ -26,7 +26,6 @@ /* Fixup debug sections since we will never relax them. */ #define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC) -#ifdef OBJ_ELF #ifndef TE_LINUX #define TARGET_FORMAT "elf32-h8300" #else @@ -35,18 +34,12 @@ #define LOCAL_LABEL_PREFIX '.' #define LOCAL_LABEL(NAME) (NAME[0] == '.' && NAME[1] == 'L') #define FAKE_LABEL_NAME ".L0\001" -#endif struct fix; struct internal_reloc; #define WORKING_DOT_WORD -#define COFF_MAGIC ( Smode && Nmode ? 0x8304 : Hmode && Nmode ? 0x8303 : Smode ? 0x8302 : Hmode ? 0x8301 : 0x8300) -#define IGNORE_NONSTANDARD_ESCAPES - -#define tc_coff_symbol_emit_hook(a) ; /* not used */ - /* No shared lib support, so we don't need to ensure externally visible symbols can be overridden. */ #define EXTERN_FORCE_RELOC 0 @@ -55,11 +48,8 @@ struct internal_reloc; #define DWARF2_LINE_MIN_INSN_LENGTH 2 #define DWARF2_USE_FIXED_ADVANCE_PC 0 -#ifdef OBJ_ELF /* Provide mappings from the original H8 COFF relocation names to - their corresponding BFD relocation names. This allows us to use - most of tc-h8300.c without modifications for both ELF and COFF - ports. */ + their corresponding BFD relocation names. */ #define R_MOV24B1 BFD_RELOC_H8_DIR24A8 #define R_MOVL1 BFD_RELOC_H8_DIR32A16 #define R_RELLONG BFD_RELOC_32 @@ -74,12 +64,8 @@ struct internal_reloc; /* We do not want to adjust any relocations to make implementation of linker relaxations easier. */ #define tc_fix_adjustable(FIX) 0 -#endif #define LISTING_HEADER "Renesas H8/300 GAS " -#ifndef OBJ_ELF -#define RELOC_32 1234 -#endif extern int Hmode; extern int Smode; diff --git a/gas/testsuite/gas/h8300/branch-coff.s b/gas/testsuite/gas/h8300/branch-coff.s deleted file mode 100644 index 2580615..0000000 --- a/gas/testsuite/gas/h8300/branch-coff.s +++ /dev/null @@ -1,10 +0,0 @@ - .text -h8300_branches: - bsr h8300_branches - jmp h8300_branches - jmp @r0 - jmp @@16:8 - jsr h8300_branches - jsr @r0 - jsr @@16:8 - diff --git a/gas/testsuite/gas/h8300/branchh-coff.s b/gas/testsuite/gas/h8300/branchh-coff.s deleted file mode 100644 index 7cbc62f..0000000 --- a/gas/testsuite/gas/h8300/branchh-coff.s +++ /dev/null @@ -1,12 +0,0 @@ - .h8300h - .text -h8300h_branches: - bsr h8300h_branches:8 - bsr h8300h_branches:16 - jmp h8300h_branches - jmp @er0 - jmp @@16:8 - jsr h8300h_branches - jsr @er0 - jsr @@16:8 - diff --git a/gas/testsuite/gas/h8300/branchs-coff.s b/gas/testsuite/gas/h8300/branchs-coff.s deleted file mode 100644 index 8f33e17..0000000 --- a/gas/testsuite/gas/h8300/branchs-coff.s +++ /dev/null @@ -1,12 +0,0 @@ - .h8300s - .text -h8300s_branches: - bsr h8300s_branches:8 - bsr h8300s_branches:16 - jmp h8300s_branches - jmp @er0 - jmp @@16:8 - jsr h8300s_branches - jsr @er0 - jsr @@16:8 - diff --git a/gas/testsuite/gas/h8300/ffxx1-coff.d b/gas/testsuite/gas/h8300/ffxx1-coff.d deleted file mode 100644 index 18aa05b..0000000 --- a/gas/testsuite/gas/h8300/ffxx1-coff.d +++ /dev/null @@ -1,23 +0,0 @@ -#objdump: --prefix-addresses -dr -#name: FFxx1 - -# Test for FFxx:8 addressing. - -.*: file format .*h8300.* - -Disassembly of section .text: - ... - 0: 16 main -0+0400 <main>.*mov.b #0x7f,r0l -0+0402 <.*>.*mov.b @0xbb:8,r0l -0+0404 <.*>.*mov.b r0l,@0xffb9:16 -0+0408 <.*>.*mov.b #0x1,r0l -0+040a <loop>.*mov.b r0l,@0xffbb:16 -0+040e <delay>.*mov.w #0x0,r1 -0+0412 <deloop>.*adds #1,r1 -0+0414 <.*>.*bne .0 \(0x416\) - 415: DISP8 deloop[+]0xffffffff -0+0416 <.*>.*rotl.b r0l -0+0418 <.*>.*bra .0 \(0x41a\) - 419: DISP8 loop[+]0xffffffff - ... diff --git a/gas/testsuite/gas/h8300/ffxx1-coff.s b/gas/testsuite/gas/h8300/ffxx1-coff.s deleted file mode 100644 index b44a19f..0000000 --- a/gas/testsuite/gas/h8300/ffxx1-coff.s +++ /dev/null @@ -1,20 +0,0 @@ - .equ p6ddr, 0xffb9 ;0x7f for output - .equ p6dr, 0xffbb - .equ seed, 0x01 - .text - .org 0 -reset: .word main ;reset vector -; - .org 0x400 -main: mov.b #0x7f,r0l ;port 6 ddr = 7F - mov.b @0xffbb:8,r0l ;***test*** - mov.b r0l,@p6ddr:16 -; - mov.b #seed,r0l ;start with 0000001 -loop: mov.b r0l,@p6dr:16 ;output to port 6 -delay: mov.w #0x0000,r1 -deloop: adds #1,r1 - bne deloop:8 ;not = 0 - rotl r0l - bra loop:8 - .word 0 diff --git a/gas/testsuite/gas/h8300/h8300-coff.exp b/gas/testsuite/gas/h8300/h8300-coff.exp deleted file mode 100644 index 4213729..0000000 --- a/gas/testsuite/gas/h8300/h8300-coff.exp +++ /dev/null @@ -1,299 +0,0 @@ -# Copyright (C) 2012-2018 Free Software Foundation, Inc. - -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. - -# -# Some H8/300 coff tests -# -proc do_h8300_cbranch {} { - set testname "cbranch.s: h8300 conditional branch tests" - set x 0 - - gas_start "cbranch.s" "-al" - - # Check each instruction bit pattern to verify it got - # assembled correctly. - while 1 { - expect { - -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] } - timeout { perror "timeout\n; break } - eof { break } - } - } - - # This was intended to do any cleanup necessary. It kinda looks like it - # isn't needed, but just in case, please keep it in for now. - gas_finish - - # Did we find what we were looking for? If not, flunk it. - if [expr $x == 20] then { pass $testname } else { fail $testname } -} - -proc do_h8300_branch {} { - set testname "branch.s: h8300 branch tests" - set x 0 - - gas_start "branch-coff.s" "-al" - - # Check each instruction bit pattern to verify it got - # assembled correctly. - while 1 { - expect { - -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0002 5A000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0006 5900\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0008 5B00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000a 5E000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000e 5D00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0010 5F00\[^\n\]*\n" { set x [expr $x+1] } - timeout { perror "timeout\n; break } - eof { break } - } - } - - # This was intended to do any cleanup necessary. It kinda looks like it - # isn't needed, but just in case, please keep it in for now. - gas_finish - - # Did we find what we were looking for? If not, flunk it. - if [expr $x == 7] then { pass $testname } else { fail $testname } -} - -proc do_h8300h_cbranch {} { - set testname "cbranchh.s: h8300h conditional branch tests" - set x 0 - - gas_start "cbranchh.s" "-al" - - # Check each instruction bit pattern to verify it got - # assembled correctly. - while 1 { - expect { - -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] } - timeout { perror "timeout\n; break } - eof { break } - } - } - - # This was intended to do any cleanup necessary. It kinda looks like it - # isn't needed, but just in case, please keep it in for now. - gas_finish - - # Did we find what we were looking for? If not, flunk it. - if [expr $x == 40] then { pass $testname } else { fail $testname } -} - -proc do_h8300h_branch {} { - set testname "branchh.s: h8300h branch tests" - set x 0 - - gas_start "branchh-coff.s" "-al" - - # Check each instruction bit pattern to verify it got - # assembled correctly. - while 1 { - expect { - -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] } - timeout { perror "timeout\n; break } - eof { break } - } - } - - # This was intended to do any cleanup necessary. It kinda looks like it - # isn't needed, but just in case, please keep it in for now. - gas_finish - - # Did we find what we were looking for? If not, flunk it. - if [expr $x == 8] then { pass $testname } else { fail $testname } -} - -proc do_h8300s_cbranch {} { - set testname "cbranchs.s: h8300s conditional branch tests" - set x 0 - - gas_start "cbranchs.s" "-al" - - # Check each instruction bit pattern to verify it got - # assembled correctly. - while 1 { - expect { - -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] } - timeout { perror "timeout\n; break } - eof { break } - } - } - - # This was intended to do any cleanup necessary. It kinda looks like it - # isn't needed, but just in case, please keep it in for now. - gas_finish - - # Did we find what we were looking for? If not, flunk it. - if [expr $x == 40] then { pass $testname } else { fail $testname } -} - -proc do_h8300s_branch {} { - set testname "branchs.s: h8300s branch tests" - set x 0 - - gas_start "branchs-coff.s" "-al" - - # Check each instruction bit pattern to verify it got - # assembled correctly. - while 1 { - expect { - -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] } - -re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] } - timeout { perror "timeout\n; break } - eof { break } - } - } - - # This was intended to do any cleanup necessary. It kinda looks like it - # isn't needed, but just in case, please keep it in for now. - gas_finish - - # Did we find what we were looking for? If not, flunk it. - if [expr $x == 8] then { pass $testname } else { fail $testname } -} - -if { [istarget h8300*-*-coff] - || [istarget h8300*-*-hms*] - || [istarget h8300*-*-rtemscoff*] } then { - - # Test the basic h8300 instruction parser - do_h8300_cbranch - do_h8300_branch - - # Now test the h8300h instruction parser - do_h8300h_cbranch - do_h8300h_branch - - # Now test the h8300s instruction parser - do_h8300s_cbranch - do_h8300s_branch - - # Now some random tests - run_dump_test "ffxx1-coff" -} diff --git a/gas/testsuite/gas/h8300/h8300.exp b/gas/testsuite/gas/h8300/h8300.exp index 6a07336..c49b326 100644 --- a/gas/testsuite/gas/h8300/h8300.exp +++ b/gas/testsuite/gas/h8300/h8300.exp @@ -2255,10 +2255,6 @@ if [istarget h8300*-*-*] then { do_h8300h_mov32bug # Now some random tests - set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ] - set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ] - set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*]] - gas_test "cmpsi2.s" "" "" "cmpsi2.s" run_dump_test "pr3134" diff --git a/include/ChangeLog b/include/ChangeLog index aaeb039..ad0ee19 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,9 @@ 2018-04-16 Alan Modra <amodra@gmail.com> + * coff/h8300.h: Delete. + +2018-04-16 Alan Modra <amodra@gmail.com> + * ieee.h: Delete. 2018-04-16 Alan Modra <amodra@gmail.com> diff --git a/include/coff/h8300.h b/include/coff/h8300.h deleted file mode 100644 index 78b0ee6..0000000 --- a/include/coff/h8300.h +++ /dev/null @@ -1,55 +0,0 @@ -/* coff information for Renesas H8/300 and H8/300-H - - Copyright (C) 2001-2018 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, - MA 02110-1301, USA. */ - -#define L_LNNO_SIZE 4 -#include "coff/external.h" - -#define H8300MAGIC 0x8300 -#define H8300HMAGIC 0x8301 -#define H8300SMAGIC 0x8302 -#define H8300HNMAGIC 0x8303 -#define H8300SNMAGIC 0x8304 - -#define H8300BADMAG(x) (((x).f_magic != H8300MAGIC)) -#define H8300HBADMAG(x) (((x).f_magic != H8300HMAGIC)) -#define H8300SBADMAG(x) (((x).f_magic != H8300SMAGIC)) -#define H8300HNBADMAG(x) (((x).f_magic != H8300HNMAGIC)) -#define H8300SNBADMAG(x) (((x).f_magic != H8300SNMAGIC)) - -/* Relocation directives. */ - -/* The external reloc has an offset field, because some of the reloc - types on the h8 don't have room in the instruction for the entire - offset - eg the strange jump and high page addressing modes. */ - -struct external_reloc -{ - char r_vaddr[4]; - char r_symndx[4]; - char r_offset[4]; - char r_type[2]; - char r_stuff[2]; -}; - -#define RELOC struct external_reloc -#define RELSZ 16 - - - - diff --git a/ld/ChangeLog b/ld/ChangeLog index 7b75643..a1b3ba2 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,5 +1,31 @@ 2018-04-16 Alan Modra <amodra@gmail.com> + * Makefile.am: Remove h8300-coff support. + * configure.tgt: Likewise. + * testsuite/ld-h8300/h8300.exp: Likewise. + * emulparams/h8300.sh: Delete. + * emulparams/h8300h.sh: Delete. + * emulparams/h8300hn.sh: Delete. + * emulparams/h8300s.sh: Delete. + * emulparams/h8300sn.sh: Delete. + * emulparams/h8300sx.sh: Delete. + * emulparams/h8300sxn.sh: Delete. + * scripttempl/h8300.sc: Delete. + * scripttempl/h8300h.sc: Delete. + * scripttempl/h8300hn.sc: Delete. + * scripttempl/h8300s.sc: Delete. + * scripttempl/h8300sn.sc: Delete. + * scripttempl/h8300sx.sc: Delete. + * scripttempl/h8300sxn.sc: Delete. + * testsuite/ld-h8300/relax-3-coff.d: Delete. + * testsuite/ld-h8300/relax-4-coff.d: Delete. + * testsuite/ld-h8300/relax-5-coff.d: Delete. + * testsuite/ld-h8300/relax-6-coff.d: Delete. + * Makefile.in: Regenerate. + * po/BLD-POTFILES.in: Regenerate. + +2018-04-16 Alan Modra <amodra@gmail.com> + * ld.texinfo: Remove IEEE 695 support. * mri.c: Likewise. diff --git a/ld/Makefile.am b/ld/Makefile.am index 8a3834a..b4aa709 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -294,23 +294,16 @@ ALL_EMULATION_SOURCES = \ eelf_i386_vxworks.c \ eelf_iamcu.c \ eelf_s390.c \ - eh8300.c \ eh8300elf.c \ eh8300elf_linux.c \ - eh8300h.c \ eh8300helf.c \ eh8300helf_linux.c \ - eh8300hn.c \ eh8300hnelf.c \ - eh8300s.c \ eh8300self.c \ eh8300self_linux.c \ - eh8300sn.c \ eh8300snelf.c \ - eh8300sx.c \ eh8300sxelf.c \ eh8300sxelf_linux.c \ - eh8300sxn.c \ eh8300sxnelf.c \ eh8500.c \ eh8500b.c \ @@ -1359,18 +1352,12 @@ eelf_iamcu.c: $(srcdir)/emulparams/elf_iamcu.sh \ eelf_s390.c: $(srcdir)/emulparams/elf_s390.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300.c: $(srcdir)/emulparams/h8300.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300.sc ${GEN_DEPENDS} - eh8300elf.c: $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} eh8300elf_linux.c: $(srcdir)/emulparams/h8300elf_linux.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300h.c: $(srcdir)/emulparams/h8300h.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300h.sc ${GEN_DEPENDS} - eh8300helf.c: $(srcdir)/emulparams/h8300helf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -1379,16 +1366,10 @@ eh8300helf_linux.c: $(srcdir)/emulparams/h8300helf_linux.sh \ $(srcdir)/emulparams/h8300elf_linux.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300hn.c: $(srcdir)/emulparams/h8300hn.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300hn.sc ${GEN_DEPENDS} - eh8300hnelf.c: $(srcdir)/emulparams/h8300hnelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300s.c: $(srcdir)/emulparams/h8300s.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300s.sc ${GEN_DEPENDS} - eh8300self.c: $(srcdir)/emulparams/h8300self.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -1397,16 +1378,10 @@ eh8300self_linux.c: $(srcdir)/emulparams/h8300self_linux.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300sn.c: $(srcdir)/emulparams/h8300sn.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sn.sc ${GEN_DEPENDS} - eh8300snelf.c: $(srcdir)/emulparams/h8300snelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300sx.c: $(srcdir)/emulparams/h8300sx.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sx.sc ${GEN_DEPENDS} - eh8300sxelf.c: $(srcdir)/emulparams/h8300sxelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -1415,9 +1390,6 @@ eh8300sxelf_linux.c: $(srcdir)/emulparams/h8300sxelf_linux.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300sxn.c: $(srcdir)/emulparams/h8300sxn.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sxn.sc ${GEN_DEPENDS} - eh8300sxnelf.c: $(srcdir)/emulparams/h8300sxnelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} diff --git a/ld/Makefile.in b/ld/Makefile.in index ccdb378..8148ad0 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -663,23 +663,16 @@ ALL_EMULATION_SOURCES = \ eelf_i386_vxworks.c \ eelf_iamcu.c \ eelf_s390.c \ - eh8300.c \ eh8300elf.c \ eh8300elf_linux.c \ - eh8300h.c \ eh8300helf.c \ eh8300helf_linux.c \ - eh8300hn.c \ eh8300hnelf.c \ - eh8300s.c \ eh8300self.c \ eh8300self_linux.c \ - eh8300sn.c \ eh8300snelf.c \ - eh8300sx.c \ eh8300sxelf.c \ eh8300sxelf_linux.c \ - eh8300sxn.c \ eh8300sxnelf.c \ eh8500.c \ eh8500b.c \ @@ -1320,23 +1313,16 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_x86_64_fbsd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_x86_64_nacl.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_x86_64_sol2.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300elf.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300elf_linux.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300h.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300helf.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300helf_linux.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300hn.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300hnelf.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300s.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300self.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300self_linux.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sn.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300snelf.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sx.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxelf.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxelf_linux.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxn.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxnelf.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8500.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8500b.Po@am__quote@ @@ -2913,18 +2899,12 @@ eelf_iamcu.c: $(srcdir)/emulparams/elf_iamcu.sh \ eelf_s390.c: $(srcdir)/emulparams/elf_s390.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300.c: $(srcdir)/emulparams/h8300.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300.sc ${GEN_DEPENDS} - eh8300elf.c: $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} eh8300elf_linux.c: $(srcdir)/emulparams/h8300elf_linux.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300h.c: $(srcdir)/emulparams/h8300h.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300h.sc ${GEN_DEPENDS} - eh8300helf.c: $(srcdir)/emulparams/h8300helf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -2933,16 +2913,10 @@ eh8300helf_linux.c: $(srcdir)/emulparams/h8300helf_linux.sh \ $(srcdir)/emulparams/h8300elf_linux.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300hn.c: $(srcdir)/emulparams/h8300hn.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300hn.sc ${GEN_DEPENDS} - eh8300hnelf.c: $(srcdir)/emulparams/h8300hnelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300s.c: $(srcdir)/emulparams/h8300s.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300s.sc ${GEN_DEPENDS} - eh8300self.c: $(srcdir)/emulparams/h8300self.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -2951,16 +2925,10 @@ eh8300self_linux.c: $(srcdir)/emulparams/h8300self_linux.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300sn.c: $(srcdir)/emulparams/h8300sn.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sn.sc ${GEN_DEPENDS} - eh8300snelf.c: $(srcdir)/emulparams/h8300snelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300sx.c: $(srcdir)/emulparams/h8300sx.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sx.sc ${GEN_DEPENDS} - eh8300sxelf.c: $(srcdir)/emulparams/h8300sxelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} @@ -2969,9 +2937,6 @@ eh8300sxelf_linux.c: $(srcdir)/emulparams/h8300sxelf_linux.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} -eh8300sxn.c: $(srcdir)/emulparams/h8300sxn.sh \ - $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sxn.sc ${GEN_DEPENDS} - eh8300sxnelf.c: $(srcdir)/emulparams/h8300sxnelf.sh \ $(srcdir)/emulparams/h8300elf.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} diff --git a/ld/configure.tgt b/ld/configure.tgt index 0ebfb39..9cf4e78 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -218,8 +218,6 @@ moxie-*-moxiebox*) targ_emul=moxiebox ;; moxie-*-*) targ_emul=elf32moxie ;; -h8300-*-hms* | h8300-*-coff*) - targ_emul=h8300; targ_extra_emuls="h8300h h8300s h8300hn h8300sn h8300sx h8300sxn" ;; h8300-*-elf* | h8300-*-rtems*) targ_emul=h8300elf; targ_extra_emuls="h8300helf h8300self h8300hnelf h8300snelf h8300sxelf h8300sxnelf" ;; diff --git a/ld/emulparams/h8300.sh b/ld/emulparams/h8300.sh deleted file mode 100644 index 7042535..0000000 --- a/ld/emulparams/h8300.sh +++ /dev/null @@ -1,18 +0,0 @@ -SCRIPT_NAME=h8300 -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 -TINY_READONLY_SECTION=".tinyrodata : - { - *(.tinyrodata) - } =0" -TINY_DATA_SECTION=".tinydata 0xff8000 : - { - *(.tinydata) - ${RELOCATING+ _tinydata = .; } - }" -TINY_BSS_SECTION=".tinybss : AT (_tinydata) - { - *(.tinybss) - }" diff --git a/ld/emulparams/h8300h.sh b/ld/emulparams/h8300h.sh deleted file mode 100644 index 3ab794e..0000000 --- a/ld/emulparams/h8300h.sh +++ /dev/null @@ -1,5 +0,0 @@ -SCRIPT_NAME=h8300h -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 diff --git a/ld/emulparams/h8300hn.sh b/ld/emulparams/h8300hn.sh deleted file mode 100644 index d349082..0000000 --- a/ld/emulparams/h8300hn.sh +++ /dev/null @@ -1,5 +0,0 @@ -SCRIPT_NAME=h8300hn -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 diff --git a/ld/emulparams/h8300s.sh b/ld/emulparams/h8300s.sh deleted file mode 100644 index e27b4f5..0000000 --- a/ld/emulparams/h8300s.sh +++ /dev/null @@ -1,5 +0,0 @@ -SCRIPT_NAME=h8300s -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 diff --git a/ld/emulparams/h8300sn.sh b/ld/emulparams/h8300sn.sh deleted file mode 100644 index 16364ef..0000000 --- a/ld/emulparams/h8300sn.sh +++ /dev/null @@ -1,5 +0,0 @@ -SCRIPT_NAME=h8300sn -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 diff --git a/ld/emulparams/h8300sx.sh b/ld/emulparams/h8300sx.sh deleted file mode 100644 index b46b6f9..0000000 --- a/ld/emulparams/h8300sx.sh +++ /dev/null @@ -1,5 +0,0 @@ -SCRIPT_NAME=h8300sx -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 diff --git a/ld/emulparams/h8300sxn.sh b/ld/emulparams/h8300sxn.sh deleted file mode 100644 index 7cad974..0000000 --- a/ld/emulparams/h8300sxn.sh +++ /dev/null @@ -1,5 +0,0 @@ -SCRIPT_NAME=h8300sxn -OUTPUT_FORMAT="coff-h8300" -TEXT_START_ADDR=0x8000 -TARGET_PAGE_SIZE=128 -ARCH=h8300 diff --git a/ld/po/BLD-POTFILES.in b/ld/po/BLD-POTFILES.in index 41ab032..30d340f 100644 --- a/ld/po/BLD-POTFILES.in +++ b/ld/po/BLD-POTFILES.in @@ -208,23 +208,16 @@ eelf_x86_64_cloudabi.c eelf_x86_64_fbsd.c eelf_x86_64_nacl.c eelf_x86_64_sol2.c -eh8300.c eh8300elf.c eh8300elf_linux.c -eh8300h.c eh8300helf.c eh8300helf_linux.c -eh8300hn.c eh8300hnelf.c -eh8300s.c eh8300self.c eh8300self_linux.c -eh8300sn.c eh8300snelf.c -eh8300sx.c eh8300sxelf.c eh8300sxelf_linux.c -eh8300sxn.c eh8300sxnelf.c eh8500.c eh8500b.c diff --git a/ld/scripttempl/h8300.sc b/ld/scripttempl/h8300.sc deleted file mode 100644 index 9443ff8..0000000 --- a/ld/scripttempl/h8300.sc +++ /dev/null @@ -1,106 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(${ARCH}) -${RELOCATING+ENTRY ("_start")} - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - ram : o = 0x0100, l = 0xfdfc - /* The stack starts at the top of main ram. */ - topram : o = 0xfefc, l = 0x4 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - SHORT (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.init : - { - *(.init) - } ${RELOCATING+ > ram} - -.text : - { - *(.rodata) - *(.text) - *(.text.*) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - *(.data.*) - *(.tiny) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/scripttempl/h8300h.sc b/ld/scripttempl/h8300h.sc deleted file mode 100644 index 9b7ba37..0000000 --- a/ld/scripttempl/h8300h.sc +++ /dev/null @@ -1,109 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(h8300h) -${RELOCATING+ENTRY ("_start")} - -/* The memory size is 256KB to coincide with the simulator. - Don't change either without considering the other. */ - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - /* We still only use 256k as the main ram size. */ - ram : o = 0x0100, l = 0x3fefc - /* The stack starts at the top of main ram. */ - topram : o = 0x3fffc, l = 0x4 - /* This holds variables in the "tiny" sections. */ - tiny : o = 0xff8000, l = 0x7f00 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xffff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - LONG (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.text : - { - *(.rodata) - *(.text) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.tiny : - { - *(.tiny) - } ${RELOCATING+ > tiny} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/scripttempl/h8300hn.sc b/ld/scripttempl/h8300hn.sc deleted file mode 100644 index 0098e72..0000000 --- a/ld/scripttempl/h8300hn.sc +++ /dev/null @@ -1,99 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(h8300hn) -${RELOCATING+ENTRY ("_start")} - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - ram : o = 0x0100, l = 0xfdfc - /* The stack starts at the top of main ram. */ - topram : o = 0xfefc, l = 0x4 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - SHORT (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.text : - { - *(.rodata) - *(.text) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - *(.tiny) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/scripttempl/h8300s.sc b/ld/scripttempl/h8300s.sc deleted file mode 100644 index e9eb4e1..0000000 --- a/ld/scripttempl/h8300s.sc +++ /dev/null @@ -1,109 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(h8300s) -${RELOCATING+ENTRY ("_start")} - -/* The memory size is 256KB to coincide with the simulator. - Don't change either without considering the other. */ - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - /* We still only use 256k as the main ram size. */ - ram : o = 0x0100, l = 0x3fefc - /* The stack starts at the top of main ram. */ - topram : o = 0x3fffc, l = 0x4 - /* This holds variables in the "tiny" sections. */ - tiny : o = 0xff8000, l = 0x7f00 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xffff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - LONG (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.text : - { - *(.rodata) - *(.text) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.tiny : - { - *(.tiny) - } ${RELOCATING+ > tiny} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/scripttempl/h8300sn.sc b/ld/scripttempl/h8300sn.sc deleted file mode 100644 index 961ef87..0000000 --- a/ld/scripttempl/h8300sn.sc +++ /dev/null @@ -1,99 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(h8300sn) -${RELOCATING+ENTRY ("_start")} - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - ram : o = 0x0100, l = 0xfdfc - /* The stack starts at the top of main ram. */ - topram : o = 0xfefc, l = 0x4 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - SHORT (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.text : - { - *(.rodata) - *(.text) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - *(.tiny) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/scripttempl/h8300sx.sc b/ld/scripttempl/h8300sx.sc deleted file mode 100644 index ea8d49b..0000000 --- a/ld/scripttempl/h8300sx.sc +++ /dev/null @@ -1,109 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(h8300sx) -${RELOCATING+ENTRY ("_start")} - -/* The memory size is 256KB to coincide with the simulator. - Don't change either without considering the other. */ - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - /* We still only use 256k as the main ram size. */ - ram : o = 0x0100, l = 0x3fefc - /* The stack starts at the top of main ram. */ - topram : o = 0x3fffc, l = 0x4 - /* This holds variables in the "tiny" sections. */ - tiny : o = 0xff8000, l = 0x7f00 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xffff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - LONG (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.text : - { - *(.rodata) - *(.text) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.tiny : - { - *(.tiny) - } ${RELOCATING+ > tiny} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/scripttempl/h8300sxn.sc b/ld/scripttempl/h8300sxn.sc deleted file mode 100644 index 6b4d3a6..0000000 --- a/ld/scripttempl/h8300sxn.sc +++ /dev/null @@ -1,99 +0,0 @@ -# Copyright (C) 2014-2018 Free Software Foundation, Inc. -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. - -TORS=".tors : - { - ___ctors = . ; - *(.ctors) - ___ctors_end = . ; - ___dtors = . ; - *(.dtors) - ___dtors_end = . ; - } > ram" - -cat <<EOF -/* Copyright (C) 2014-2018 Free Software Foundation, Inc. - - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -OUTPUT_FORMAT("${OUTPUT_FORMAT}") -OUTPUT_ARCH(h8300sxn) -${RELOCATING+ENTRY ("_start")} - -MEMORY -{ - /* 0xc4 is a magic entry. We should have the linker just - skip over it one day... */ - vectors : o = 0x0000, l = 0xc4 - magicvectors : o = 0xc4, l = 0x3c - ram : o = 0x0100, l = 0xfdfc - /* The stack starts at the top of main ram. */ - topram : o = 0xfefc, l = 0x4 - /* At the very top of the address space is the 8-bit area. */ - eight : o = 0xff00, l = 0x100 -} - -SECTIONS -{ -.vectors : - { - /* Use something like this to place a specific - function's address into the vector table. - - SHORT (ABSOLUTE (_foobar)). */ - - *(.vectors) - } ${RELOCATING+ > vectors} - -.text : - { - *(.rodata) - *(.text) - *(.strings) - ${RELOCATING+ _etext = . ; } - } ${RELOCATING+ > ram} - -${CONSTRUCTING+${TORS}} - -.data : - { - *(.data) - *(.tiny) - ${RELOCATING+ _edata = . ; } - } ${RELOCATING+ > ram} - -.bss : - { - ${RELOCATING+ _bss_start = . ;} - *(.bss) - *(COMMON) - ${RELOCATING+ _end = . ; } - } ${RELOCATING+ >ram} - -.stack : - { - ${RELOCATING+ _stack = . ; } - *(.stack) - } ${RELOCATING+ > topram} - -.eight : - { - *(.eight) - } ${RELOCATING+ > eight} - -.stab 0 ${RELOCATING+(NOLOAD)} : - { - [ .stab ] - } - -.stabstr 0 ${RELOCATING+(NOLOAD)} : - { - [ .stabstr ] - } -} -EOF diff --git a/ld/testsuite/ld-h8300/h8300.exp b/ld/testsuite/ld-h8300/h8300.exp index 316bbd9..4a550a1 100644 --- a/ld/testsuite/ld-h8300/h8300.exp +++ b/ld/testsuite/ld-h8300/h8300.exp @@ -28,18 +28,10 @@ if ![istarget h8300-*-*] { } run_dump_test relax - -if [is_elf_format] { - run_dump_test relax-2 - run_dump_test relax-3 - run_dump_test relax-4 - run_dump_test relax-5 - run_dump_test relax-6 - run_dump_test relax-7 - run_dump_test gcsection -} else { - run_dump_test relax-3-coff - run_dump_test relax-4-coff - run_dump_test relax-5-coff - run_dump_test relax-6-coff -} +run_dump_test relax-2 +run_dump_test relax-3 +run_dump_test relax-4 +run_dump_test relax-5 +run_dump_test relax-6 +run_dump_test relax-7 +run_dump_test gcsection diff --git a/ld/testsuite/ld-h8300/relax-3-coff.d b/ld/testsuite/ld-h8300/relax-3-coff.d deleted file mode 100644 index 0384398..0000000 --- a/ld/testsuite/ld-h8300/relax-3-coff.d +++ /dev/null @@ -1,36 +0,0 @@ -# name: H8300 Relaxation Test 3 (for COFF) -# source: relax-3.s -# ld: --relax -m h8300s -# objdump: -d - -.*: file format .*-h8300 - -Disassembly of section .text: - -00000100 <_start>: -# -# Relaxation of aa:16 -# -.*: 6a 08 00 00.*mov.b @0x0:16,r0l -.*: 6a 08 7f ff.*mov.b @0x7fff:16,r0l -.*: 6a 08 80 00.*mov.b @0x8000:16,r0l -.*: 6a 08 fe ff.*mov.b @0xfeff:16,r0l -.*: 28 00 .*mov.b @0x0:8,r0l -.*: 28 ff .*mov.b @0xff:8,r0l -# -# Relaxation of aa:32 -# -.*: 6a 08 00 00.*mov.b @0x0:16,r0l -.*: 6a 08 7f ff.*mov.b @0x7fff:16,r0l -.*: 6a 28 00 00.*mov.b @0x8000:32,r0l -.*: 80 00 -.*: 6a 28 00 00.*mov.b @0xff00:32,r0l -.*: ff 00 -.*: 6a 28 00 ff.*mov.b @0xffff00:32,r0l -.*: ff 00 -.*: 6a 28 ff ff.*mov.b @0xffff7fff:32,r0l -.*: 7f ff -.*: 6a 08 80 00.*mov.b @0x8000:16,r0l -.*: 6a 08 fe ff.*mov.b @0xfeff:16,r0l -.*: 28 00 .*mov.b @0x0:8,r0l -.*: 28 ff .*mov.b @0xff:8,r0l diff --git a/ld/testsuite/ld-h8300/relax-4-coff.d b/ld/testsuite/ld-h8300/relax-4-coff.d deleted file mode 100644 index d6417ac..0000000 --- a/ld/testsuite/ld-h8300/relax-4-coff.d +++ /dev/null @@ -1,76 +0,0 @@ -# name: H8300 Relaxation Test 4 (for COFF) -# source: relax-4.s -# ld: --relax -m h8300s -# objdump: -d - -.*: file format .*-h8300 - -Disassembly of section .text: - -00000100 <_start>: - 100: f8 03.*mov.b #0x3,r0l - 102: fa 05.*mov.b #0x5,r2l - 104: 7f ff 60 80.*bset r0l,@0xff:8 - 108: 7f 00 60 a0.*bset r2l,@0x0:8 - 10c: 7e ff 63 a0.*btst r2l,@0xff:8 - 110: 7e 00 63 80.*btst r0l,@0x0:8 - 114: 6a 18 00 00.*bset #0x5,@0x0:16 - 118: 70 50 - 11a: 6a 18 7f ff.*bset #0x5,@0x7fff:16 - 11e: 70 50 - 120: 6a 18 80 00.*bset #0x5,@0x8000:16 - 124: 70 50 - 126: 6a 18 fe ff.*bset #0x5,@0xfeff:16 - 12a: 70 50 - 12c: 7f 00 70 50.*bset #0x5,@0x0:8 - 130: 7f ff 70 50.*bset #0x5,@0xff:8 - 134: 6a 10 00 00.*band #0x5,@0x0:16 - 138: 76 50 - 13a: 6a 10 7f ff.*band #0x5,@0x7fff:16 - 13e: 76 50 - 140: 6a 10 80 00.*band #0x5,@0x8000:16 - 144: 76 50 - 146: 6a 10 fe ff.*band #0x5,@0xfeff:16 - 14a: 76 50 - 14c: 7e 00 76 50.*band #0x5,@0x0:8 - 150: 7e ff 76 50.*band #0x5,@0xff:8 - 154: 7f ff 60 a0.*bset r2l,@0xff:8 - 158: 7f 00 60 80.*bset r0l,@0x0:8 - 15c: 7e ff 63 80.*btst r0l,@0xff:8 - 160: 7e 00 63 a0.*btst r2l,@0x0:8 - 164: 6a 18 00 00.*bset #0x6,@0x0:16 - 168: 70 60 - 16a: 6a 18 7f ff.*bset #0x6,@0x7fff:16 - 16e: 70 60 - 170: 6a 38 00 00.*bset #0x6,@0x8000:32 - 174: 80 00 70 60 - 178: 6a 38 00 00.*bset #0x6,@0xff00:32 - 17c: ff 00 70 60 - 180: 6a 38 00 ff.*bset #0x6,@0xffff00:32 - 184: ff 00 70 60 - 188: 6a 38 ff ff.*bset #0x6,@0xffff7fff:32 - 18c: 7f ff 70 60 - 190: 6a 18 80 00.*bset #0x6,@0x8000:16 - 194: 70 60 - 196: 6a 18 fe ff.*bset #0x6,@0xfeff:16 - 19a: 70 60 - 19c: 7f 00 70 60.*bset #0x6,@0x0:8 - 1a0: 7f ff 70 60.*bset #0x6,@0xff:8 - 1a4: 6a 10 00 00.*band #0x6,@0x0:16 - 1a8: 76 60 - 1aa: 6a 10 7f ff.*band #0x6,@0x7fff:16 - 1ae: 76 60 - 1b0: 6a 30 00 00.*band #0x6,@0x8000:32 - 1b4: 80 00 76 60 - 1b8: 6a 30 00 00.*band #0x6,@0xff00:32 - 1bc: ff 00 76 60 - 1c0: 6a 30 00 ff.*band #0x6,@0xffff00:32 - 1c4: ff 00 76 60 - 1c8: 6a 30 ff ff.*band #0x6,@0xffff7fff:32 - 1cc: 7f ff 76 60 - 1d0: 6a 10 80 00.*band #0x6,@0x8000:16 - 1d4: 76 60 - 1d6: 6a 10 fe ff.*band #0x6,@0xfeff:16 - 1da: 76 60 - 1dc: 7e 00 76 60.*band #0x6,@0x0:8 - 1e0: 7e ff 76 60.*band #0x6,@0xff:8 diff --git a/ld/testsuite/ld-h8300/relax-5-coff.d b/ld/testsuite/ld-h8300/relax-5-coff.d deleted file mode 100644 index eed2ba0..0000000 --- a/ld/testsuite/ld-h8300/relax-5-coff.d +++ /dev/null @@ -1,50 +0,0 @@ -# name: H8300 Relaxation Test 5 (for COFF) -# source: relax-5.s -# ld: --relax -m h8300s -# objdump: -d --no-show-raw-insn - -.*: file format .*-h8300 - -Disassembly of section .text: - -00000100 <_start>: - 100:.*ldc @0x0:16,ccr - 106:.*ldc @0x7fff:16,ccr - 10c:.*ldc @0x8000:32,ccr - 114:.*ldc @0xff00:32,ccr - 11c:.*ldc @0xffff00:32,ccr - 124:.*ldc @0xffff7fff:32,ccr - 12c:.*ldc @0x8000:16,ccr - 132:.*ldc @0xfeff:16,ccr - 138:.*ldc @0xff00:16,ccr - 13e:.*ldc @0xffff:16,ccr - 144:.*stc ccr,@0x0:16 - 14a:.*stc ccr,@0x7fff:16 - 150:.*stc ccr,@0x8000:32 - 158:.*stc ccr,@0xff00:32 - 160:.*stc ccr,@0xffff00:32 - 168:.*stc ccr,@0xffff7fff:32 - 170:.*stc ccr,@0x8000:16 - 176:.*stc ccr,@0xfeff:16 - 17c:.*stc ccr,@0xff00:16 - 182:.*stc ccr,@0xffff:16 - 188:.*ldc @0x0:16,exr - 18e:.*ldc @0x7fff:16,exr - 194:.*ldc @0x8000:32,exr - 19c:.*ldc @0xff00:32,exr - 1a4:.*ldc @0xffff00:32,exr - 1ac:.*ldc @0xffff7fff:32,exr - 1b4:.*ldc @0x8000:16,exr - 1ba:.*ldc @0xfeff:16,exr - 1c0:.*ldc @0xff00:16,exr - 1c6:.*ldc @0xffff:16,exr - 1cc:.*stc exr,@0x0:16 - 1d2:.*stc exr,@0x7fff:16 - 1d8:.*stc exr,@0x8000:32 - 1e0:.*stc exr,@0xff00:32 - 1e8:.*stc exr,@0xffff00:32 - 1f0:.*stc exr,@0xffff7fff:32 - 1f8:.*stc exr,@0x8000:16 - 1fe:.*stc exr,@0xfeff:16 - 204:.*stc exr,@0xff00:16 - 20a:.*stc exr,@0xffff:16 diff --git a/ld/testsuite/ld-h8300/relax-6-coff.d b/ld/testsuite/ld-h8300/relax-6-coff.d deleted file mode 100644 index b9c1e2f..0000000 --- a/ld/testsuite/ld-h8300/relax-6-coff.d +++ /dev/null @@ -1,11 +0,0 @@ -# name: H8300 Relaxation Test 6 -# source: relax-6.s -# ld: --relax -m h8300s -# objdump: -d --no-show-raw-insn - -.*: file format .*-h8300 -Disassembly of section .text: - -00000100 <_start>: - 100: mov.b r2l,@0xbd:8 - 102: rts |