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-rw-r--r--gdb/ChangeLog20
-rw-r--r--gdb/arch-utils.c8
-rw-r--r--gdb/arch-utils.h2
-rw-r--r--gdb/arm-tdep.c4
-rw-r--r--gdb/frv-tdep.c4
-rw-r--r--gdb/gdbarch.c4
-rw-r--r--gdb/gdbarch.h2
-rwxr-xr-xgdb/gdbarch.sh2
-rw-r--r--gdb/m32c-tdep.c4
-rw-r--r--gdb/mips-tdep.c14
-rw-r--r--gdb/remote-sim.c4
-rw-r--r--gdb/rs6000-tdep.c10
-rw-r--r--gdb/score-tdep.c2
-rw-r--r--gdb/sh-tdep.c10
-rw-r--r--gdb/sim-regno.h2
15 files changed, 55 insertions, 37 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index edba545..e5713a4 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,23 @@
+2007-11-19 Markus Deuling <deuling@de.ibm.com>
+
+ * gdbarch.sh (register_sim_regno): Add gdbarch as parameter.
+ * gdbarch.{c,h}: Regenerate.
+
+ * arch-utils.h (legacy_register_sim_regno): Add gdbarch as parameter.
+ * score-tdep.c (score_register_sim_regno): Likewise.
+ * sim-regno.h (one2one_register_sim_regno): Likewise.
+
+ * arch-utils.c (legacy_register_sim_regno): Add gdbarch as parameter.
+ Replace current_gdbarch by gdbarch.
+ * sh-tdep.c (sh_sh2a_register_sim_regno)
+ (sh_dsp_register_sim_regno): Likewise.
+ * rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
+ * mips-tdep.c (mips_register_sim_regno): Likewise.
+ * m32c-tdep.c (m32c_register_sim_regno): Likewise.
+ * frv-tdep.c (frv_register_sim_regno): Likewise.
+ * arm-tdep.c (arm_register_sim_regno): Likewise.
+ * remote-sim.c (one2one_register_sim_regno): Likewise.
+
2007-11-16 Ulrich Weigand <uweigand@de.ibm.com>
* configure.ac (--enable-targets): New configure option.
diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c
index c56b983..17d3ee7 100644
--- a/gdb/arch-utils.c
+++ b/gdb/arch-utils.c
@@ -38,16 +38,16 @@
int
-legacy_register_sim_regno (int regnum)
+legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
/* NOTE: cagney/2002-05-13: The old code did it this way and it is
suspected that some GDB/SIM combinations may rely on this
behavour. The default should be one2one_register_sim_regno
(below). */
- if (gdbarch_register_name (current_gdbarch, regnum) != NULL
- && gdbarch_register_name (current_gdbarch, regnum)[0] != '\0')
+ if (gdbarch_register_name (gdbarch, regnum) != NULL
+ && gdbarch_register_name (gdbarch, regnum)[0] != '\0')
return regnum;
else
return LEGACY_SIM_REGNO_IGNORE;
diff --git a/gdb/arch-utils.h b/gdb/arch-utils.h
index 8d87fbf..0cb3c1e 100644
--- a/gdb/arch-utils.h
+++ b/gdb/arch-utils.h
@@ -89,7 +89,7 @@ int default_remote_register_number (struct gdbarch *gdbarch,
(LEGACY_SIM_REGNO_IGNORE) when the register doesn't have a valid
name. */
-extern int legacy_register_sim_regno (int regnum);
+extern int legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum);
/* Return the selected byte order, or BFD_ENDIAN_UNKNOWN if no byte
order was explicitly selected. */
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index cc3f92e..1321dfc 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -1462,10 +1462,10 @@ arm_dwarf_reg_to_regnum (int reg)
/* Map GDB internal REGNUM onto the Arm simulator register numbers. */
static int
-arm_register_sim_regno (int regnum)
+arm_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
int reg = regnum;
- gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
if (regnum >= ARM_WR0_REGNUM && regnum <= ARM_WR15_REGNUM)
return regnum - ARM_WR0_REGNUM + SIM_ARM_IWMMXT_COP0R0_REGNUM;
diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c
index 6f49f0a..a4dced1 100644
--- a/gdb/frv-tdep.c
+++ b/gdb/frv-tdep.c
@@ -349,7 +349,7 @@ frv_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
}
static int
-frv_register_sim_regno (int reg)
+frv_register_sim_regno (struct gdbarch *gdbarch, int reg)
{
static const int spr_map[] =
{
@@ -393,7 +393,7 @@ frv_register_sim_regno (int reg)
H_SPR_FNER1, /* fner1_regnum */
};
- gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c
index b3d8284..bfde685 100644
--- a/gdb/gdbarch.c
+++ b/gdb/gdbarch.c
@@ -290,7 +290,7 @@ struct gdbarch startup_gdbarch =
default_print_registers_info, /* print_registers_info */
0, /* print_float_info */
0, /* print_vector_info */
- 0, /* register_sim_regno */
+ legacy_register_sim_regno, /* register_sim_regno */
cannot_register_not, /* cannot_fetch_register */
cannot_register_not, /* cannot_store_register */
0, /* get_longjmp_target */
@@ -1799,7 +1799,7 @@ gdbarch_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
gdb_assert (gdbarch->register_sim_regno != NULL);
if (gdbarch_debug >= 2)
fprintf_unfiltered (gdb_stdlog, "gdbarch_register_sim_regno called\n");
- return gdbarch->register_sim_regno (reg_nr);
+ return gdbarch->register_sim_regno (gdbarch, reg_nr);
}
void
diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h
index 5e39512..0a62bfc 100644
--- a/gdb/gdbarch.h
+++ b/gdb/gdbarch.h
@@ -296,7 +296,7 @@ extern void set_gdbarch_print_vector_info (struct gdbarch *gdbarch, gdbarch_prin
/* MAP a GDB RAW register number onto a simulator register number. See
also include/...-sim.h. */
-typedef int (gdbarch_register_sim_regno_ftype) (int reg_nr);
+typedef int (gdbarch_register_sim_regno_ftype) (struct gdbarch *gdbarch, int reg_nr);
extern int gdbarch_register_sim_regno (struct gdbarch *gdbarch, int reg_nr);
extern void set_gdbarch_register_sim_regno (struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno);
diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index 76814d9..a241675 100755
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -444,7 +444,7 @@ M:void:print_float_info:struct ui_file *file, struct frame_info *frame, const ch
M:void:print_vector_info:struct ui_file *file, struct frame_info *frame, const char *args:file, frame, args
# MAP a GDB RAW register number onto a simulator register number. See
# also include/...-sim.h.
-f:int:register_sim_regno:int reg_nr:reg_nr::legacy_register_sim_regno::0
+m:int:register_sim_regno:int reg_nr:reg_nr::legacy_register_sim_regno::0
m:int:cannot_fetch_register:int regnum:regnum::cannot_register_not::0
m:int:cannot_store_register:int regnum:regnum::cannot_register_not::0
# setjmp/longjmp support.
diff --git a/gdb/m32c-tdep.c b/gdb/m32c-tdep.c
index 2e837e8..4c8e60e 100644
--- a/gdb/m32c-tdep.c
+++ b/gdb/m32c-tdep.c
@@ -241,9 +241,9 @@ m32c_register_type (struct gdbarch *arch, int reg_nr)
static int
-m32c_register_sim_regno (int reg_nr)
+m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
{
- return gdbarch_tdep (current_gdbarch)->regs[reg_nr].sim_num;
+ return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
}
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 54202ca..6df6c61 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -4982,19 +4982,17 @@ mips_dwarf_dwarf2_ecoff_reg_to_regnum (int num)
}
static int
-mips_register_sim_regno (int regnum)
+mips_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
/* FIXME: cagney/2002-05-13: Need to look at the pseudo register to
decide if it is valid. Should instead define a standard sim/gdb
register numbering scheme. */
- if (gdbarch_register_name (current_gdbarch,
- gdbarch_num_regs
- (current_gdbarch) + regnum) != NULL
- && gdbarch_register_name (current_gdbarch,
- gdbarch_num_regs
- (current_gdbarch) + regnum)[0] != '\0')
+ if (gdbarch_register_name (gdbarch,
+ gdbarch_num_regs (gdbarch) + regnum) != NULL
+ && gdbarch_register_name (gdbarch,
+ gdbarch_num_regs (gdbarch) + regnum)[0] != '\0')
return regnum;
else
return LEGACY_SIM_REGNO_IGNORE;
diff --git a/gdb/remote-sim.c b/gdb/remote-sim.c
index 59fc1b8..e845b36 100644
--- a/gdb/remote-sim.c
+++ b/gdb/remote-sim.c
@@ -269,10 +269,10 @@ gdb_os_error (host_callback * p, const char *format,...)
}
int
-one2one_register_sim_regno (int regnum)
+one2one_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
return regnum;
}
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 198f2c8..2d91825 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -342,17 +342,17 @@ init_sim_regno_table (struct gdbarch *arch)
/* Given a GDB register number REG, return the corresponding SIM
register number. */
static int
-rs6000_register_sim_regno (int reg)
+rs6000_register_sim_regno (struct gdbarch *gdbarch, int reg)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int sim_regno;
if (tdep->sim_regno == NULL)
- init_sim_regno_table (current_gdbarch);
+ init_sim_regno_table (gdbarch);
gdb_assert (0 <= reg
- && reg <= gdbarch_num_regs (current_gdbarch)
- + gdbarch_num_pseudo_regs (current_gdbarch));
+ && reg <= gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch));
sim_regno = tdep->sim_regno[reg];
if (sim_regno >= 0)
diff --git a/gdb/score-tdep.c b/gdb/score-tdep.c
index d973107..03de66d 100644
--- a/gdb/score-tdep.c
+++ b/gdb/score-tdep.c
@@ -305,7 +305,7 @@ score_register_name (struct gdbarch *gdbarch, int regnum)
}
static int
-score_register_sim_regno (int regnum)
+score_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
gdb_assert (regnum >= 0 && regnum < SCORE_NUM_REGS);
return regnum;
diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index 1e04a8f..b7cccae 100644
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -2286,10 +2286,10 @@ sh_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
}
static int
-sh_dsp_register_sim_regno (int nr)
+sh_dsp_register_sim_regno (struct gdbarch *gdbarch, int nr)
{
- if (legacy_register_sim_regno (nr) < 0)
- return legacy_register_sim_regno (nr);
+ if (legacy_register_sim_regno (gdbarch, nr) < 0)
+ return legacy_register_sim_regno (gdbarch, nr);
if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
if (nr == MOD_REGNUM)
@@ -2304,7 +2304,7 @@ sh_dsp_register_sim_regno (int nr)
}
static int
-sh_sh2a_register_sim_regno (int nr)
+sh_sh2a_register_sim_regno (struct gdbarch *gdbarch, int nr)
{
switch (nr)
{
@@ -2329,7 +2329,7 @@ sh_sh2a_register_sim_regno (int nr)
default:
break;
}
- return legacy_register_sim_regno (nr);
+ return legacy_register_sim_regno (gdbarch, nr);
}
/* Set up the register unwinding such that call-clobbered registers are
diff --git a/gdb/sim-regno.h b/gdb/sim-regno.h
index c1f4e4a..076f424 100644
--- a/gdb/sim-regno.h
+++ b/gdb/sim-regno.h
@@ -38,6 +38,6 @@ enum sim_regno {
/* Treat all raw registers as valid. */
-extern int one2one_register_sim_regno (int regnum);
+extern int one2one_register_sim_regno (struct gdbarch *gdbarch, int regnum);
#endif
generated by cgit v1.1 at 2024-11-08 12:13:59 +0000