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-rw-r--r--sim/aarch64/ChangeLog6
-rw-r--r--sim/aarch64/simulator.c31
-rw-r--r--sim/bfin/ChangeLog13
-rw-r--r--sim/bfin/bfin-sim.c2
-rw-r--r--sim/bfin/dv-bfin_dma.c2
-rw-r--r--sim/bfin/dv-bfin_ebiu_amc.c4
-rw-r--r--sim/bfin/dv-bfin_emac.c2
-rw-r--r--sim/bfin/dv-bfin_mmu.c2
-rw-r--r--sim/bfin/dv-bfin_trace.c2
-rw-r--r--sim/bfin/interp.c4
-rw-r--r--sim/bfin/sim-main.h6
-rw-r--r--sim/common/ChangeLog9
-rw-r--r--sim/common/cgen-scache.c4
-rw-r--r--sim/common/cgen-trace.c3
-rw-r--r--sim/common/cgen-utils.c3
-rw-r--r--sim/common/sim-basics.h7
16 files changed, 60 insertions, 40 deletions
diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog
index f9b8673..b884979 100644
--- a/sim/aarch64/ChangeLog
+++ b/sim/aarch64/ChangeLog
@@ -1,3 +1,9 @@
+2016-01-04 Mike Frysinger <vapier@gentoo.org>
+
+ * simulator.c (MAX, MIN): Delete.
+ (do_vec_maxv): Change MAX to max and MIN to min.
+ (do_vec_fminmaxV): Likewise.
+
2016-01-04 Tristan Gingold <gingold@adacore.com>
* simulator.c: Remove syscall.h include.
diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index 84ce8e8..3315a2d 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -4108,9 +4108,6 @@ do_vec_XTN (sim_cpu *cpu)
}
}
-#define MAX(A,B) ((A) > (B) ? (A) : (B))
-#define MIN(A,B) ((A) < (B) ? (A) : (B))
-
static void
do_vec_maxv (sim_cpu *cpu)
{
@@ -4147,17 +4144,17 @@ do_vec_maxv (sim_cpu *cpu)
case 0:
smax = aarch64_get_vec_s8 (cpu, vs, 0);
for (i = 1; i < (full ? 16 : 8); i++)
- smax = MAX (smax, aarch64_get_vec_s8 (cpu, vs, i));
+ smax = max (smax, aarch64_get_vec_s8 (cpu, vs, i));
break;
case 1:
smax = aarch64_get_vec_s16 (cpu, vs, 0);
for (i = 1; i < (full ? 8 : 4); i++)
- smax = MAX (smax, aarch64_get_vec_s16 (cpu, vs, i));
+ smax = max (smax, aarch64_get_vec_s16 (cpu, vs, i));
break;
case 2:
smax = aarch64_get_vec_s32 (cpu, vs, 0);
for (i = 1; i < (full ? 4 : 2); i++)
- smax = MAX (smax, aarch64_get_vec_s32 (cpu, vs, i));
+ smax = max (smax, aarch64_get_vec_s32 (cpu, vs, i));
break;
default:
case 3:
@@ -4175,17 +4172,17 @@ do_vec_maxv (sim_cpu *cpu)
case 0:
smin = aarch64_get_vec_s8 (cpu, vs, 0);
for (i = 1; i < (full ? 16 : 8); i++)
- smin = MIN (smin, aarch64_get_vec_s8 (cpu, vs, i));
+ smin = min (smin, aarch64_get_vec_s8 (cpu, vs, i));
break;
case 1:
smin = aarch64_get_vec_s16 (cpu, vs, 0);
for (i = 1; i < (full ? 8 : 4); i++)
- smin = MIN (smin, aarch64_get_vec_s16 (cpu, vs, i));
+ smin = min (smin, aarch64_get_vec_s16 (cpu, vs, i));
break;
case 2:
smin = aarch64_get_vec_s32 (cpu, vs, 0);
for (i = 1; i < (full ? 4 : 2); i++)
- smin = MIN (smin, aarch64_get_vec_s32 (cpu, vs, i));
+ smin = min (smin, aarch64_get_vec_s32 (cpu, vs, i));
break;
default:
case 3:
@@ -4203,17 +4200,17 @@ do_vec_maxv (sim_cpu *cpu)
case 0:
umax = aarch64_get_vec_u8 (cpu, vs, 0);
for (i = 1; i < (full ? 16 : 8); i++)
- umax = MAX (umax, aarch64_get_vec_u8 (cpu, vs, i));
+ umax = max (umax, aarch64_get_vec_u8 (cpu, vs, i));
break;
case 1:
umax = aarch64_get_vec_u16 (cpu, vs, 0);
for (i = 1; i < (full ? 8 : 4); i++)
- umax = MAX (umax, aarch64_get_vec_u16 (cpu, vs, i));
+ umax = max (umax, aarch64_get_vec_u16 (cpu, vs, i));
break;
case 2:
umax = aarch64_get_vec_u32 (cpu, vs, 0);
for (i = 1; i < (full ? 4 : 2); i++)
- umax = MAX (umax, aarch64_get_vec_u32 (cpu, vs, i));
+ umax = max (umax, aarch64_get_vec_u32 (cpu, vs, i));
break;
default:
case 3:
@@ -4231,17 +4228,17 @@ do_vec_maxv (sim_cpu *cpu)
case 0:
umin = aarch64_get_vec_u8 (cpu, vs, 0);
for (i = 1; i < (full ? 16 : 8); i++)
- umin = MIN (umin, aarch64_get_vec_u8 (cpu, vs, i));
+ umin = min (umin, aarch64_get_vec_u8 (cpu, vs, i));
break;
case 1:
umin = aarch64_get_vec_u16 (cpu, vs, 0);
for (i = 1; i < (full ? 8 : 4); i++)
- umin = MIN (umin, aarch64_get_vec_u16 (cpu, vs, i));
+ umin = min (umin, aarch64_get_vec_u16 (cpu, vs, i));
break;
case 2:
umin = aarch64_get_vec_u32 (cpu, vs, 0);
for (i = 1; i < (full ? 4 : 2); i++)
- umin = MIN (umin, aarch64_get_vec_u32 (cpu, vs, i));
+ umin = min (umin, aarch64_get_vec_u32 (cpu, vs, i));
break;
default:
case 3:
@@ -4287,7 +4284,7 @@ do_vec_fminmaxV (sim_cpu *cpu)
case 3: /* FMINV. */
for (i = 1; i < 4; i++)
- res = MIN (res, aarch64_get_vec_float (cpu, vs, i));
+ res = min (res, aarch64_get_vec_float (cpu, vs, i));
break;
default:
@@ -4305,7 +4302,7 @@ do_vec_fminmaxV (sim_cpu *cpu)
case 3: /* FMAXV. */
for (i = 1; i < 4; i++)
- res = MAX (res, aarch64_get_vec_float (cpu, vs, i));
+ res = max (res, aarch64_get_vec_float (cpu, vs, i));
break;
default:
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog
index 7c16fde..d4a4f2c 100644
--- a/sim/bfin/ChangeLog
+++ b/sim/bfin/ChangeLog
@@ -1,5 +1,18 @@
2016-01-04 Mike Frysinger <vapier@gentoo.org>
+ * bfin-sim.c (decode_dsp32shift_0): Change MIN to min.
+ * dv-bfin_dma.c (bfin_dma_hw_event_callback): Likewise.
+ * dv-bfin_ebiu_amc.c (bfin_ebiu_amc_write_amgctl): Likewise.
+ * dv-bfin_emac.c (bfin_emac_dma_read_buffer): Change MAX to max.
+ * dv-bfin_mmu.c (_mmu_check_addr): Change MIN to min.
+ * dv-bfin_trace.c (bfin_trace_io_read_buffer): Likewise.
+ * interp.c (bfin_fdpic_load): Change MAX to max.
+ (bfin_fdpic_load): Likewise.
+ * sim-main.h (MIN, MAX): Delete.
+ (CLAMP): Change MIN to min and MAX to max.
+
+2016-01-04 Mike Frysinger <vapier@gentoo.org>
+
* configure: Regenerate.
2016-01-03 Mike Frysinger <vapier@gentoo.org>
diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 98efcb4..000a00f 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -5716,7 +5716,7 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
bu32 fg = DREG (src0);
bu32 bg = DREG (src1);
bu32 len = fg & 0x1f;
- bu32 mask = (1 << MIN (16, len)) - 1;
+ bu32 mask = (1 << min (16, len)) - 1;
bu32 fgnd = (fg >> 16) & mask;
int shft = ((fg >> 8) & 0x1f);
diff --git a/sim/bfin/dv-bfin_dma.c b/sim/bfin/dv-bfin_dma.c
index 6871782..577ee30 100644
--- a/sim/bfin/dv-bfin_dma.c
+++ b/sim/bfin/dv-bfin_dma.c
@@ -255,7 +255,7 @@ bfin_dma_hw_event_callback (struct hw *me, void *data)
/* XXX: This sucks performance wise. */
nr_bytes = dma->ele_size;
else
- nr_bytes = MIN (sizeof (buf), dma->curr_x_count * dma->ele_size);
+ nr_bytes = min (sizeof (buf), dma->curr_x_count * dma->ele_size);
/* Pumping a chunk! */
bfin_peer->dma_master = me;
diff --git a/sim/bfin/dv-bfin_ebiu_amc.c b/sim/bfin/dv-bfin_ebiu_amc.c
index c59154d..08dce04 100644
--- a/sim/bfin/dv-bfin_ebiu_amc.c
+++ b/sim/bfin/dv-bfin_ebiu_amc.c
@@ -81,8 +81,8 @@ bfin_ebiu_amc_write_amgctl (struct hw *me, struct bfin_ebiu_amc *amc,
{
bu32 amben_old, amben, addr, i;
- amben_old = MIN ((amc->amgctl >> 1) & 0x7, 4);
- amben = MIN ((amgctl >> 1) & 0x7, 4);
+ amben_old = min ((amc->amgctl >> 1) & 0x7, 4);
+ amben = min ((amgctl >> 1) & 0x7, 4);
HW_TRACE ((me, "reattaching banks: AMGCTL 0x%04x[%u] -> 0x%04x[%u]",
amc->amgctl, amben_old, amgctl, amben));
diff --git a/sim/bfin/dv-bfin_emac.c b/sim/bfin/dv-bfin_emac.c
index ec40bc5..fd3fcd3 100644
--- a/sim/bfin/dv-bfin_emac.c
+++ b/sim/bfin/dv-bfin_emac.c
@@ -413,7 +413,7 @@ bfin_emac_dma_read_buffer (struct hw *me, void *dest, int space,
if (ret < 0)
return 0;
ret += 4; /* include crc */
- pad_ret = MAX (ret + 4, 64);
+ pad_ret = max (ret + 4, 64);
len = pad_ret;
memcpy (dest, &len, 2);
diff --git a/sim/bfin/dv-bfin_mmu.c b/sim/bfin/dv-bfin_mmu.c
index ceb0e36..b951e9a 100644
--- a/sim/bfin/dv-bfin_mmu.c
+++ b/sim/bfin/dv-bfin_mmu.c
@@ -532,7 +532,7 @@ _mmu_check_addr (SIM_CPU *cpu, bu32 addr, bool write, bool inst, int size)
}
else
/* Normalize hit count so hits==2 is always multiple hit exception. */
- hits = MIN (2, hits);
+ hits = min (2, hits);
_mmu_log_fault (cpu, mmu, addr, write, inst, hits == 0, supv, dag1, faults);
diff --git a/sim/bfin/dv-bfin_trace.c b/sim/bfin/dv-bfin_trace.c
index 2c44d1d..ebb2ada 100644
--- a/sim/bfin/dv-bfin_trace.c
+++ b/sim/bfin/dv-bfin_trace.c
@@ -131,7 +131,7 @@ bfin_trace_io_read_buffer (struct hw *me, void *dest,
/* Hardware is limited to 16 entries, so to stay compatible with
software, limit the value to 16. For software algorithms that
keep reading while (TBUFSTAT != 0), they'll get all of it. */
- value = MIN (TBUF_LEN (trace), 16);
+ value = min (TBUF_LEN (trace), 16);
break;
case mmr_offset(tbuf):
{
diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index ad86500..accf5f3 100644
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -915,7 +915,7 @@ bfin_fdpic_load (SIM_DESC sd, SIM_CPU *cpu, struct bfd *abfd, bu32 *sp,
free (data);
- max_load_addr = MAX (paddr + memsz, max_load_addr);
+ max_load_addr = max (paddr + memsz, max_load_addr);
*sp -= 12;
sim_write (sd, *sp+0, (void *)&paddr, 4); /* loadseg.addr */
@@ -946,7 +946,7 @@ bfin_fdpic_load (SIM_DESC sd, SIM_CPU *cpu, struct bfd *abfd, bu32 *sp,
}
/* Update the load offset with a few extra pages. */
- fdpic_load_offset = ALIGN (MAX (max_load_addr, fdpic_load_offset), 0x10000);
+ fdpic_load_offset = ALIGN (max (max_load_addr, fdpic_load_offset), 0x10000);
fdpic_load_offset += 0x10000;
/* Push the summary loadmap info onto the stack last. */
diff --git a/sim/bfin/sim-main.h b/sim/bfin/sim-main.h
index 8804a71..51fb87e 100644
--- a/sim/bfin/sim-main.h
+++ b/sim/bfin/sim-main.h
@@ -56,13 +56,9 @@ struct sim_state {
#include "sim-options.h"
#include "dv-bfin_trace.h"
-#undef MAX
-#undef MIN
#undef CLAMP
#undef ALIGN
-#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-#define CLAMP(a, b, c) MIN (MAX (a, b), c)
+#define CLAMP(a, b, c) min (max (a, b), c)
#define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
/* TODO: Move all this trace logic to the common code. */
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index e0eebb2..f8cdbf4 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,5 +1,14 @@
2016-01-04 Mike Frysinger <vapier@gentoo.org>
+ * cgen-scache.c (MAX): Delete.
+ (scache_init): Change MAX to max.
+ * cgen-trace.c (min): Delete.
+ * cgen-utils.c (min): Delete.
+ * sim-basics.h [!min] (min): Define.
+ [!max] (max): Define.
+
+2016-01-04 Mike Frysinger <vapier@gentoo.org>
+
* sim-options.c (sim_parse_args): Tweak getopt error message.
2016-01-04 Mike Frysinger <vapier@gentoo.org>
diff --git a/sim/common/cgen-scache.c b/sim/common/cgen-scache.c
index e0c3570..3a79514 100644
--- a/sim/common/cgen-scache.c
+++ b/sim/common/cgen-scache.c
@@ -27,8 +27,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-options.h"
#include "sim-io.h"
-#define MAX(a,b) ((a) > (b) ? (a) : (b))
-
/* Unused address. */
#define UNUSED_ADDR 0xffffffff
@@ -212,7 +210,7 @@ scache_init (SIM_DESC sd)
#if WITH_SCACHE_PBB
CPU_SCACHE_MAX_CHAIN_LENGTH (cpu) = MAX_CHAIN_LENGTH;
CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu) = MAX_HASH_CHAIN_LENGTH;
- CPU_SCACHE_NUM_HASH_CHAINS (cpu) = MAX (MIN_HASH_CHAINS,
+ CPU_SCACHE_NUM_HASH_CHAINS (cpu) = max (MIN_HASH_CHAINS,
CPU_SCACHE_SIZE (cpu)
/ SCACHE_HASH_RATIO);
CPU_SCACHE_HASH_TABLE (cpu) =
diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c
index 5adc552..2332df4 100644
--- a/sim/common/cgen-trace.c
+++ b/sim/common/cgen-trace.c
@@ -24,9 +24,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "sim-fpu.h"
-#undef min
-#define min(a,b) ((a) < (b) ? (a) : (b))
-
#ifndef SIZE_INSTRUCTION
#define SIZE_INSTRUCTION 16
#endif
diff --git a/sim/common/cgen-utils.c b/sim/common/cgen-utils.c
index b16a608..d17fb42 100644
--- a/sim/common/cgen-utils.c
+++ b/sim/common/cgen-utils.c
@@ -28,9 +28,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#define SEMOPS_DEFINE_INLINE
#include "cgen-ops.h"
-#undef min
-#define min(a,b) ((a) < (b) ? (a) : (b))
-
const char *mode_names[] = {
"VOID",
"BI",
diff --git a/sim/common/sim-basics.h b/sim/common/sim-basics.h
index e0cb6d1..16c7eb5 100644
--- a/sim/common/sim-basics.h
+++ b/sim/common/sim-basics.h
@@ -48,6 +48,13 @@ extern int asprintf (char **result, const char *format, ...);
#endif
+#ifndef min
+#define min(a, b) ((a) < (b) ? (a) : (b))
+#endif
+#ifndef max
+#define max(a, b) ((a) > (b) ? (a) : (b))
+#endif
+
/* Some versions of GCC include an attribute operator, define it */
generated by cgit v1.1 at 2024-07-07 08:13:55 +0000