diff options
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/cgen-dis.in | 8 | ||||
| -rw-r--r-- | opcodes/fr30-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/frv-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/ip2k-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/iq2000-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/lm32-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/m32c-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/m32r-desc.c | 19 | ||||
| -rw-r--r-- | opcodes/m32r-desc.h | 5 | ||||
| -rw-r--r-- | opcodes/m32r-dis.c | 65 | ||||
| -rw-r--r-- | opcodes/mep-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/mt-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/openrisc-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/xc16x-dis.c | 85 | ||||
| -rw-r--r-- | opcodes/xstormy16-dis.c | 8 |
16 files changed, 119 insertions, 150 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 06d1cd8..5253c33 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,12 @@ 2010-02-11 Doug Evans <dje@sebabeach.org> + * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL. + (print_address): Delete CGEN_PRINT_ADDRESS. + * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c, + * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h, + * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c, + * xc16x-dis.c, * xstormy16-dis.c: Regenerate. + * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * frv-desc.c, * frv-desc.h, * frv-opc.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in index 5b3617d..0941853 100644 --- a/opcodes/cgen-dis.in +++ b/opcodes/cgen-dis.in @@ -70,10 +70,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -95,10 +91,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index d10f58c..d998dac 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -330,10 +330,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -355,10 +351,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index c90f823..ff9a57d 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -427,10 +427,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -452,10 +448,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c index c9b8781..10d94da 100644 --- a/opcodes/ip2k-dis.c +++ b/opcodes/ip2k-dis.c @@ -319,10 +319,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -344,10 +340,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c index 788b8d3..a4f27fa 100644 --- a/opcodes/iq2000-dis.c +++ b/opcodes/iq2000-dis.c @@ -220,10 +220,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -245,10 +241,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c index e30af57..884a572 100644 --- a/opcodes/lm32-dis.c +++ b/opcodes/lm32-dis.c @@ -178,10 +178,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -203,10 +199,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c index 188d51b..7283333 100644 --- a/opcodes/m32c-dis.c +++ b/opcodes/m32c-dis.c @@ -922,10 +922,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -947,10 +943,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c index 0aa757f..599cc9f 100644 --- a/opcodes/m32r-desc.c +++ b/opcodes/m32r-desc.c @@ -105,7 +105,6 @@ const CGEN_ATTR_TABLE m32r_cgen_operand_attr_table[] = { "RELAX", &bool_attr[0], &bool_attr[0] }, { "SEM-ONLY", &bool_attr[0], &bool_attr[0] }, { "RELOC", &bool_attr[0], &bool_attr[0] }, - { "HASH-PREFIX", &bool_attr[0], &bool_attr[0] }, { 0, 0, 0 } }; @@ -342,35 +341,35 @@ const CGEN_OPERAND m32r_cgen_operand_table[] = /* simm8: 8 bit signed immediate */ { "simm8", M32R_OPERAND_SIMM8, HW_H_SINT, 8, 8, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_SIMM8] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* simm16: 16 bit signed immediate */ { "simm16", M32R_OPERAND_SIMM16, HW_H_SINT, 16, 16, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_SIMM16] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* uimm3: 3 bit unsigned number */ { "uimm3", M32R_OPERAND_UIMM3, HW_H_UINT, 5, 3, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_UIMM3] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* uimm4: 4 bit trap number */ { "uimm4", M32R_OPERAND_UIMM4, HW_H_UINT, 12, 4, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_UIMM4] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* uimm5: 5 bit shift count */ { "uimm5", M32R_OPERAND_UIMM5, HW_H_UINT, 11, 5, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_UIMM5] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* uimm8: 8 bit unsigned immediate */ { "uimm8", M32R_OPERAND_UIMM8, HW_H_UINT, 8, 8, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_UIMM8] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* uimm16: 16 bit unsigned immediate */ { "uimm16", M32R_OPERAND_UIMM16, HW_H_UINT, 16, 16, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_UIMM16] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } }, + { 0, { { { (1<<MACH_BASE), 0 } } } } }, /* imm1: 1 bit immediate */ { "imm1", M32R_OPERAND_IMM1, HW_H_UINT, 15, 1, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_IMM1] } }, - { 0|A(HASH_PREFIX), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } } } } }, + { 0, { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } } } } }, /* accd: accumulator destination register */ { "accd", M32R_OPERAND_ACCD, HW_H_ACCUMS, 4, 2, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_ACCD] } }, @@ -402,7 +401,7 @@ const CGEN_OPERAND m32r_cgen_operand_table[] = /* uimm24: 24 bit address */ { "uimm24", M32R_OPERAND_UIMM24, HW_H_ADDR, 8, 24, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_UIMM24] } }, - { 0|A(HASH_PREFIX)|A(RELOC)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } }, + { 0|A(RELOC)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } }, /* disp8: 8 bit displacement */ { "disp8", M32R_OPERAND_DISP8, HW_H_IADDR, 8, 8, { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP8] } }, diff --git a/opcodes/m32r-desc.h b/opcodes/m32r-desc.h index ac35958..38abf10 100644 --- a/opcodes/m32r-desc.h +++ b/opcodes/m32r-desc.h @@ -190,8 +190,8 @@ typedef enum cgen_hw_type { typedef enum cgen_operand_attr { CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY - , CGEN_OPERAND_RELOC, CGEN_OPERAND_HASH_PREFIX, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31 - , CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS + , CGEN_OPERAND_RELOC, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH + , CGEN_OPERAND_END_NBOOLS } CGEN_OPERAND_ATTR; /* Number of non-boolean elements in cgen_operand_attr. */ @@ -208,7 +208,6 @@ typedef enum cgen_operand_attr { #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) #define CGEN_ATTR_CGEN_OPERAND_RELOC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELOC)) != 0) -#define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0) /* Enum declaration for m32r operand types. */ typedef enum cgen_operand_type { diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 4e008dc..25b4127 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -59,15 +59,38 @@ static int read_insn /* -- disassembler routines inserted here. */ /* -- dis.c */ -/* Immediate values are prefixed with '#'. */ -#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ - do \ - { \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ - (*info->fprintf_func) (info->stream, "#"); \ - } \ - while (0) +/* Print signed operands with '#' prefixes. */ + +static void +print_signed_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "#"); + (*info->fprintf_func) (info->stream, "%ld", value); +} + +/* Print unsigned operands with '#' prefixes. */ + +static void +print_unsigned_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "#"); + (*info->fprintf_func) (info->stream, "0x%lx", value); +} /* Handle '#' prefixes as operands. */ @@ -206,16 +229,16 @@ m32r_cgen_print_operand (CGEN_CPU_DESC cd, print_normal (cd, info, fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); break; case M32R_OPERAND_IMM1 : - print_normal (cd, info, fields->f_imm1, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_unsigned_with_hash_prefix (cd, info, fields->f_imm1, 0, pc, length); break; case M32R_OPERAND_SCR : print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r2, 0); break; case M32R_OPERAND_SIMM16 : - print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_signed_with_hash_prefix (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); break; case M32R_OPERAND_SIMM8 : - print_normal (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_signed_with_hash_prefix (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); break; case M32R_OPERAND_SLO16 : print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); @@ -230,22 +253,22 @@ m32r_cgen_print_operand (CGEN_CPU_DESC cd, print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r2, 0); break; case M32R_OPERAND_UIMM16 : - print_normal (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_unsigned_with_hash_prefix (cd, info, fields->f_uimm16, 0, pc, length); break; case M32R_OPERAND_UIMM24 : - print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); + print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); break; case M32R_OPERAND_UIMM3 : - print_normal (cd, info, fields->f_uimm3, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_unsigned_with_hash_prefix (cd, info, fields->f_uimm3, 0, pc, length); break; case M32R_OPERAND_UIMM4 : - print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_unsigned_with_hash_prefix (cd, info, fields->f_uimm4, 0, pc, length); break; case M32R_OPERAND_UIMM5 : - print_normal (cd, info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_unsigned_with_hash_prefix (cd, info, fields->f_uimm5, 0, pc, length); break; case M32R_OPERAND_UIMM8 : - print_normal (cd, info, fields->f_uimm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); + print_unsigned_with_hash_prefix (cd, info, fields->f_uimm8, 0, pc, length); break; case M32R_OPERAND_ULO16 : print_normal (cd, info, fields->f_uimm16, 0, pc, length); @@ -287,10 +310,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -312,10 +331,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c index 56c4d56..e0f2616 100644 --- a/opcodes/mep-dis.c +++ b/opcodes/mep-dis.c @@ -1223,10 +1223,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -1248,10 +1244,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c index f06a98f..28f4655 100644 --- a/opcodes/mt-dis.c +++ b/opcodes/mt-dis.c @@ -321,10 +321,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -346,10 +342,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/openrisc-dis.c b/opcodes/openrisc-dis.c index 31a327c..2c442f9 100644 --- a/opcodes/openrisc-dis.c +++ b/opcodes/openrisc-dis.c @@ -166,10 +166,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -191,10 +187,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c index 1880ce7..09bb73b 100644 --- a/opcodes/xc16x-dis.c +++ b/opcodes/xc16x-dis.c @@ -60,17 +60,62 @@ static int read_insn /* -- dis.c */ -#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ - do \ - { \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \ - info->fprintf_func (info->stream, "."); \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \ - info->fprintf_func (info->stream, "#pof:"); \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \ - info->fprintf_func (info->stream, "#pag:"); \ - } \ - while (0) +/* Print an operand with a "." prefix. + NOTE: This prints the operand in hex. + ??? This exists to maintain disassembler compatibility with previous + versions. Ideally we'd print the "." in print_dot. */ + +static void +print_with_dot_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + info->fprintf_func (info->stream, "."); + info->fprintf_func (info->stream, "0x%lx", value); +} + +/* Print an operand with a "#pof:" prefix. + NOTE: This prints the operand as an address. + ??? This exists to maintain disassembler compatibility with previous + versions. Ideally we'd print "#pof:" in print_pof. */ + +static void +print_with_pof_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + bfd_vma value, + unsigned attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + info->fprintf_func (info->stream, "#pof:"); + info->fprintf_func (info->stream, "0x%lx", (long) value); +} + +/* Print an operand with a "#pag:" prefix. + NOTE: This prints the operand in hex. + ??? This exists to maintain disassembler compatibility with previous + versions. Ideally we'd print "#pag:" in print_pag. */ + +static void +print_with_pag_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + info->fprintf_func (info->stream, "#pag:"); + info->fprintf_func (info->stream, "0x%lx", value); +} /* Print a 'pof:' prefix to an operand. */ @@ -271,13 +316,13 @@ xc16x_cgen_print_operand (CGEN_CPU_DESC cd, print_pof (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); break; case XC16X_OPERAND_QBIT : - print_normal (cd, info, fields->f_qbit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length); + print_with_dot_prefix (cd, info, fields->f_qbit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length); break; case XC16X_OPERAND_QHIBIT : - print_normal (cd, info, fields->f_qhibit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length); + print_with_dot_prefix (cd, info, fields->f_qhibit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length); break; case XC16X_OPERAND_QLOBIT : - print_normal (cd, info, fields->f_qlobit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length); + print_with_dot_prefix (cd, info, fields->f_qlobit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length); break; case XC16X_OPERAND_REG8 : print_keyword (cd, info, & xc16x_cgen_opval_r8_names, fields->f_reg8, 0); @@ -355,10 +400,10 @@ xc16x_cgen_print_operand (CGEN_CPU_DESC cd, print_normal (cd, info, fields->f_uimm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length); break; case XC16X_OPERAND_UPAG16 : - print_normal (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_PAG_PREFIX), pc, length); + print_with_pag_prefix (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_PAG_PREFIX), pc, length); break; case XC16X_OPERAND_UPOF16 : - print_address (cd, info, fields->f_memory, 0|(1<<CGEN_OPERAND_POF_PREFIX), pc, length); + print_with_pof_prefix (cd, info, fields->f_memory, 0|(1<<CGEN_OPERAND_POF_PREFIX), pc, length); break; case XC16X_OPERAND_USEG16 : print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SEG_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); @@ -406,10 +451,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -431,10 +472,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c index d17a060..af81ab4 100644 --- a/opcodes/xstormy16-dis.c +++ b/opcodes/xstormy16-dis.c @@ -199,10 +199,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -224,10 +220,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ |