diff options
| -rw-r--r-- | sim/cr16/ChangeLog | 33 | ||||
| -rw-r--r-- | sim/cr16/Makefile.in | 6 | ||||
| -rw-r--r-- | sim/cr16/endian.c | 21 | ||||
| -rw-r--r-- | sim/cr16/gencode.c | 25 | ||||
| -rw-r--r-- | sim/cr16/interp.c | 61 | ||||
| -rw-r--r-- | sim/cr16/simops.c | 851 |
6 files changed, 509 insertions, 488 deletions
diff --git a/sim/cr16/ChangeLog b/sim/cr16/ChangeLog index 5a52cba..20ac0b1 100644 --- a/sim/cr16/ChangeLog +++ b/sim/cr16/ChangeLog @@ -1,5 +1,38 @@ 2015-03-29 Mike Frysinger <vapier@gentoo.org> + * Makefile.in (gencode.o, cr16-opc.o): Add $(WARN_CFLAGS). + (gencode): Add $(BUILD_LDFLAGS). + * endian.c (get_word, get_longword, get_longlong, write_word, + write_longword, write_longlong): Convert old style prototypes. + * gencode.c: Include string.h. + (write_header): Convert old style prototype and fix printf format. + (write_template, write_opcodes): Likewise. + (check_opcodes): Mark static void and put behind #if 0. + * interp.c: Include inttypes.h and run-sim.h. + (add_commas): Delete prototype. + (decode_pc): Convert old style prototype. + (do_run): Change h->op compare to 0. + (add_commas, set_dmap_register, set_imap_register, HELD_SPI_IDX, + HELD_SPU_IDX, spu_register, spi_register, set_spi_register, + set_spu_register): Wrap in #if 0. + (sim_write, sim_read, sim_close, sim_stop, sim_set_callbacks, + sim_stop_reason, sim_fetch_register, sim_store_register, + sim_do_command): Convert old style prototypes. + (sim_create_inferior): Fix pointer cast to use uintptr_t. + * simops.c [HAVE_TIME_H]: Include time.h. + [HAVE_SYS_TIME_H]: Include sys/time.h. + [TARGET_SYS_utime]: Include utime.h. + [TARGET_SYS_wait]: Include sys/wait.h. + (strrchr): Delete prototype. + (cond_stat): Mark static. + (trace_input_func): Mark name static. + (trace_input_func, trace_output_void, trace_output_flag): Convert old style prototypes. + (trace_output_40): Wrap in #if 0. + (OP_*): Convert old style prototypes. Move trace_input call below + all variable decls. Initialize tmp to 0 when appropriate. + +2015-03-29 Mike Frysinger <vapier@gentoo.org> + * Makefile.in (SIM_EXTRA_CFLAGS): Delete -DSIM_HAVE_ENVIRONMENT. (interp.o, simops.o, endian.o, table.o): Delete rules. * configure.ac: Call SIM_AC_OPTION_ENDIAN, SIM_AC_OPTION_ALIGNMENT, diff --git a/sim/cr16/Makefile.in b/sim/cr16/Makefile.in index 63b85b9..de85cf8 100644 --- a/sim/cr16/Makefile.in +++ b/sim/cr16/Makefile.in @@ -39,13 +39,13 @@ table.c: gencode simops.h ./gencode >$@ gencode.o: gencode.c $(INCLUDE) - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c + $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(WARN_CFLAGS) -c $(srcdir)/gencode.c cr16-opc.o: $(srcdir)/../../opcodes/cr16-opc.c - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/cr16-opc.c + $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(WARN_CFLAGS) -c $(srcdir)/../../opcodes/cr16-opc.c gencode: gencode.o cr16-opc.o - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o cr16-opc.o $(BUILD_LIB) + $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o gencode gencode.o cr16-opc.o $(BUILD_LIB) clean-extra: rm -f table.c simops.h gencode diff --git a/sim/cr16/endian.c b/sim/cr16/endian.c index 4a4e9c2..3cf2f22 100644 --- a/sim/cr16/endian.c +++ b/sim/cr16/endian.c @@ -28,22 +28,19 @@ #endif ENDIAN_INLINE uint16 -get_word (x) - uint8 *x; +get_word (uint8 *x) { return *(uint16 *)x; } ENDIAN_INLINE uint32 -get_longword (x) - uint8 *x; +get_longword (uint8 *x) { return (((uint32) *(uint16 *)x) << 16) | ((uint32) *(uint16 *)(x+2)); } ENDIAN_INLINE int64 -get_longlong (x) - uint8 *x; +get_longlong (uint8 *x) { uint32 top = get_longword (x); uint32 bottom = get_longword (x+4); @@ -51,9 +48,7 @@ get_longlong (x) } ENDIAN_INLINE void -write_word (addr, data) - uint8 *addr; - uint16 data; +write_word (uint8 *addr, uint16 data) { addr[1] = (data >> 8) & 0xff; addr[0] = data & 0xff; @@ -61,18 +56,14 @@ write_word (addr, data) } ENDIAN_INLINE void -write_longword (addr, data) - uint8 *addr; - uint32 data; +write_longword (uint8 *addr, uint32 data) { *(uint16 *)(addr + 2) = (uint16)(data >> 16); *(uint16 *)(addr) = (uint16)data; } ENDIAN_INLINE void -write_longlong (addr, data) - uint8 *addr; - int64 data; +write_longlong (uint8 *addr, int64 data) { write_longword (addr+4, (uint32)(data >> 32)); write_longword (addr, (uint32)data); diff --git a/sim/cr16/gencode.c b/sim/cr16/gencode.c index 5078b01..3065ebf 100644 --- a/sim/cr16/gencode.c +++ b/sim/cr16/gencode.c @@ -22,6 +22,7 @@ #include <stdio.h> #include <ctype.h> #include <limits.h> +#include <string.h> #include "ansidecl.h" #include "opcode/cr16.h" @@ -43,7 +44,7 @@ main (int argc, char *argv[]) static void -write_header () +write_header (void) { int i = 0; @@ -52,9 +53,8 @@ write_header () /* Loop over instruction table until a full match is found. */ for ( ; i < NUMOPCODES; i++) - { - printf("void OP_%X_%X (void);\t\t/* %s */\n",cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits), cr16_instruction[i].mnemonic); - } + printf("void OP_%lX_%X (void);\t\t/* %s */\n", cr16_instruction[i].match, + (32 - cr16_instruction[i].match_bits), cr16_instruction[i].mnemonic); } @@ -62,7 +62,7 @@ write_header () ready to be filled out. */ static void -write_template () +write_template (void) { int i = 0,j, k, flags; @@ -73,7 +73,8 @@ write_template () { if (cr16_instruction[i].size != 0) { - printf("/* %s */\nvoid\nOP_%X_%X ()\n{\n",cr16_instruction[i].mnemonic,cr16_instruction[i].match,(32 - cr16_instruction[i].match_bits)); + printf("/* %s */\nvoid\nOP_%lX_%X ()\n{\n", cr16_instruction[i].mnemonic, + cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits)); /* count operands. */ j = 0; @@ -110,18 +111,20 @@ write_template () long Opcodes[512]; static int curop=0; +#if 0 +static void check_opcodes( long op) { int i; for (i=0;i<curop;i++) if (Opcodes[i] == op) - fprintf(stderr,"DUPLICATE OPCODES: %x\n",op); + fprintf(stderr,"DUPLICATE OPCODES: %lx\n", op); } - +#endif static void -write_opcodes () +write_opcodes (void) { int i = 0, j = 0, k; @@ -134,7 +137,7 @@ write_opcodes () { if (cr16_instruction[i].size != 0) { - printf (" { \"%s\", %ld, %d, %d, %d, \"OP_%X_%X\", OP_%X_%X, ", + printf (" { \"%s\", %u, %d, %ld, %u, \"OP_%lX_%X\", OP_%lX_%X, ", cr16_instruction[i].mnemonic, cr16_instruction[i].size, cr16_instruction[i].match_bits, cr16_instruction[i].match, cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), @@ -170,5 +173,5 @@ write_opcodes () printf ("},\n"); } } - printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{0,0,0}},\n};\n"); + printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{{0,0},{0,0},{0,0},{0,0}}},\n};\n"); } diff --git a/sim/cr16/interp.c b/sim/cr16/interp.c index b6ded50..338d9b7 100644 --- a/sim/cr16/interp.c +++ b/sim/cr16/interp.c @@ -18,12 +18,14 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include "config.h" +#include <inttypes.h> #include <signal.h> #include <stdlib.h> #include <string.h> #include "bfd.h" #include "gdb/callback.h" #include "gdb/remote-sim.h" +#include "run-sim.h" #include "cr16_sim.h" #include "gdb/sim-cr16.h" @@ -55,7 +57,6 @@ bfd_vma text_end; static struct hash_entry *lookup_hash (uint64 ins, int size); static void get_operands (operand_desc *s, uint64 mcode, int isize, int nops); static int do_run (uint64 mc); -static char *add_commas (char *buf, int sizeof_buf, unsigned long value); extern void sim_set_profile (int n); extern void sim_set_profile_size (int n); static INLINE uint8 *map_memory (unsigned phys_addr); @@ -363,7 +364,7 @@ get_operands (operand_desc *s, uint64 ins, int isize, int nops) } bfd_vma -decode_pc () +decode_pc (void) { asection *s; if (!init_text_p && prog_bfd != NULL) @@ -398,7 +399,8 @@ do_run(uint64 mcode) h = lookup_hash(mcode, 1); - if ((h == NULL) || (h->opcode == NULL)) return 0; + if ((h == NULL) || (h->opcode == 0)) + return 0; if (h->size == 3) { @@ -424,6 +426,7 @@ do_run(uint64 mcode) return h->size; } +#if 0 static char * add_commas(char *buf, int sizeof_buf, unsigned long value) { @@ -443,6 +446,7 @@ add_commas(char *buf, int sizeof_buf, unsigned long value) return endbuf; } +#endif void sim_size (int power) @@ -481,6 +485,7 @@ enum DMAP2_OFFSET = 0xff0c }; +#if 0 static void set_dmap_register (int reg_nr, unsigned long value) { @@ -495,6 +500,7 @@ set_dmap_register (int reg_nr, unsigned long value) } #endif } +#endif static unsigned long dmap_register (void *regcache, int reg_nr) @@ -504,6 +510,7 @@ dmap_register (void *regcache, int reg_nr) return READ_16 (raw); } +#if 0 static void set_imap_register (int reg_nr, unsigned long value) { @@ -518,6 +525,7 @@ set_imap_register (int reg_nr, unsigned long value) } #endif } +#endif static unsigned long imap_register (void *regcache, int reg_nr) @@ -527,6 +535,7 @@ imap_register (void *regcache, int reg_nr) return READ_16 (raw); } +#if 0 enum { HELD_SPI_IDX = 0, @@ -556,6 +565,7 @@ set_spu_register (unsigned long value) { SET_GPR (SP_IDX, value); } +#endif /* Given a virtual address in the DMAP address space, translate it into a physical address. */ @@ -882,22 +892,14 @@ xfer_mem (SIM_ADDR virt, int -sim_write (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - const unsigned char *buffer; - int size; +sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size) { /* FIXME: this should be performing a virtual transfer */ return xfer_mem( addr, buffer, size, 1); } int -sim_read (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; +sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) { /* FIXME: this should be performing a virtual transfer */ return xfer_mem( addr, buffer, size, 0); @@ -1052,9 +1054,7 @@ sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback, struct bfd void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; +sim_close (SIM_DESC sd, int quitting) { if (prog_bfd != NULL && prog_bfd_was_opened_p) { @@ -1138,8 +1138,7 @@ imem_addr (uint32 offset) static int stop_simulator = 0; int -sim_stop (sd) - SIM_DESC sd; +sim_stop (SIM_DESC sd) { stop_simulator = 1; return 1; @@ -1368,7 +1367,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env) bfd_vma start_address; /* reset all state information */ - memset (&State.regs, 0, (int)&State.mem - (int)&State.regs); + memset (&State.regs, 0, (uintptr_t)&State.mem - (uintptr_t)&State.regs); /* There was a hack here to copy the values of argc and argv into r0 and r1. The values were also saved into some high memory that @@ -1395,8 +1394,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env) void -sim_set_callbacks (p) - host_callback *p; +sim_set_callbacks (host_callback *p) { cr16_callback = p; } @@ -1410,10 +1408,7 @@ sim_trace (SIM_DESC sd) } void -sim_stop_reason (sd, reason, sigrc) - SIM_DESC sd; - enum sim_stop *reason; - int *sigrc; +sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc) { /* (*cr16_callback->printf_filtered) (cr16_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */ @@ -1452,11 +1447,7 @@ sim_stop_reason (sd, reason, sigrc) } int -sim_fetch_register (sd, rn, memory, length) - SIM_DESC sd; - int rn; - unsigned char *memory; - int length; +sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) { int size; switch ((enum sim_cr16_regs) rn) @@ -1507,11 +1498,7 @@ sim_fetch_register (sd, rn, memory, length) } int -sim_store_register (sd, rn, memory, length) - SIM_DESC sd; - int rn; - unsigned char *memory; - int length; +sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) { int size; switch ((enum sim_cr16_regs) rn) @@ -1567,9 +1554,7 @@ sim_complete_command (SIM_DESC sd, const char *text, const char *word) } void -sim_do_command (sd, cmd) - SIM_DESC sd; - const char *cmd; +sim_do_command (SIM_DESC sd, const char *cmd) { (*cr16_callback->printf_filtered) (cr16_callback, "sim_do_command: %s\n",cmd); } diff --git a/sim/cr16/simops.c b/sim/cr16/simops.c index 1f6a4f8..3773bf7 100644 --- a/sim/cr16/simops.c +++ b/sim/cr16/simops.c @@ -30,12 +30,23 @@ #ifdef HAVE_STRING_H #include <string.h> #endif +#ifdef HAVE_TIME_H +#include <time.h> +#endif +#ifdef HAVE_SYS_TIME_H +#include <sys/time.h> +#endif #include "cr16_sim.h" #include "simops.h" #include "targ-vals.h" -extern char *strrchr (); +#ifdef TARGET_SYS_utime +#include <utime.h> +#endif +#ifdef TARGET_SYS_wait +#include <sys/wait.h> +#endif enum op_types { OP_VOID, @@ -127,7 +138,7 @@ enum { * LT Less Than Z and N flags are 0 * GE Greater Than or Equal To Z or N flag is 1. */ -int cond_stat(int cc) +static int cond_stat(int cc) { switch (cc) { @@ -189,7 +200,7 @@ move_to_cr (int cr, creg_t mask, creg_t val, int psw_hw_p) } #ifdef DEBUG -static void trace_input_func (char *name, +static void trace_input_func (const char *name, enum op_types in1, enum op_types in2, enum op_types in3); @@ -221,11 +232,7 @@ static void trace_input_func (char *name, #endif static void -trace_input_func (name, in1, in2, in3) - char *name; - enum op_types in1; - enum op_types in2; - enum op_types in3; +trace_input_func (const char *name, enum op_types in1, enum op_types in2, enum op_types in3) { char *comma; enum op_types in[3]; @@ -449,6 +456,7 @@ do_trace_output_finish (void) (*cr16_callback->flush_stdout) (cr16_callback); } +#if 0 static void trace_output_40 (uint64 val) { @@ -463,6 +471,7 @@ trace_output_40 (uint64 val) do_trace_output_finish (); } } +#endif static void trace_output_32 (uint32 val) @@ -493,7 +502,7 @@ trace_output_16 (uint16 val) } static void -trace_output_void () +trace_output_void (void) { if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) { @@ -503,7 +512,7 @@ trace_output_void () } static void -trace_output_flag () +trace_output_flag (void) { if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) { @@ -525,7 +534,7 @@ trace_output_flag () /* addub. */ void -OP_2C_8 () +OP_2C_8 (void) { uint8 tmp; uint8 a = OP[0] & 0xff; @@ -538,7 +547,7 @@ OP_2C_8 () /* addub. */ void -OP_2CB_C () +OP_2CB_C (void) { uint16 tmp; uint8 a = ((OP[0]) & 0xff), b = (GPR (OP[1])) & 0xff; @@ -550,7 +559,7 @@ OP_2CB_C () /* addub. */ void -OP_2D_8 () +OP_2D_8 (void) { uint8 a = (GPR (OP[0])) & 0xff; uint8 b = (GPR (OP[1])) & 0xff; @@ -562,7 +571,7 @@ OP_2D_8 () /* adduw. */ void -OP_2E_8 () +OP_2E_8 (void) { uint16 a = OP[0]; uint16 b = GPR (OP[1]); @@ -574,7 +583,7 @@ OP_2E_8 () /* adduw. */ void -OP_2EB_C () +OP_2EB_C (void) { uint16 a = OP[0]; uint16 b = GPR (OP[1]); @@ -586,7 +595,7 @@ OP_2EB_C () /* adduw. */ void -OP_2F_8 () +OP_2F_8 (void) { uint16 a = GPR (OP[0]); uint16 b = GPR (OP[1]); @@ -598,12 +607,12 @@ OP_2F_8 () /* addb. */ void -OP_30_8 () +OP_30_8 (void) { uint8 a = OP[0]; uint8 b = (GPR (OP[1]) & 0xff); - trace_input ("addb", OP_CONSTANT4_1, OP_REG, OP_VOID); uint16 tmp = (a + b) & 0xff; + trace_input ("addb", OP_CONSTANT4_1, OP_REG, OP_VOID); SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00))); SET_PSR_C (tmp > 0xFF); SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80))); @@ -612,12 +621,12 @@ OP_30_8 () /* addb. */ void -OP_30B_C () +OP_30B_C (void) { uint8 a = (OP[0]) & 0xff; uint8 b = (GPR (OP[1]) & 0xff); - trace_input ("addb", OP_CONSTANT16, OP_REG, OP_VOID); uint16 tmp = (a + b) & 0xff; + trace_input ("addb", OP_CONSTANT16, OP_REG, OP_VOID); SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00))); SET_PSR_C (tmp > 0xFF); SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80))); @@ -626,12 +635,12 @@ OP_30B_C () /* addb. */ void -OP_31_8 () +OP_31_8 (void) { uint8 a = (GPR (OP[0]) & 0xff); uint8 b = (GPR (OP[1]) & 0xff); - trace_input ("addb", OP_REG, OP_REG, OP_VOID); uint16 tmp = (a + b) & 0xff; + trace_input ("addb", OP_REG, OP_REG, OP_VOID); SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00))); SET_PSR_C (tmp > 0xFF); SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80))); @@ -640,12 +649,12 @@ OP_31_8 () /* addw. */ void -OP_32_8 () +OP_32_8 (void) { int16 a = OP[0]; uint16 tmp, b = GPR (OP[1]); - trace_input ("addw", OP_CONSTANT4_1, OP_REG, OP_VOID); tmp = (a + b); + trace_input ("addw", OP_CONSTANT4_1, OP_REG, OP_VOID); SET_GPR (OP[1], tmp); SET_PSR_C (tmp > 0xFFFF); SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000))); @@ -654,7 +663,7 @@ OP_32_8 () /* addw. */ void -OP_32B_C () +OP_32B_C (void) { int16 a = OP[0]; uint16 tmp, b = GPR (OP[1]); @@ -668,7 +677,7 @@ OP_32B_C () /* addw. */ void -OP_33_8 () +OP_33_8 (void) { uint16 tmp, a = (GPR (OP[0])), b = (GPR (OP[1])); trace_input ("addw", OP_REG, OP_REG, OP_VOID); @@ -681,7 +690,7 @@ OP_33_8 () /* addcb. */ void -OP_34_8 () +OP_34_8 (void) { uint8 tmp, a = OP[0] & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("addcb", OP_CONSTANT4_1, OP_REG, OP_REG); @@ -694,12 +703,12 @@ OP_34_8 () /* addcb. */ void -OP_34B_C () +OP_34B_C (void) { int8 a = OP[0] & 0xff; uint8 b = (GPR (OP[1])) & 0xff; - trace_input ("addcb", OP_CONSTANT16, OP_REG, OP_VOID); uint8 tmp = (a + b + PSR_C) & 0xff; + trace_input ("addcb", OP_CONSTANT16, OP_REG, OP_VOID); SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00))); SET_PSR_C (tmp > 0xFF); SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80))); @@ -708,12 +717,12 @@ OP_34B_C () /* addcb. */ void -OP_35_8 () +OP_35_8 (void) { uint8 a = (GPR (OP[0])) & 0xff; uint8 b = (GPR (OP[1])) & 0xff; - trace_input ("addcb", OP_REG, OP_REG, OP_VOID); uint8 tmp = (a + b + PSR_C) & 0xff; + trace_input ("addcb", OP_REG, OP_REG, OP_VOID); SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00))); SET_PSR_C (tmp > 0xFF); SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80))); @@ -722,12 +731,12 @@ OP_35_8 () /* addcw. */ void -OP_36_8 () +OP_36_8 (void) { uint16 a = OP[0]; uint16 b = GPR (OP[1]); - trace_input ("addcw", OP_CONSTANT4_1, OP_REG, OP_VOID); uint16 tmp = (a + b + PSR_C); + trace_input ("addcw", OP_CONSTANT4_1, OP_REG, OP_VOID); SET_GPR (OP[1], tmp); SET_PSR_C (tmp > 0xFFFF); SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000))); @@ -736,12 +745,12 @@ OP_36_8 () /* addcw. */ void -OP_36B_C () +OP_36B_C (void) { int16 a = OP[0]; uint16 b = GPR (OP[1]); - trace_input ("addcw", OP_CONSTANT16, OP_REG, OP_VOID); uint16 tmp = (a + b + PSR_C); + trace_input ("addcw", OP_CONSTANT16, OP_REG, OP_VOID); SET_GPR (OP[1], tmp); SET_PSR_C (tmp > 0xFFFF); SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000))); @@ -750,12 +759,12 @@ OP_36B_C () /* addcw. */ void -OP_37_8 () +OP_37_8 (void) { uint16 a = GPR (OP[1]); uint16 b = GPR (OP[1]); - trace_input ("addcw", OP_REG, OP_REG, OP_VOID); uint16 tmp = (a + b + PSR_C); + trace_input ("addcw", OP_REG, OP_REG, OP_VOID); SET_GPR (OP[1], tmp); SET_PSR_C (tmp > 0xFFFF); SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000))); @@ -764,12 +773,12 @@ OP_37_8 () /* addd. */ void -OP_60_8 () +OP_60_8 (void) { int16 a = (OP[0]); uint32 b = GPR32 (OP[1]); - trace_input ("addd", OP_CONSTANT4_1, OP_REGP, OP_VOID); uint32 tmp = (a + b); + trace_input ("addd", OP_CONSTANT4_1, OP_REGP, OP_VOID); SET_GPR32 (OP[1], tmp); SET_PSR_C (tmp > 0xFFFFFFFF); SET_PSR_F (((a & 0x80000000) == (b & 0x80000000)) && ((b & 0x80000000) != (tmp & 0x80000000))); @@ -778,12 +787,12 @@ OP_60_8 () /* addd. */ void -OP_60B_C () +OP_60B_C (void) { int32 a = (SEXT16(OP[0])); uint32 b = GPR32 (OP[1]); - trace_input ("addd", OP_CONSTANT16, OP_REGP, OP_VOID); uint32 tmp = (a + b); + trace_input ("addd", OP_CONSTANT16, OP_REGP, OP_VOID); SET_GPR32 (OP[1], tmp); SET_PSR_C (tmp > 0xFFFFFFFF); SET_PSR_F (((a & 0x80000000) == (b & 0x80000000)) && ((b & 0x80000000) != (tmp & 0x80000000))); @@ -792,12 +801,12 @@ OP_60B_C () /* addd. */ void -OP_61_8 () +OP_61_8 (void) { uint32 a = GPR32 (OP[0]); uint32 b = GPR32 (OP[1]); - trace_input ("addd", OP_REGP, OP_REGP, OP_VOID); uint32 tmp = (a + b); + trace_input ("addd", OP_REGP, OP_REGP, OP_VOID); SET_GPR32 (OP[1], tmp); trace_output_32 (tmp); SET_PSR_C (tmp > 0xFFFFFFFF); @@ -806,7 +815,7 @@ OP_61_8 () /* addd. */ void -OP_4_8 () +OP_4_8 (void) { uint32 a = OP[0]; uint32 b = GPR32 (OP[1]); @@ -821,7 +830,7 @@ OP_4_8 () /* addd. */ void -OP_2_C () +OP_2_C (void) { int32 a = OP[0]; uint32 b = GPR32 (OP[1]); @@ -836,7 +845,7 @@ OP_2_C () /* andb. */ void -OP_20_8 () +OP_20_8 (void) { uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("andb", OP_CONSTANT4, OP_REG, OP_VOID); @@ -847,7 +856,7 @@ OP_20_8 () /* andb. */ void -OP_20B_C () +OP_20B_C (void) { uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("andb", OP_CONSTANT16, OP_REG, OP_VOID); @@ -858,7 +867,7 @@ OP_20B_C () /* andb. */ void -OP_21_8 () +OP_21_8 (void) { uint8 tmp, a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("andb", OP_REG, OP_REG, OP_VOID); @@ -869,7 +878,7 @@ OP_21_8 () /* andw. */ void -OP_22_8 () +OP_22_8 (void) { uint16 tmp, a = OP[0], b = GPR (OP[1]); trace_input ("andw", OP_CONSTANT4, OP_REG, OP_VOID); @@ -880,7 +889,7 @@ OP_22_8 () /* andw. */ void -OP_22B_C () +OP_22B_C (void) { uint16 tmp, a = OP[0], b = GPR (OP[1]); trace_input ("andw", OP_CONSTANT16, OP_REG, OP_VOID); @@ -891,7 +900,7 @@ OP_22B_C () /* andw. */ void -OP_23_8 () +OP_23_8 (void) { uint16 tmp, a = GPR (OP[0]), b = GPR (OP[1]); trace_input ("andw", OP_REG, OP_REG, OP_VOID); @@ -902,7 +911,7 @@ OP_23_8 () /* andd. */ void -OP_4_C () +OP_4_C (void) { uint32 tmp, a = OP[0], b = GPR32 (OP[1]); trace_input ("andd", OP_CONSTANT32, OP_REGP, OP_VOID); @@ -913,7 +922,7 @@ OP_4_C () /* andd. */ void -OP_14B_14 () +OP_14B_14 (void) { uint32 tmp, a = (GPR32 (OP[0])), b = (GPR32 (OP[1])); trace_input ("andd", OP_REGP, OP_REGP, OP_VOID); @@ -924,7 +933,7 @@ OP_14B_14 () /* ord. */ void -OP_5_C () +OP_5_C (void) { uint32 tmp, a = (OP[0]), b = GPR32 (OP[1]); trace_input ("ord", OP_CONSTANT32, OP_REG, OP_VOID); @@ -935,7 +944,7 @@ OP_5_C () /* ord. */ void -OP_149_14 () +OP_149_14 (void) { uint32 tmp, a = GPR32 (OP[0]), b = GPR32 (OP[1]); trace_input ("ord", OP_REGP, OP_REGP, OP_VOID); @@ -946,7 +955,7 @@ OP_149_14 () /* xord. */ void -OP_6_C () +OP_6_C (void) { uint32 tmp, a = (OP[0]), b = GPR32 (OP[1]); trace_input ("xord", OP_CONSTANT32, OP_REG, OP_VOID); @@ -957,7 +966,7 @@ OP_6_C () /* xord. */ void -OP_14A_14 () +OP_14A_14 (void) { uint32 tmp, a = GPR32 (OP[0]), b = GPR32 (OP[1]); trace_input ("xord", OP_REGP, OP_REGP, OP_VOID); @@ -969,9 +978,9 @@ OP_14A_14 () /* b. */ void -OP_1_4 () +OP_1_4 (void) { - uint32 tmp, cc = cond_stat (OP[0]); + uint32 tmp = 0, cc = cond_stat (OP[0]); trace_input ("b", OP_CONSTANT4, OP_DISPE9, OP_VOID); if (cc) { @@ -998,9 +1007,9 @@ OP_1_4 () /* b. */ void -OP_18_8 () +OP_18_8 (void) { - uint32 tmp, cc = cond_stat (OP[0]); + uint32 tmp = 0, cc = cond_stat (OP[0]); trace_input ("b", OP_CONSTANT4, OP_DISP17, OP_VOID); if (cc) { @@ -1027,9 +1036,9 @@ OP_18_8 () /* b. */ void -OP_10_10 () +OP_10_10 (void) { - uint32 tmp, cc = cond_stat (OP[0]); + uint32 tmp = 0, cc = cond_stat (OP[0]); trace_input ("b", OP_CONSTANT4, OP_DISP25, OP_VOID); if (cc) { @@ -1056,7 +1065,7 @@ OP_10_10 () /* bal. */ void -OP_C0_8 () +OP_C0_8 (void) { uint32 tmp; trace_input ("bal", OP_REG, OP_DISP17, OP_VOID); @@ -1086,7 +1095,7 @@ OP_C0_8 () /* bal. */ void -OP_102_14 () +OP_102_14 (void) { uint32 tmp; trace_input ("bal", OP_REGP, OP_DISP25, OP_VOID); @@ -1114,7 +1123,7 @@ OP_102_14 () /* jal. */ void -OP_148_14 () +OP_148_14 (void) { uint32 tmp; trace_input ("jal", OP_REGP, OP_REGP, OP_VOID); @@ -1140,7 +1149,7 @@ OP_148_14 () /* jal. */ void -OP_D_C () +OP_D_C (void) { uint32 tmp; trace_input ("jal", OP_REGP, OP_VOID, OP_VOID); @@ -1166,7 +1175,7 @@ OP_D_C () /* beq0b. */ void -OP_C_8 () +OP_C_8 (void) { uint32 addr; uint8 a = (GPR (OP[0]) & 0xFF); @@ -1187,7 +1196,7 @@ OP_C_8 () /* bne0b. */ void -OP_D_8 () +OP_D_8 (void) { uint32 addr; uint8 a = (GPR (OP[0]) & 0xFF); @@ -1208,7 +1217,7 @@ OP_D_8 () /* beq0w. */ void -OP_E_8() +OP_E_8 (void) { uint32 addr; uint16 a = GPR (OP[0]); @@ -1229,7 +1238,7 @@ OP_E_8() /* bne0w. */ void -OP_F_8 () +OP_F_8 (void) { uint32 addr; uint16 a = GPR (OP[0]); @@ -1251,9 +1260,9 @@ OP_F_8 () /* jeq. */ void -OP_A0_C () +OP_A0_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jeq", OP_REGP, OP_VOID, OP_VOID); if ((PSR_Z) == 1) { @@ -1265,9 +1274,9 @@ OP_A0_C () /* jne. */ void -OP_A1_C () +OP_A1_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jne", OP_REGP, OP_VOID, OP_VOID); if ((PSR_Z) == 0) { @@ -1279,9 +1288,9 @@ OP_A1_C () /* jcs. */ void -OP_A2_C () +OP_A2_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jcs", OP_REGP, OP_VOID, OP_VOID); if ((PSR_C) == 1) { @@ -1293,9 +1302,9 @@ OP_A2_C () /* jcc. */ void -OP_A3_C () +OP_A3_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jcc", OP_REGP, OP_VOID, OP_VOID); if ((PSR_C) == 0) { @@ -1307,9 +1316,9 @@ OP_A3_C () /* jhi. */ void -OP_A4_C () +OP_A4_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jhi", OP_REGP, OP_VOID, OP_VOID); if ((PSR_L) == 1) { @@ -1321,9 +1330,9 @@ OP_A4_C () /* jls. */ void -OP_A5_C () +OP_A5_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jls", OP_REGP, OP_VOID, OP_VOID); if ((PSR_L) == 0) { @@ -1335,9 +1344,9 @@ OP_A5_C () /* jgt. */ void -OP_A6_C () +OP_A6_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jgt", OP_REGP, OP_VOID, OP_VOID); if ((PSR_N) == 1) { @@ -1349,9 +1358,9 @@ OP_A6_C () /* jle. */ void -OP_A7_C () +OP_A7_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jle", OP_REGP, OP_VOID, OP_VOID); if ((PSR_N) == 0) { @@ -1364,9 +1373,9 @@ OP_A7_C () /* jfs. */ void -OP_A8_C () +OP_A8_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jfs", OP_REGP, OP_VOID, OP_VOID); if ((PSR_F) == 1) { @@ -1378,9 +1387,9 @@ OP_A8_C () /* jfc. */ void -OP_A9_C () +OP_A9_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jfc", OP_REGP, OP_VOID, OP_VOID); if ((PSR_F) == 0) { @@ -1392,9 +1401,9 @@ OP_A9_C () /* jlo. */ void -OP_AA_C () +OP_AA_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jlo", OP_REGP, OP_VOID, OP_VOID); if (((PSR_Z) == 0) & ((PSR_L) == 0)) { @@ -1406,9 +1415,9 @@ OP_AA_C () /* jhs. */ void -OP_AB_C () +OP_AB_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jhs", OP_REGP, OP_VOID, OP_VOID); if (((PSR_Z) == 1) | ((PSR_L) == 1)) { @@ -1420,9 +1429,9 @@ OP_AB_C () /* jlt. */ void -OP_AC_C () +OP_AC_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jlt", OP_REGP, OP_VOID, OP_VOID); if (((PSR_Z) == 0) & ((PSR_N) == 0)) { @@ -1434,9 +1443,9 @@ OP_AC_C () /* jge. */ void -OP_AD_C () +OP_AD_C (void) { - uint32 tmp; + uint32 tmp = 0; trace_input ("jge", OP_REGP, OP_VOID, OP_VOID); if (((PSR_Z) == 1) | ((PSR_N) == 1)) { @@ -1448,7 +1457,7 @@ OP_AD_C () /* jump. */ void -OP_AE_C () +OP_AE_C (void) { uint32 tmp; trace_input ("jump", OP_REGP, OP_VOID, OP_VOID); @@ -1459,7 +1468,7 @@ OP_AE_C () /* jusr. */ void -OP_AF_C () +OP_AF_C (void) { uint32 tmp; trace_input ("jusr", OP_REGP, OP_VOID, OP_VOID); @@ -1471,7 +1480,7 @@ OP_AF_C () /* seq. */ void -OP_80_C () +OP_80_C (void) { trace_input ("seq", OP_REG, OP_VOID, OP_VOID); if ((PSR_Z) == 1) @@ -1482,7 +1491,7 @@ OP_80_C () } /* sne. */ void -OP_81_C () +OP_81_C (void) { trace_input ("sne", OP_REG, OP_VOID, OP_VOID); if ((PSR_Z) == 0) @@ -1494,7 +1503,7 @@ OP_81_C () /* scs. */ void -OP_82_C () +OP_82_C (void) { trace_input ("scs", OP_REG, OP_VOID, OP_VOID); if ((PSR_C) == 1) @@ -1506,7 +1515,7 @@ OP_82_C () /* scc. */ void -OP_83_C () +OP_83_C (void) { trace_input ("scc", OP_REG, OP_VOID, OP_VOID); if ((PSR_C) == 0) @@ -1518,7 +1527,7 @@ OP_83_C () /* shi. */ void -OP_84_C () +OP_84_C (void) { trace_input ("shi", OP_REG, OP_VOID, OP_VOID); if ((PSR_L) == 1) @@ -1530,7 +1539,7 @@ OP_84_C () /* sls. */ void -OP_85_C () +OP_85_C (void) { trace_input ("sls", OP_REG, OP_VOID, OP_VOID); if ((PSR_L) == 0) @@ -1542,7 +1551,7 @@ OP_85_C () /* sgt. */ void -OP_86_C () +OP_86_C (void) { trace_input ("sgt", OP_REG, OP_VOID, OP_VOID); if ((PSR_N) == 1) @@ -1554,7 +1563,7 @@ OP_86_C () /* sle. */ void -OP_87_C () +OP_87_C (void) { trace_input ("sle", OP_REG, OP_VOID, OP_VOID); if ((PSR_N) == 0) @@ -1566,7 +1575,7 @@ OP_87_C () /* sfs. */ void -OP_88_C () +OP_88_C (void) { trace_input ("sfs", OP_REG, OP_VOID, OP_VOID); if ((PSR_F) == 1) @@ -1578,7 +1587,7 @@ OP_88_C () /* sfc. */ void -OP_89_C () +OP_89_C (void) { trace_input ("sfc", OP_REG, OP_VOID, OP_VOID); if ((PSR_F) == 0) @@ -1591,7 +1600,7 @@ OP_89_C () /* slo. */ void -OP_8A_C () +OP_8A_C (void) { trace_input ("slo", OP_REG, OP_VOID, OP_VOID); if (((PSR_Z) == 0) & ((PSR_L) == 0)) @@ -1603,7 +1612,7 @@ OP_8A_C () /* shs. */ void -OP_8B_C () +OP_8B_C (void) { trace_input ("shs", OP_REG, OP_VOID, OP_VOID); if ( ((PSR_Z) == 1) | ((PSR_L) == 1)) @@ -1615,7 +1624,7 @@ OP_8B_C () /* slt. */ void -OP_8C_C () +OP_8C_C (void) { trace_input ("slt", OP_REG, OP_VOID, OP_VOID); if (((PSR_Z) == 0) & ((PSR_N) == 0)) @@ -1627,7 +1636,7 @@ OP_8C_C () /* sge. */ void -OP_8D_C () +OP_8D_C (void) { trace_input ("sge", OP_REG, OP_VOID, OP_VOID); if (((PSR_Z) == 1) | ((PSR_N) == 1)) @@ -1639,7 +1648,7 @@ OP_8D_C () /* cbitb. */ void -OP_D7_9 () +OP_D7_9 (void) { uint8 a = OP[0] & 0xff; uint32 addr = OP[1], tmp; @@ -1653,7 +1662,7 @@ OP_D7_9 () /* cbitb. */ void -OP_107_14 () +OP_107_14 (void) { uint8 a = OP[0] & 0xff; uint32 addr = OP[1], tmp; @@ -1667,7 +1676,7 @@ OP_107_14 () /* cbitb. */ void -OP_68_8 () +OP_68_8 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -1681,7 +1690,7 @@ OP_68_8 () /* cbitb. */ void -OP_1AA_A () +OP_1AA_A (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1695,7 +1704,7 @@ OP_1AA_A () /* cbitb. */ void -OP_104_14 () +OP_104_14 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -1709,7 +1718,7 @@ OP_104_14 () /* cbitb. */ void -OP_D4_9 () +OP_D4_9 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1723,7 +1732,7 @@ OP_D4_9 () /* cbitb. */ void -OP_D6_9 () +OP_D6_9 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1738,7 +1747,7 @@ OP_D6_9 () /* cbitb. */ void -OP_105_14 () +OP_105_14 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1752,7 +1761,7 @@ OP_105_14 () /* cbitb. */ void -OP_106_14 () +OP_106_14 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1767,7 +1776,7 @@ OP_106_14 () /* cbitw. */ void -OP_6F_8 () +OP_6F_8 (void) { uint16 a = OP[0]; uint32 addr = OP[1], tmp; @@ -1781,7 +1790,7 @@ OP_6F_8 () /* cbitw. */ void -OP_117_14 () +OP_117_14 (void) { uint16 a = OP[0]; uint32 addr = OP[1], tmp; @@ -1795,7 +1804,7 @@ OP_117_14 () /* cbitw. */ void -OP_36_7 () +OP_36_7 (void) { uint32 addr; uint16 a = (OP[0]), tmp; @@ -1816,7 +1825,7 @@ OP_36_7 () /* cbitw. */ void -OP_1AB_A () +OP_1AB_A (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1830,7 +1839,7 @@ OP_1AB_A () /* cbitw. */ void -OP_114_14 () +OP_114_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -1845,7 +1854,7 @@ OP_114_14 () /* cbitw. */ void -OP_6E_8 () +OP_6E_8 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1859,7 +1868,7 @@ OP_6E_8 () /* cbitw. */ void -OP_69_8 () +OP_69_8 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1874,7 +1883,7 @@ OP_69_8 () /* cbitw. */ void -OP_115_14 () +OP_115_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1888,7 +1897,7 @@ OP_115_14 () /* cbitw. */ void -OP_116_14 () +OP_116_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1902,7 +1911,7 @@ OP_116_14 () /* sbitb. */ void -OP_E7_9 () +OP_E7_9 (void) { uint8 a = OP[0] & 0xff; uint32 addr = OP[1], tmp; @@ -1916,7 +1925,7 @@ OP_E7_9 () /* sbitb. */ void -OP_10B_14 () +OP_10B_14 (void) { uint8 a = OP[0] & 0xff; uint32 addr = OP[1], tmp; @@ -1930,7 +1939,7 @@ OP_10B_14 () /* sbitb. */ void -OP_70_8 () +OP_70_8 (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -1944,7 +1953,7 @@ OP_70_8 () /* sbitb. */ void -OP_1CA_A () +OP_1CA_A (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1958,7 +1967,7 @@ OP_1CA_A () /* sbitb. */ void -OP_108_14 () +OP_108_14 (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -1973,7 +1982,7 @@ OP_108_14 () /* sbitb. */ void -OP_E4_9 () +OP_E4_9 (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -1987,7 +1996,7 @@ OP_E4_9 () /* sbitb. */ void -OP_E6_9 () +OP_E6_9 (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2002,7 +2011,7 @@ OP_E6_9 () /* sbitb. */ void -OP_109_14 () +OP_109_14 (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2017,7 +2026,7 @@ OP_109_14 () /* sbitb. */ void -OP_10A_14 () +OP_10A_14 (void) { uint8 a = OP[0] & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2032,7 +2041,7 @@ OP_10A_14 () /* sbitw. */ void -OP_77_8 () +OP_77_8 (void) { uint16 a = OP[0]; uint32 addr = OP[1], tmp; @@ -2046,7 +2055,7 @@ OP_77_8 () /* sbitw. */ void -OP_11B_14 () +OP_11B_14 (void) { uint16 a = OP[0]; uint32 addr = OP[1], tmp; @@ -2060,7 +2069,7 @@ OP_11B_14 () /* sbitw. */ void -OP_3A_7 () +OP_3A_7 (void) { uint32 addr; uint16 a = (OP[0]), tmp; @@ -2080,7 +2089,7 @@ OP_3A_7 () /* sbitw. */ void -OP_1CB_A () +OP_1CB_A (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2094,7 +2103,7 @@ OP_1CB_A () /* sbitw. */ void -OP_118_14 () +OP_118_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -2108,7 +2117,7 @@ OP_118_14 () /* sbitw. */ void -OP_76_8 () +OP_76_8 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2122,7 +2131,7 @@ OP_76_8 () /* sbitw. */ void -OP_71_8 () +OP_71_8 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2136,7 +2145,7 @@ OP_71_8 () /* sbitw. */ void -OP_119_14 () +OP_119_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2150,7 +2159,7 @@ OP_119_14 () /* sbitw. */ void -OP_11A_14 () +OP_11A_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2165,7 +2174,7 @@ OP_11A_14 () /* tbitb. */ void -OP_F7_9 () +OP_F7_9 (void) { uint8 a = OP[0] & 0xff; uint32 addr = OP[1], tmp; @@ -2177,7 +2186,7 @@ OP_F7_9 () /* tbitb. */ void -OP_10F_14 () +OP_10F_14 (void) { uint8 a = OP[0] & 0xff; uint32 addr = OP[1], tmp; @@ -2189,7 +2198,7 @@ OP_10F_14 () /* tbitb. */ void -OP_78_8 () +OP_78_8 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -2201,7 +2210,7 @@ OP_78_8 () /* tbitb. */ void -OP_1EA_A () +OP_1EA_A (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2213,7 +2222,7 @@ OP_1EA_A () /* tbitb. */ void -OP_10C_14 () +OP_10C_14 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -2225,7 +2234,7 @@ OP_10C_14 () /* tbitb. */ void -OP_F4_9 () +OP_F4_9 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2237,7 +2246,7 @@ OP_F4_9 () /* tbitb. */ void -OP_F6_9 () +OP_F6_9 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2249,7 +2258,7 @@ OP_F6_9 () /* tbitb. */ void -OP_10D_14 () +OP_10D_14 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2261,7 +2270,7 @@ OP_10D_14 () /* tbitb. */ void -OP_10E_14 () +OP_10E_14 (void) { uint8 a = (OP[0]) & 0xff; uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2274,7 +2283,7 @@ OP_10E_14 () /* tbitw. */ void -OP_7F_8 () +OP_7F_8 (void) { uint16 a = OP[0]; uint32 addr = OP[1], tmp; @@ -2286,7 +2295,7 @@ OP_7F_8 () /* tbitw. */ void -OP_11F_14 () +OP_11F_14 (void) { uint16 a = OP[0]; uint32 addr = OP[1], tmp; @@ -2299,7 +2308,7 @@ OP_11F_14 () /* tbitw. */ void -OP_3E_7 () +OP_3E_7 (void) { uint32 addr; uint16 a = (OP[0]), tmp; @@ -2317,7 +2326,7 @@ OP_3E_7 () /* tbitw. */ void -OP_1EB_A () +OP_1EB_A (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2329,7 +2338,7 @@ OP_1EB_A () /* tbitw. */ void -OP_11C_14 () +OP_11C_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR (OP[2])) + OP[1], tmp; @@ -2341,7 +2350,7 @@ OP_11C_14 () /* tbitw. */ void -OP_7E_8 () +OP_7E_8 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2353,7 +2362,7 @@ OP_7E_8 () /* tbitw. */ void -OP_79_8 () +OP_79_8 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2365,7 +2374,7 @@ OP_79_8 () /* tbitw. */ void -OP_11D_14 () +OP_11D_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2378,7 +2387,7 @@ OP_11D_14 () /* tbitw. */ void -OP_11E_14 () +OP_11E_14 (void) { uint16 a = (OP[0]); uint32 addr = (GPR32 (OP[2])) + OP[1], tmp; @@ -2391,7 +2400,7 @@ OP_11E_14 () /* tbit. */ void -OP_6_8 () +OP_6_8 (void) { uint16 a = OP[0]; uint16 b = (GPR (OP[1])); @@ -2402,7 +2411,7 @@ OP_6_8 () /* tbit. */ void -OP_7_8 () +OP_7_8 (void) { uint16 a = GPR (OP[0]); uint16 b = (GPR (OP[1])); @@ -2414,7 +2423,7 @@ OP_7_8 () /* cmpb. */ void -OP_50_8 () +OP_50_8 (void) { uint8 a = (OP[0]) & 0xFF; uint8 b = (GPR (OP[1])) & 0xFF; @@ -2427,7 +2436,7 @@ OP_50_8 () /* cmpb. */ void -OP_50B_C () +OP_50B_C (void) { uint8 a = (OP[0]) & 0xFF; uint8 b = (GPR (OP[1])) & 0xFF; @@ -2440,7 +2449,7 @@ OP_50B_C () /* cmpb. */ void -OP_51_8 () +OP_51_8 (void) { uint8 a = (GPR (OP[0])) & 0xFF; uint8 b = (GPR (OP[1])) & 0xFF; @@ -2453,7 +2462,7 @@ OP_51_8 () /* cmpw. */ void -OP_52_8 () +OP_52_8 (void) { uint16 a = (OP[0]); uint16 b = GPR (OP[1]); @@ -2466,7 +2475,7 @@ OP_52_8 () /* cmpw. */ void -OP_52B_C () +OP_52B_C (void) { uint16 a = (OP[0]); uint16 b = GPR (OP[1]); @@ -2479,7 +2488,7 @@ OP_52B_C () /* cmpw. */ void -OP_53_8 () +OP_53_8 (void) { uint16 a = GPR (OP[0]) ; uint16 b = GPR (OP[1]) ; @@ -2492,7 +2501,7 @@ OP_53_8 () /* cmpd. */ void -OP_56_8 () +OP_56_8 (void) { uint32 a = (OP[0]); uint32 b = GPR32 (OP[1]); @@ -2505,7 +2514,7 @@ OP_56_8 () /* cmpd. */ void -OP_56B_C () +OP_56B_C (void) { uint32 a = (SEXT16(OP[0])); uint32 b = GPR32 (OP[1]); @@ -2518,7 +2527,7 @@ OP_56B_C () /* cmpd. */ void -OP_57_8 () +OP_57_8 (void) { uint32 a = GPR32 (OP[0]) ; uint32 b = GPR32 (OP[1]) ; @@ -2531,7 +2540,7 @@ OP_57_8 () /* cmpd. */ void -OP_9_C() +OP_9_C (void) { uint32 a = (OP[0]); uint32 b = GPR32 (OP[1]); @@ -2545,40 +2554,40 @@ OP_9_C() /* movb. */ void -OP_58_8 () +OP_58_8 (void) { uint8 tmp = OP[0] & 0xFF; - trace_input ("movb", OP_CONSTANT4, OP_REG, OP_VOID); uint16 a = (GPR (OP[1])) & 0xFF00; + trace_input ("movb", OP_CONSTANT4, OP_REG, OP_VOID); SET_GPR (OP[1], (a | tmp)); trace_output_16 (tmp); } /* movb. */ void -OP_58B_C () +OP_58B_C (void) { uint8 tmp = OP[0] & 0xFF; - trace_input ("movb", OP_CONSTANT16, OP_REG, OP_VOID); uint16 a = (GPR (OP[1])) & 0xFF00; + trace_input ("movb", OP_CONSTANT16, OP_REG, OP_VOID); SET_GPR (OP[1], (a | tmp)); trace_output_16 (tmp); } /* movb. */ void -OP_59_8 () +OP_59_8 (void) { uint8 tmp = (GPR (OP[0])) & 0xFF; - trace_input ("movb", OP_REG, OP_REG, OP_VOID); uint16 a = (GPR (OP[1])) & 0xFF00; + trace_input ("movb", OP_REG, OP_REG, OP_VOID); SET_GPR (OP[1], (a | tmp)); trace_output_16 (tmp); } /* movw. */ void -OP_5A_8 () +OP_5A_8 (void) { uint16 tmp = OP[0]; trace_input ("movw", OP_CONSTANT4_1, OP_REG, OP_VOID); @@ -2588,7 +2597,7 @@ OP_5A_8 () /* movw. */ void -OP_5AB_C () +OP_5AB_C (void) { int16 tmp = OP[0]; trace_input ("movw", OP_CONSTANT16, OP_REG, OP_VOID); @@ -2598,11 +2607,11 @@ OP_5AB_C () /* movw. */ void -OP_5B_8 () +OP_5B_8 (void) { uint16 tmp = GPR (OP[0]); - trace_input ("movw", OP_REG, OP_REGP, OP_VOID); uint32 a = GPR32 (OP[1]); + trace_input ("movw", OP_REG, OP_REGP, OP_VOID); a = (a & 0xffff0000) | tmp; SET_GPR32 (OP[1], a); trace_output_16 (tmp); @@ -2610,7 +2619,7 @@ OP_5B_8 () /* movxb. */ void -OP_5C_8 () +OP_5C_8 (void) { uint8 tmp = (GPR (OP[0])) & 0xFF; trace_input ("movxb", OP_REG, OP_REG, OP_VOID); @@ -2620,7 +2629,7 @@ OP_5C_8 () /* movzb. */ void -OP_5D_8 () +OP_5D_8 (void) { uint8 tmp = (GPR (OP[0])) & 0xFF; trace_input ("movzb", OP_REG, OP_REG, OP_VOID); @@ -2630,7 +2639,7 @@ OP_5D_8 () /* movxw. */ void -OP_5E_8 () +OP_5E_8 (void) { uint16 tmp = GPR (OP[0]); trace_input ("movxw", OP_REG, OP_REGP, OP_VOID); @@ -2640,7 +2649,7 @@ OP_5E_8 () /* movzw. */ void -OP_5F_8 () +OP_5F_8 (void) { uint16 tmp = GPR (OP[0]); trace_input ("movzw", OP_REG, OP_REGP, OP_VOID); @@ -2650,7 +2659,7 @@ OP_5F_8 () /* movd. */ void -OP_54_8 () +OP_54_8 (void) { int32 tmp = OP[0]; trace_input ("movd", OP_CONSTANT4, OP_REGP, OP_VOID); @@ -2660,7 +2669,7 @@ OP_54_8 () /* movd. */ void -OP_54B_C () +OP_54B_C (void) { int32 tmp = SEXT16(OP[0]); trace_input ("movd", OP_CONSTANT16, OP_REGP, OP_VOID); @@ -2670,7 +2679,7 @@ OP_54B_C () /* movd. */ void -OP_55_8 () +OP_55_8 (void) { uint32 tmp = GPR32 (OP[0]); trace_input ("movd", OP_REGP, OP_REGP, OP_VOID); @@ -2680,7 +2689,7 @@ OP_55_8 () /* movd. */ void -OP_5_8 () +OP_5_8 (void) { uint32 tmp = OP[0]; trace_input ("movd", OP_CONSTANT20, OP_REGP, OP_VOID); @@ -2690,7 +2699,7 @@ OP_5_8 () /* movd. */ void -OP_7_C () +OP_7_C (void) { int32 tmp = OP[0]; trace_input ("movd", OP_CONSTANT32, OP_REGP, OP_VOID); @@ -2700,7 +2709,7 @@ OP_7_C () /* loadm. */ void -OP_14_D () +OP_14_D (void) { uint32 addr = GPR (0); uint16 count = OP[0], reg = 2, tmp; @@ -2730,7 +2739,7 @@ OP_14_D () /* loadmp. */ void -OP_15_D () +OP_15_D (void) { uint32 addr = GPR32 (0); uint16 count = OP[0], reg = 2, tmp; @@ -2760,7 +2769,7 @@ OP_15_D () /* loadb. */ void -OP_88_8 () +OP_88_8 (void) { /* loadb ABS20, REG * ADDR = zext24(abs20) | remap (ie 0xF00000) @@ -2781,7 +2790,7 @@ OP_88_8 () /* loadb. */ void -OP_127_14 () +OP_127_14 (void) { /* loadb ABS24, REG * ADDR = abs24 @@ -2797,7 +2806,7 @@ OP_127_14 () /* loadb. */ void -OP_45_7 () +OP_45_7 (void) { /* loadb [Rindex]ABS20 REG * ADDR = Rindex + zext24(disp20) @@ -2820,7 +2829,7 @@ OP_45_7 () /* loadb. */ void -OP_B_4 () +OP_B_4 (void) { /* loadb DIPS4(REGP) REG * ADDR = RPBASE + zext24(DISP4) @@ -2835,7 +2844,7 @@ OP_B_4 () /* loadb. */ void -OP_BE_8 () +OP_BE_8 (void) { /* loadb [Rindex]disp0(RPbasex) REG * ADDR = Rpbasex + Rindex @@ -2859,7 +2868,7 @@ OP_BE_8 () /* loadb. */ void -OP_219_A () +OP_219_A (void) { /* loadb [Rindex]disp14(RPbasex) REG * ADDR = Rpbasex + Rindex + zext24(disp14) @@ -2884,7 +2893,7 @@ OP_219_A () /* loadb. */ void -OP_184_14 () +OP_184_14 (void) { /* loadb DISPE20(REG) REG * zext24(Rbase) + zext24(dispe20) @@ -2900,7 +2909,7 @@ OP_184_14 () /* loadb. */ void -OP_124_14 () +OP_124_14 (void) { /* loadb DISP20(REG) REG * ADDR = zext24(Rbase) + zext24(disp20) @@ -2916,7 +2925,7 @@ OP_124_14 () /* loadb. */ void -OP_BF_8 () +OP_BF_8 (void) { /* loadb disp16(REGP) REG * ADDR = RPbase + zext24(disp16) @@ -2932,7 +2941,7 @@ OP_BF_8 () /* loadb. */ void -OP_125_14 () +OP_125_14 (void) { /* loadb disp20(REGP) REG * ADDR = RPbase + zext24(disp20) @@ -2948,7 +2957,7 @@ OP_125_14 () /* loadb. */ void -OP_185_14 () +OP_185_14 (void) { /* loadb -disp20(REGP) REG * ADDR = RPbase + zext24(-disp20) @@ -2963,7 +2972,7 @@ OP_185_14 () /* loadb. */ void -OP_126_14 () +OP_126_14 (void) { /* loadb [Rindex]disp20(RPbasexb) REG * ADDR = RPbasex + Rindex + zext24(disp20) @@ -2988,7 +2997,7 @@ OP_126_14 () /* loadw. */ void -OP_89_8 () +OP_89_8 (void) { /* loadw ABS20, REG * ADDR = zext24(abs20) | remap @@ -3010,7 +3019,7 @@ OP_89_8 () /* loadw. */ void -OP_12F_14 () +OP_12F_14 (void) { /* loadw ABS24, REG * ADDR = abs24 @@ -3025,7 +3034,7 @@ OP_12F_14 () /* loadw. */ void -OP_47_7 () +OP_47_7 (void) { /* loadw [Rindex]ABS20 REG * ADDR = Rindex + zext24(disp20) @@ -3048,7 +3057,7 @@ OP_47_7 () /* loadw. */ void -OP_9_4 () +OP_9_4 (void) { /* loadw DIPS4(REGP) REGP * ADDR = RPBASE + zext24(DISP4) @@ -3072,7 +3081,7 @@ OP_9_4 () /* loadw. */ void -OP_9E_8 () +OP_9E_8 (void) { /* loadw [Rindex]disp0(RPbasex) REG * ADDR = Rpbasex + Rindex @@ -3097,7 +3106,7 @@ OP_9E_8 () /* loadw. */ void -OP_21B_A () +OP_21B_A (void) { /* loadw [Rindex]disp14(RPbasex) REG * ADDR = Rpbasex + Rindex + zext24(disp14) @@ -3120,7 +3129,7 @@ OP_21B_A () /* loadw. */ void -OP_18C_14 () +OP_18C_14 (void) { /* loadw dispe20(REG) REGP * REGP = [DISPE20+[REG]] */ @@ -3144,7 +3153,7 @@ OP_18C_14 () /* loadw. */ void -OP_12C_14 () +OP_12C_14 (void) { /* loadw DISP20(REG) REGP * ADDR = zext24(Rbase) + zext24(disp20) @@ -3168,7 +3177,7 @@ OP_12C_14 () /* loadw. */ void -OP_9F_8 () +OP_9F_8 (void) { /* loadw disp16(REGP) REGP * ADDR = RPbase + zext24(disp16) @@ -3191,7 +3200,7 @@ OP_9F_8 () /* loadw. */ void -OP_12D_14 () +OP_12D_14 (void) { /* loadw disp20(REGP) REGP * ADDR = RPbase + zext24(disp20) @@ -3214,7 +3223,7 @@ OP_12D_14 () /* loadw. */ void -OP_18D_14 () +OP_18D_14 (void) { /* loadw -disp20(REGP) REG * ADDR = RPbase + zext24(-disp20) @@ -3239,7 +3248,7 @@ OP_18D_14 () /* loadw. */ void -OP_12E_14 () +OP_12E_14 (void) { /* loadw [Rindex]disp20(RPbasexb) REG * ADDR = RPbasex + Rindex + zext24(disp20) @@ -3262,7 +3271,7 @@ OP_12E_14 () /* loadd. */ void -OP_87_8 () +OP_87_8 (void) { /* loadd ABS20, REGP * ADDR = zext24(abs20) | remap @@ -3284,7 +3293,7 @@ OP_87_8 () /* loadd. */ void -OP_12B_14 () +OP_12B_14 (void) { /* loadd ABS24, REGP * ADDR = abs24 @@ -3302,7 +3311,7 @@ OP_12B_14 () /* loadd. */ void -OP_46_7 () +OP_46_7 (void) { /* loadd [Rindex]ABS20 REGP * ADDR = Rindex + zext24(disp20) @@ -3325,7 +3334,7 @@ OP_46_7 () /* loadd. */ void -OP_A_4 () +OP_A_4 (void) { /* loadd dips4(regp) REGP * ADDR = Rpbase + zext24(disp4) @@ -3342,7 +3351,7 @@ OP_A_4 () /* loadd. */ void -OP_AE_8 () +OP_AE_8 (void) { /* loadd [Rindex]disp0(RPbasex) REGP * ADDR = Rpbasex + Rindex @@ -3365,7 +3374,7 @@ OP_AE_8 () /* loadd. */ void -OP_21A_A () +OP_21A_A (void) { /* loadd [Rindex]disp14(RPbasex) REGP * ADDR = Rpbasex + Rindex + zext24(disp14) @@ -3388,7 +3397,7 @@ OP_21A_A () /* loadd. */ void -OP_188_14 () +OP_188_14 (void) { /* loadd dispe20(REG) REG * zext24(Rbase) + zext24(dispe20) @@ -3405,7 +3414,7 @@ OP_188_14 () /* loadd. */ void -OP_128_14 () +OP_128_14 (void) { /* loadd DISP20(REG) REG * ADDR = zext24(Rbase) + zext24(disp20) @@ -3421,7 +3430,7 @@ OP_128_14 () /* loadd. */ void -OP_AF_8 () +OP_AF_8 (void) { /* loadd disp16(REGP) REGP * ADDR = RPbase + zext24(disp16) @@ -3437,7 +3446,7 @@ OP_AF_8 () /* loadd. */ void -OP_129_14 () +OP_129_14 (void) { /* loadd disp20(REGP) REGP * ADDR = RPbase + zext24(disp20) @@ -3452,7 +3461,7 @@ OP_129_14 () /* loadd. */ void -OP_189_14 () +OP_189_14 (void) { /* loadd -disp20(REGP) REGP * ADDR = RPbase + zext24(-disp20) @@ -3468,7 +3477,7 @@ OP_189_14 () /* loadd. */ void -OP_12A_14 () +OP_12A_14 (void) { /* loadd [Rindex]disp20(RPbasexb) REGP * ADDR = RPbasex + Rindex + zext24(disp20) @@ -3491,7 +3500,7 @@ OP_12A_14 () /* storb. */ void -OP_C8_8 () +OP_C8_8 (void) { /* storb REG, ABS20 * ADDR = zext24(abs20) | remap @@ -3510,7 +3519,7 @@ OP_C8_8 () /* storb. */ void -OP_137_14 () +OP_137_14 (void) { /* storb REG, ABS24 * ADDR = abs24 @@ -3525,7 +3534,7 @@ OP_137_14 () /* storb. */ void -OP_65_7 () +OP_65_7 (void) { /* storb REG, [Rindex]ABS20 * ADDR = Rindex + zext24(disp20) @@ -3546,22 +3555,22 @@ OP_65_7 () /* storb. */ void -OP_F_4 () +OP_F_4 (void) { /* storb REG, DIPS4(REGP) * ADDR = RPBASE + zext24(DISP4) * [ADDR] = REG. */ uint16 a = ((GPR (OP[0])) & 0xff); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storb", OP_REG, OP_RP_BASE_DISPE4, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_FE_8 () +OP_FE_8 (void) { /* storb [Rindex]disp0(RPbasex) REG * ADDR = Rpbasex + Rindex @@ -3582,105 +3591,105 @@ OP_FE_8 () /* storb. */ void -OP_319_A () +OP_319_A (void) { /* storb REG, [Rindex]disp14(RPbasex) * ADDR = Rpbasex + Rindex + zext24(disp14) * [ADDR] = REGR */ uint8 a = ((GPR (OP[0])) & 0xff); - trace_input ("storb", OP_REG, OP_RP_INDEX_DISP14, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_REG, OP_RP_INDEX_DISP14, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_194_14 () +OP_194_14 (void) { /* storb REG, DISPE20(REG) * zext24(Rbase) + zext24(dispe20) * [ADDR] = REG */ uint8 a = ((GPR (OP[0])) & 0xff); - trace_input ("storb", OP_REG, OP_R_BASE_DISPE20, OP_VOID); uint32 addr = OP[1] + (GPR (OP[2])); + trace_input ("storb", OP_REG, OP_R_BASE_DISPE20, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_134_14 () +OP_134_14 (void) { /* storb REG, DISP20(REG) * ADDR = zext24(Rbase) + zext24(disp20) * [ADDR] = REG */ uint8 a = (GPR (OP[0]) & 0xff); + uint32 addr = OP[1] + (GPR (OP[2])); trace_input ("storb", OP_REG, OP_R_BASE_DISPS20, OP_VOID); - uint32 addr = OP[1] + (GPR (OP[2])); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_FF_8 () +OP_FF_8 (void) { /* storb REG, disp16(REGP) * ADDR = RPbase + zext24(disp16) * [ADDR] = REGP */ uint8 a = ((GPR (OP[0])) & 0xff); - trace_input ("storb", OP_REG, OP_RP_BASE_DISP16, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_REG, OP_RP_BASE_DISP16, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_135_14 () +OP_135_14 (void) { /* storb REG, disp20(REGP) * ADDR = RPbase + zext24(disp20) * [ADDR] = REGP */ uint8 a = ((GPR (OP[0])) & 0xff); - trace_input ("storb", OP_REG, OP_RP_BASE_DISPS20, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_REG, OP_RP_BASE_DISPS20, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_195_14 () +OP_195_14 (void) { /* storb REG, -disp20(REGP) * ADDR = RPbase + zext24(-disp20) * [ADDR] = REGP */ uint8 a = (GPR (OP[0]) & 0xff); - trace_input ("storb", OP_REG, OP_RP_BASE_DISPE20, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_REG, OP_RP_BASE_DISPE20, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_136_14 () +OP_136_14 (void) { /* storb REG, [Rindex]disp20(RPbase) * ADDR = RPbasex + Rindex + zext24(disp20) * [ADDR] = REGP */ uint8 a = (GPR (OP[0])) & 0xff; - trace_input ("storb", OP_REG, OP_RP_INDEX_DISPS20, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_REG, OP_RP_INDEX_DISPS20, OP_VOID); SB (addr, a); trace_output_32 (addr); } @@ -3688,29 +3697,29 @@ OP_136_14 () /* STR_IMM instructions. */ /* storb . */ void -OP_81_8 () +OP_81_8 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_ABS20_OUTPUT, OP_VOID); uint32 addr = OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_ABS20_OUTPUT, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_123_14 () +OP_123_14 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_ABS24_OUTPUT, OP_VOID); uint32 addr = OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_ABS24_OUTPUT, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_42_7 () +OP_42_7 (void) { uint32 addr; uint8 a = (OP[0]) & 0xff; @@ -3727,66 +3736,66 @@ OP_42_7 () /* storb. */ void -OP_218_A () +OP_218_A (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP14, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP14, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_82_8 () +OP_82_8 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISP0, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISP0, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_120_14 () +OP_120_14 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_R_BASE_DISPS20, OP_VOID); uint32 addr = (GPR (OP[2])) + OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_R_BASE_DISPS20, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_83_8 () +OP_83_8 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP16, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP16, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_121_14 () +OP_121_14 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISPS20, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISPS20, OP_VOID); SB (addr, a); trace_output_32 (addr); } /* storb. */ void -OP_122_14 () +OP_122_14 (void) { uint8 a = (OP[0]) & 0xff; - trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISPS20, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISPS20, OP_VOID); SB (addr, a); trace_output_32 (addr); } @@ -3794,29 +3803,29 @@ OP_122_14 () /* storw . */ void -OP_C9_8 () +OP_C9_8 (void) { uint16 a = GPR (OP[0]); - trace_input ("storw", OP_REG, OP_ABS20_OUTPUT, OP_VOID); uint32 addr = OP[1]; + trace_input ("storw", OP_REG, OP_ABS20_OUTPUT, OP_VOID); SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_13F_14 () +OP_13F_14 (void) { uint16 a = GPR (OP[0]); - trace_input ("storw", OP_REG, OP_ABS24_OUTPUT, OP_VOID); uint32 addr = OP[1]; + trace_input ("storw", OP_REG, OP_ABS24_OUTPUT, OP_VOID); SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_67_7 () +OP_67_7 (void) { uint32 addr; uint16 a = GPR (OP[0]); @@ -3834,99 +3843,99 @@ OP_67_7 () /* storw. */ void -OP_D_4 () +OP_D_4 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_REGP, OP_RP_BASE_DISPE4, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_DE_8 () +OP_DE_8 (void) { uint16 a = GPR (OP[0]); - trace_input ("storw", OP_REG, OP_RP_INDEX_DISP0, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storw", OP_REG, OP_RP_INDEX_DISP0, OP_VOID); SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_31B_A () +OP_31B_A (void) { uint16 a = GPR (OP[0]); - trace_input ("storw", OP_REG, OP_RP_INDEX_DISP14, OP_VOID); uint32 addr = (GPR32 (OP[2])) + OP[1]; + trace_input ("storw", OP_REG, OP_RP_INDEX_DISP14, OP_VOID); SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_19C_14 () +OP_19C_14 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_REGP, OP_RP_BASE_DISPE20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_13C_14 () +OP_13C_14 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR (OP[2])) + OP[1]; trace_input ("storw", OP_REG, OP_R_BASE_DISPS20, OP_VOID); - uint32 addr = (GPR (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_DF_8 () +OP_DF_8 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_REG, OP_RP_BASE_DISP16, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_13D_14 () +OP_13D_14 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_REG, OP_RP_BASE_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_19D_14 () +OP_19D_14 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_REG, OP_RP_BASE_DISPE20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_13E_14 () +OP_13E_14 (void) { uint16 a = (GPR (OP[0])); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_REG, OP_RP_INDEX_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } @@ -3934,29 +3943,29 @@ OP_13E_14 () /* STORE-w IMM instruction *****/ /* storw . */ void -OP_C1_8 () +OP_C1_8 (void) { uint16 a = OP[0]; + uint32 addr = OP[1]; trace_input ("storw", OP_CONSTANT4, OP_ABS20_OUTPUT, OP_VOID); - uint32 addr = OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_133_14 () +OP_133_14 (void) { uint16 a = OP[0]; + uint32 addr = OP[1]; trace_input ("storw", OP_CONSTANT4, OP_ABS24_OUTPUT, OP_VOID); - uint32 addr = OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_62_7 () +OP_62_7 (void) { uint32 addr; uint16 a = OP[0]; @@ -3973,44 +3982,44 @@ OP_62_7 () /* storw. */ void -OP_318_A () +OP_318_A (void) { uint16 a = OP[0]; + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_CONSTANT4, OP_RP_BASE_DISP14, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_C2_8 () +OP_C2_8 (void) { uint16 a = OP[0]; + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_CONSTANT4, OP_RP_INDEX_DISP0, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_130_14 () +OP_130_14 (void) { uint16 a = OP[0]; + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_CONSTANT4, OP_R_BASE_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_C3_8 () +OP_C3_8 (void) { uint16 a = OP[0]; + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_CONSTANT4, OP_RP_BASE_DISP16, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } @@ -4018,22 +4027,22 @@ OP_C3_8 () /* storw. */ void -OP_131_14 () +OP_131_14 (void) { uint16 a = OP[0]; + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_CONSTANT4, OP_RP_BASE_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } /* storw. */ void -OP_132_14 () +OP_132_14 (void) { uint16 a = OP[0]; + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("storw", OP_CONSTANT4, OP_RP_INDEX_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SW (addr, a); trace_output_32 (addr); } @@ -4041,29 +4050,29 @@ OP_132_14 () /* stord. */ void -OP_C7_8 () +OP_C7_8 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = OP[1]; trace_input ("stord", OP_REGP, OP_ABS20_OUTPUT, OP_VOID); - uint32 addr = OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_13B_14 () +OP_13B_14 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = OP[1]; trace_input ("stord", OP_REGP, OP_ABS24_OUTPUT, OP_VOID); - uint32 addr = OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_66_7 () +OP_66_7 (void) { uint32 addr, a = GPR32 (OP[0]); trace_input ("stord", OP_REGP, OP_R_INDEX8_ABS20, OP_VOID); @@ -4079,106 +4088,106 @@ OP_66_7 () /* stord. */ void -OP_E_4 () +OP_E_4 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_BASE_DISPE4, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_EE_8 () +OP_EE_8 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_INDEX_DISP0, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_31A_A () +OP_31A_A (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_INDEX_DISP14, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_198_14 () +OP_198_14 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_R_BASE_DISPE20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_138_14 () +OP_138_14 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_R_BASE_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_EF_8 () +OP_EF_8 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_BASE_DISP16, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_139_14 () +OP_139_14 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_BASE_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_199_14 () +OP_199_14 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_BASE_DISPE20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* stord. */ void -OP_13A_14 () +OP_13A_14 (void) { uint32 a = GPR32 (OP[0]); + uint32 addr = (GPR32 (OP[2])) + OP[1]; trace_input ("stord", OP_REGP, OP_RP_INDEX_DISPS20, OP_VOID); - uint32 addr = (GPR32 (OP[2])) + OP[1]; SLW (addr, a); trace_output_32 (addr); } /* macqu. */ void -OP_14D_14 () +OP_14D_14 (void) { int32 tmp; int16 src1, src2; @@ -4193,7 +4202,7 @@ OP_14D_14 () /* macuw. */ void -OP_14E_14 () +OP_14E_14 (void) { uint32 tmp; uint16 src1, src2; @@ -4208,7 +4217,7 @@ OP_14E_14 () /* macsw. */ void -OP_14F_14 () +OP_14F_14 (void) { int32 tmp; int16 src1, src2; @@ -4224,7 +4233,7 @@ OP_14F_14 () /* mulb. */ void -OP_64_8 () +OP_64_8 (void) { int16 tmp; int8 a = (OP[0]) & 0xff; @@ -4237,7 +4246,7 @@ OP_64_8 () /* mulb. */ void -OP_64B_C () +OP_64B_C (void) { int16 tmp; int8 a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; @@ -4250,7 +4259,7 @@ OP_64B_C () /* mulb. */ void -OP_65_8 () +OP_65_8 (void) { int16 tmp; int8 a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff; @@ -4263,7 +4272,7 @@ OP_65_8 () /* mulw. */ void -OP_66_8 () +OP_66_8 (void) { int32 tmp; uint16 a = OP[0]; @@ -4276,7 +4285,7 @@ OP_66_8 () /* mulw. */ void -OP_66B_C () +OP_66B_C (void) { int32 tmp; int16 a = OP[0], b = (GPR (OP[1])); @@ -4289,7 +4298,7 @@ OP_66B_C () /* mulw. */ void -OP_67_8 () +OP_67_8 (void) { int32 tmp; int16 a = (GPR (OP[0])), b = (GPR (OP[1])); @@ -4302,7 +4311,7 @@ OP_67_8 () /* mulsb. */ void -OP_B_8 () +OP_B_8 (void) { int16 tmp; int8 a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff; @@ -4314,7 +4323,7 @@ OP_B_8 () /* mulsw. */ void -OP_62_8 () +OP_62_8 (void) { int32 tmp; int16 a = (GPR (OP[0])), b = (GPR (OP[1])); @@ -4326,7 +4335,7 @@ OP_62_8 () /* muluw. */ void -OP_63_8 () +OP_63_8 (void) { uint32 tmp; uint16 a = (GPR (OP[0])), b = (GPR (OP[1])); @@ -4339,7 +4348,7 @@ OP_63_8 () /* nop. */ void -OP_2C00_10 () +OP_2C00_10 (void) { trace_input ("nop", OP_VOID, OP_VOID, OP_VOID); @@ -4361,7 +4370,7 @@ OP_2C00_10 () /* orb. */ void -OP_24_8 () +OP_24_8 (void) { uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("orb", OP_CONSTANT4, OP_REG, OP_VOID); @@ -4372,7 +4381,7 @@ OP_24_8 () /* orb. */ void -OP_24B_C () +OP_24B_C (void) { uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("orb", OP_CONSTANT16, OP_REG, OP_VOID); @@ -4383,7 +4392,7 @@ OP_24B_C () /* orb. */ void -OP_25_8 () +OP_25_8 (void) { uint8 tmp, a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("orb", OP_REG, OP_REG, OP_VOID); @@ -4394,7 +4403,7 @@ OP_25_8 () /* orw. */ void -OP_26_8 () +OP_26_8 (void) { uint16 tmp, a = (OP[0]), b = (GPR (OP[1])); trace_input ("orw", OP_CONSTANT4, OP_REG, OP_VOID); @@ -4406,7 +4415,7 @@ OP_26_8 () /* orw. */ void -OP_26B_C () +OP_26B_C (void) { uint16 tmp, a = (OP[0]), b = (GPR (OP[1])); trace_input ("orw", OP_CONSTANT16, OP_REG, OP_VOID); @@ -4417,7 +4426,7 @@ OP_26B_C () /* orw. */ void -OP_27_8 () +OP_27_8 (void) { uint16 tmp, a = (GPR (OP[0])), b = (GPR (OP[1])); trace_input ("orw", OP_REG, OP_REG, OP_VOID); @@ -4429,7 +4438,7 @@ OP_27_8 () /* lshb. */ void -OP_13_9 () +OP_13_9 (void) { uint16 a = OP[0]; uint16 tmp, b = (GPR (OP[1])) & 0xFF; @@ -4449,7 +4458,7 @@ OP_13_9 () /* lshb. */ void -OP_44_8 () +OP_44_8 (void) { uint16 a = (GPR (OP[0])) & 0xff; uint16 tmp, b = (GPR (OP[1])) & 0xFF; @@ -4475,7 +4484,7 @@ OP_44_8 () /* lshw. */ void -OP_46_8 () +OP_46_8 (void) { uint16 tmp, b = GPR (OP[1]); int16 a = GPR (OP[0]); @@ -4501,7 +4510,7 @@ OP_46_8 () /* lshw. */ void -OP_49_8 () +OP_49_8 (void) { uint16 tmp, b = GPR (OP[1]); uint16 a = OP[0]; @@ -4520,7 +4529,7 @@ OP_49_8 () /* lshd. */ void -OP_25_7 () +OP_25_7 (void) { uint32 tmp, b = GPR32 (OP[1]); uint16 a = OP[0]; @@ -4540,7 +4549,7 @@ OP_25_7 () /* lshd. */ void -OP_47_8 () +OP_47_8 (void) { uint32 tmp, b = GPR32 (OP[1]); uint16 a = GPR (OP[0]); @@ -4566,7 +4575,7 @@ OP_47_8 () /* ashub. */ void -OP_80_9 () +OP_80_9 (void) { uint16 a = OP[0]; int8 tmp, b = (GPR (OP[1])) & 0xFF; @@ -4586,7 +4595,7 @@ OP_80_9 () /* ashub. */ void -OP_81_9 () +OP_81_9 (void) { uint16 a = OP[0]; int8 tmp, b = (GPR (OP[1])) & 0xFF; @@ -4607,7 +4616,7 @@ OP_81_9 () /* ashub. */ void -OP_41_8 () +OP_41_8 (void) { int16 a = (GPR (OP[0])); int8 tmp, b = (GPR (OP[1])) & 0xFF; @@ -4636,7 +4645,7 @@ OP_41_8 () /* ashuw. */ void -OP_42_8 () +OP_42_8 (void) { int16 tmp, b = GPR (OP[1]); uint16 a = OP[0]; @@ -4656,7 +4665,7 @@ OP_42_8 () /* ashuw. */ void -OP_43_8 () +OP_43_8 (void) { int16 tmp, b = GPR (OP[1]); uint16 a = OP[0]; @@ -4675,7 +4684,7 @@ OP_43_8 () /* ashuw. */ void -OP_45_8 () +OP_45_8 (void) { int16 tmp; int16 a = GPR (OP[0]), b = GPR (OP[1]); @@ -4702,7 +4711,7 @@ OP_45_8 () /* ashud. */ void -OP_26_7 () +OP_26_7 (void) { int32 tmp,b = GPR32 (OP[1]); uint32 a = OP[0]; @@ -4721,7 +4730,7 @@ OP_26_7 () /* ashud. */ void -OP_27_7 () +OP_27_7 (void) { int32 tmp; int32 a = OP[0], b = GPR32 (OP[1]); @@ -4740,7 +4749,7 @@ OP_27_7 () /* ashud. */ void -OP_48_8 () +OP_48_8 (void) { int32 tmp; int32 a = GPR32 (OP[0]), b = GPR32 (OP[1]); @@ -4767,7 +4776,7 @@ OP_48_8 () /* storm. */ void -OP_16_D () +OP_16_D (void) { uint32 addr = GPR (1); uint16 count = OP[0], reg = 2; @@ -4797,7 +4806,7 @@ OP_16_D () /* stormp. */ void -OP_17_D () +OP_17_D (void) { uint32 addr = GPR32 (6); uint16 count = OP[0], reg = 2; @@ -4825,7 +4834,7 @@ OP_17_D () /* subb. */ void -OP_38_8 () +OP_38_8 (void) { uint8 a = OP[0]; uint8 b = (GPR (OP[1])) & 0xff; @@ -4841,7 +4850,7 @@ OP_38_8 () /* subb. */ void -OP_38B_C () +OP_38B_C (void) { uint8 a = OP[0] & 0xFF; uint8 b = (GPR (OP[1])) & 0xFF; @@ -4857,7 +4866,7 @@ OP_38B_C () /* subb. */ void -OP_39_8 () +OP_39_8 (void) { uint8 a = (GPR (OP[0])) & 0xFF; uint8 b = (GPR (OP[1])) & 0xFF; @@ -4873,7 +4882,7 @@ OP_39_8 () /* subw. */ void -OP_3A_8 () +OP_3A_8 (void) { uint16 a = OP[0]; uint16 b = GPR (OP[1]); @@ -4889,7 +4898,7 @@ OP_3A_8 () /* subw. */ void -OP_3AB_C () +OP_3AB_C (void) { uint16 a = OP[0]; uint16 b = GPR (OP[1]); @@ -4905,7 +4914,7 @@ OP_3AB_C () /* subw. */ void -OP_3B_8 () +OP_3B_8 (void) { uint16 a = GPR (OP[0]); uint16 b = GPR (OP[1]); @@ -4921,7 +4930,7 @@ OP_3B_8 () /* subcb. */ void -OP_3C_8 () +OP_3C_8 (void) { uint8 a = OP[0]; uint8 b = (GPR (OP[1])) & 0xff; @@ -4939,7 +4948,7 @@ OP_3C_8 () /* subcb. */ void -OP_3CB_C () +OP_3CB_C (void) { uint16 a = OP[0]; uint16 b = (GPR (OP[1])) & 0xff; @@ -4957,7 +4966,7 @@ OP_3CB_C () /* subcb. */ void -OP_3D_8 () +OP_3D_8 (void) { uint16 a = (GPR (OP[0])) & 0xff; uint16 b = (GPR (OP[1])) & 0xff; @@ -4974,7 +4983,7 @@ OP_3D_8 () /* subcw. */ void -OP_3E_8 () +OP_3E_8 (void) { uint16 a = OP[0], b = (GPR (OP[1])); uint16 tmp1 = a + (PSR_C); @@ -4990,7 +4999,7 @@ OP_3E_8 () /* subcw. */ void -OP_3EB_C () +OP_3EB_C (void) { int16 a = OP[0]; uint16 b = GPR (OP[1]); @@ -5007,7 +5016,7 @@ OP_3EB_C () /* subcw. */ void -OP_3F_8 () +OP_3F_8 (void) { uint16 a = (GPR (OP[0])), b = (GPR (OP[1])); uint16 tmp1 = a + (PSR_C); @@ -5023,7 +5032,7 @@ OP_3F_8 () /* subd. */ void -OP_3_C () +OP_3_C (void) { int32 a = OP[0]; uint32 b = GPR32 (OP[1]); @@ -5040,7 +5049,7 @@ OP_3_C () /* subd. */ void -OP_14C_14 () +OP_14C_14 (void) { uint32 a = GPR32 (OP[0]); uint32 b = GPR32 (OP[1]); @@ -5057,7 +5066,7 @@ OP_14C_14 () /* excp. */ void -OP_C_C () +OP_C_C (void) { uint32 tmp; uint16 a; @@ -5385,7 +5394,7 @@ OP_C_C () case 0x408: /* REVISIT: Added a dummy getenv call. */ trace_input ("<getenv>", OP_MEMREF, OP_MEMREF, OP_VOID); - RETVAL32(NULL); + RETVAL32 (0); trace_output_32 (result); break; @@ -5497,7 +5506,7 @@ OP_C_C () /* push. */ void -OP_3_9 () +OP_3_9 (void) { uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0; uint32 tmp, sp_addr = (GPR32 (15)) - (a * 2) - 4, is_regp = 0; @@ -5546,7 +5555,7 @@ OP_3_9 () /* push. */ void -OP_1_8 () +OP_1_8 (void) { uint32 sp_addr, tmp, is_regp = 0; uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0; @@ -5604,7 +5613,7 @@ OP_1_8 () /* push. */ void -OP_11E_10 () +OP_11E_10 (void) { uint32 sp_addr = (GPR32 (15)), tmp; trace_input ("push", OP_VOID, OP_VOID, OP_VOID); @@ -5617,7 +5626,7 @@ OP_11E_10 () /* pop. */ void -OP_5_9 () +OP_5_9 (void) { uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0; uint32 tmp, sp_addr = (GPR32 (15)), is_regp = 0;; @@ -5670,7 +5679,7 @@ OP_5_9 () /* pop. */ void -OP_2_8 () +OP_2_8 (void) { uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0; uint32 tmp, sp_addr = (GPR32 (15)), is_regp = 0; @@ -5724,7 +5733,7 @@ OP_2_8 () /* pop. */ void -OP_21E_10 () +OP_21E_10 (void) { uint32 sp_addr = GPR32 (15); uint32 tmp; @@ -5739,7 +5748,7 @@ OP_21E_10 () /* popret. */ void -OP_7_9 () +OP_7_9 (void) { uint16 a = OP[0], b = OP[1]; trace_input ("popret", OP_CONSTANT3, OP_REG, OP_REG); @@ -5751,7 +5760,7 @@ OP_7_9 () /* popret. */ void -OP_3_8 () +OP_3_8 (void) { uint16 a = OP[0], b = OP[1]; trace_input ("popret", OP_CONSTANT3, OP_REG, OP_VOID); @@ -5763,7 +5772,7 @@ OP_3_8 () /* popret. */ void -OP_31E_10 () +OP_31E_10 (void) { uint32 tmp; trace_input ("popret", OP_VOID, OP_VOID, OP_VOID); @@ -5788,7 +5797,7 @@ OP_31E_10 () /* cinv[i]. */ void -OP_A_10 () +OP_A_10 (void) { trace_input ("cinv[i]", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5797,7 +5806,7 @@ OP_A_10 () /* cinv[i,u]. */ void -OP_B_10 () +OP_B_10 (void) { trace_input ("cinv[i,u]", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5806,7 +5815,7 @@ OP_B_10 () /* cinv[d]. */ void -OP_C_10 () +OP_C_10 (void) { trace_input ("cinv[d]", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5815,7 +5824,7 @@ OP_C_10 () /* cinv[d,u]. */ void -OP_D_10 () +OP_D_10 (void) { trace_input ("cinv[i,u]", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5824,7 +5833,7 @@ OP_D_10 () /* cinv[d,i]. */ void -OP_E_10 () +OP_E_10 (void) { trace_input ("cinv[d,i]", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5833,7 +5842,7 @@ OP_E_10 () /* cinv[d,i,u]. */ void -OP_F_10 () +OP_F_10 (void) { trace_input ("cinv[d,i,u]", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5842,7 +5851,7 @@ OP_F_10 () /* retx. */ void -OP_3_10 () +OP_3_10 (void) { trace_input ("retx", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5851,7 +5860,7 @@ OP_3_10 () /* di. */ void -OP_4_10 () +OP_4_10 (void) { trace_input ("di", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5860,7 +5869,7 @@ OP_4_10 () /* ei. */ void -OP_5_10 () +OP_5_10 (void) { trace_input ("ei", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5869,7 +5878,7 @@ OP_5_10 () /* wait. */ void -OP_6_10 () +OP_6_10 (void) { trace_input ("wait", OP_VOID, OP_VOID, OP_VOID); State.exception = SIGTRAP; @@ -5878,7 +5887,7 @@ OP_6_10 () /* ewait. */ void -OP_7_10 () +OP_7_10 (void) { trace_input ("ewait", OP_VOID, OP_VOID, OP_VOID); SET_PSR_I (1); @@ -5887,7 +5896,7 @@ OP_7_10 () /* xorb. */ void -OP_28_8 () +OP_28_8 (void) { uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("xorb", OP_CONSTANT4, OP_REG, OP_VOID); @@ -5898,7 +5907,7 @@ OP_28_8 () /* xorb. */ void -OP_28B_C () +OP_28B_C (void) { uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("xorb", OP_CONSTANT16, OP_REG, OP_VOID); @@ -5909,7 +5918,7 @@ OP_28B_C () /* xorb. */ void -OP_29_8 () +OP_29_8 (void) { uint8 tmp, a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff; trace_input ("xorb", OP_REG, OP_REG, OP_VOID); @@ -5920,7 +5929,7 @@ OP_29_8 () /* xorw. */ void -OP_2A_8 () +OP_2A_8 (void) { uint16 tmp, a = (OP[0]), b = (GPR (OP[1])); trace_input ("xorw", OP_CONSTANT4, OP_REG, OP_VOID); @@ -5931,7 +5940,7 @@ OP_2A_8 () /* xorw. */ void -OP_2AB_C () +OP_2AB_C (void) { uint16 tmp, a = (OP[0]), b = (GPR (OP[1])); trace_input ("xorw", OP_CONSTANT16, OP_REG, OP_VOID); @@ -5942,7 +5951,7 @@ OP_2AB_C () /* xorw. */ void -OP_2B_8 () +OP_2B_8 (void) { uint16 tmp, a = (GPR (OP[0])), b = (GPR (OP[1])); trace_input ("xorw", OP_REG, OP_REG, OP_VOID); @@ -5955,7 +5964,7 @@ OP_2B_8 () /* lpr. */ void -OP_140_14 () +OP_140_14 (void) { uint16 a = GPR (OP[0]); trace_input ("lpr", OP_REG, OP_REG, OP_VOID); @@ -5965,7 +5974,7 @@ OP_140_14 () /* lprd. */ void -OP_141_14 () +OP_141_14 (void) { uint32 a = GPR32 (OP[0]); trace_input ("lprd", OP_REGP, OP_REG, OP_VOID); @@ -5975,7 +5984,7 @@ OP_141_14 () /* spr. */ void -OP_142_14 () +OP_142_14 (void) { uint16 a = CREG (OP[0]); trace_input ("spr", OP_REG, OP_REG, OP_VOID); @@ -5985,7 +5994,7 @@ OP_142_14 () /* sprd. */ void -OP_143_14 () +OP_143_14 (void) { uint32 a = CREG (OP[0]); trace_input ("sprd", OP_REGP, OP_REGP, OP_VOID); @@ -5995,7 +6004,7 @@ OP_143_14 () /* null. */ void -OP_0_20 () +OP_0_20 (void) { trace_input ("null", OP_VOID, OP_VOID, OP_VOID); State.exception = SIG_CR16_STOP; |