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-rw-r--r--gas/ChangeLog10
-rw-r--r--gas/doc/all.texi2
-rw-r--r--gas/doc/as.texinfo6
-rw-r--r--gas/doc/c-bfin.texi6
4 files changed, 19 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index ecbaa3c..7ed7a3a 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,15 @@
2009-09-04 Jie Zhang <jie.zhang@analog.com>
+ * doc/all.texi: Replace BFIN with Blackfin.
+ * doc/as.texinfo: Likewise.
+ * doc/c-bfin.texi: Likewise.
+ * doc/asconfig.texi: Likewise.
+
+ * doc/c-bfin.texi: Update -mcpu= option with bf512, bf514,
+ bf516 and bf518.
+
+2009-09-04 Jie Zhang <jie.zhang@analog.com>
+
* Makefile.am (bfin-parse.o): Remove bfin-parse.h from
the prerequisite. Add $(srcdir)/config/bfin-aux.h to the
prerequisite.
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index ccfa6c5..b16d26c 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -30,7 +30,7 @@
@set ARC
@set ARM
@set AVR
-@set BFIN
+@set Blackfin
@set CR16
@set CRIS
@set D10V
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index ae56183..c9bc1a3 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -6716,8 +6716,8 @@ subject, see the hardware manufacturer's manual.
@ifset AVR
* AVR-Dependent:: AVR Dependent Features
@end ifset
-@ifset BFIN
-* BFIN-Dependent:: BFIN Dependent Features
+@ifset Blackfin
+* Blackfin-Dependent:: Blackfin Dependent Features
@end ifset
@ifset CR16
* CR16-Dependent:: CR16 Dependent Features
@@ -6851,7 +6851,7 @@ subject, see the hardware manufacturer's manual.
@include c-avr.texi
@end ifset
-@ifset BFIN
+@ifset Blackfin
@include c-bfin.texi
@end ifset
diff --git a/gas/doc/c-bfin.texi b/gas/doc/c-bfin.texi
index 04d7ee1..aab4bcc 100644
--- a/gas/doc/c-bfin.texi
+++ b/gas/doc/c-bfin.texi
@@ -4,7 +4,7 @@
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
-@node BFIN-Dependent
+@node Blackfin-Dependent
@chapter Blackfin Dependent Features
@end ifset
@ifclear GENERIC
@@ -34,6 +34,10 @@ is not used in assembler. It's here such that GCC can easily pass down its
error message if an attempt is made to assemble an instruction which
will not execute on the target processor. The following processor names are
recognized:
+@code{bf512},
+@code{bf514},
+@code{bf516},
+@code{bf518},
@code{bf522},
@code{bf523},
@code{bf524},