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-rw-r--r--bfd/ChangeLog5
-rw-r--r--bfd/elf32-spu.c78
-rw-r--r--ld/ChangeLog5
-rw-r--r--ld/emultempl/spuelf.em2
-rw-r--r--ld/testsuite/ChangeLog4
-rw-r--r--ld/testsuite/ld-spu/icache1.d166
6 files changed, 108 insertions, 152 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index b5951c3..603216b 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,10 @@
2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
+ * elf32-spu.c (build_stub): Always build "compact" sofware
+ i-cache stubs.
+
+2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
+
* elf32-spu.c (struct spu_link_hash_table): Add fromelem_size_log2.
(spu_elf_setup): Initialize it.
(spu_elf_size_stubs): Move .ovtab into .bss for software i-cache.
diff --git a/bfd/elf32-spu.c b/bfd/elf32-spu.c
index a0368d0..81ef78b 100644
--- a/bfd/elf32-spu.c
+++ b/bfd/elf32-spu.c
@@ -1271,7 +1271,8 @@ build_stub (struct bfd_link_info *info,
bfd_put_32 (sec->owner, (dest & 0x3ffff) | (dest_ovl << 18),
sec->contents + sec->size + 4);
}
- else if (htab->params->ovly_flavour == ovly_soft_icache)
+ else if (htab->params->ovly_flavour == ovly_soft_icache
+ && htab->params->compact_stub)
{
lrlive = 0;
if (stub_type == nonovl_stub)
@@ -1357,61 +1358,32 @@ build_stub (struct bfd_link_info *info,
+ htab->ovly_entry[1]->root.u.def.section->output_offset
+ htab->ovly_entry[1]->root.u.def.section->output_section->vma);
- if (!htab->params->compact_stub)
+ /* The branch that uses this stub goes to stub_addr + 4. We'll
+ set up an xor pattern that can be used by the icache manager
+ to modify this branch to go directly to its destination. */
+ g->stub_addr += 4;
+ br_dest = g->stub_addr;
+ if (irela == NULL)
{
- /* The branch that uses this stub goes to stub_addr + 12. We'll
- set up an xor pattern that can be used by the icache manager
- to modify this branch to go directly to its destination. */
- g->stub_addr += 12;
- br_dest = g->stub_addr;
- if (irela == NULL)
- {
- /* Except in the case of _SPUEAR_ stubs, the branch in
- question is the one in the stub itself. */
- BFD_ASSERT (stub_type == nonovl_stub);
- g->br_addr = g->stub_addr;
- br_dest = to;
- }
-
- bfd_put_32 (sec->owner, dest_ovl - 1,
- sec->contents + sec->size + 0);
- set_id = ((dest_ovl - 1) >> htab->num_lines_log2) + 1;
- bfd_put_32 (sec->owner, (set_id << 18) | (dest & 0x3ffff),
- sec->contents + sec->size + 4);
- bfd_put_32 (sec->owner, (lrlive << 29) | (g->br_addr & 0x3ffff),
- sec->contents + sec->size + 8);
- bfd_put_32 (sec->owner, BRASL + ((to << 5) & 0x007fff80) + 75,
- sec->contents + sec->size + 12);
- patt = dest ^ br_dest;
- if (irela != NULL && ELF32_R_TYPE (irela->r_info) == R_SPU_REL16)
- patt = (dest - g->br_addr) ^ (br_dest - g->br_addr);
- bfd_put_32 (sec->owner, (patt << 5) & 0x007fff80,
- sec->contents + sec->size + 16 + (g->br_addr & 0xf));
+ /* Except in the case of _SPUEAR_ stubs, the branch in
+ question is the one in the stub itself. */
+ BFD_ASSERT (stub_type == nonovl_stub);
+ g->br_addr = g->stub_addr;
+ br_dest = to;
}
- else
- {
- g->stub_addr += 4;
- br_dest = g->stub_addr;
- if (irela == NULL)
- {
- BFD_ASSERT (stub_type == nonovl_stub);
- g->br_addr = g->stub_addr;
- br_dest = to;
- }
- set_id = ((dest_ovl - 1) >> htab->num_lines_log2) + 1;
- bfd_put_32 (sec->owner, (set_id << 18) | (dest & 0x3ffff),
- sec->contents + sec->size);
- bfd_put_32 (sec->owner, BRASL + ((to << 5) & 0x007fff80) + 75,
- sec->contents + sec->size + 4);
- bfd_put_32 (sec->owner, (lrlive << 29) | (g->br_addr & 0x3ffff),
- sec->contents + sec->size + 8);
- patt = dest ^ br_dest;
- if (irela != NULL && ELF32_R_TYPE (irela->r_info) == R_SPU_REL16)
- patt = (dest - g->br_addr) ^ (br_dest - g->br_addr);
- bfd_put_32 (sec->owner, (patt << 5) & 0x007fff80,
- sec->contents + sec->size + 12);
- }
+ set_id = ((dest_ovl - 1) >> htab->num_lines_log2) + 1;
+ bfd_put_32 (sec->owner, (set_id << 18) | (dest & 0x3ffff),
+ sec->contents + sec->size);
+ bfd_put_32 (sec->owner, BRASL + ((to << 5) & 0x007fff80) + 75,
+ sec->contents + sec->size + 4);
+ bfd_put_32 (sec->owner, (lrlive << 29) | (g->br_addr & 0x3ffff),
+ sec->contents + sec->size + 8);
+ patt = dest ^ br_dest;
+ if (irela != NULL && ELF32_R_TYPE (irela->r_info) == R_SPU_REL16)
+ patt = (dest - g->br_addr) ^ (br_dest - g->br_addr);
+ bfd_put_32 (sec->owner, (patt << 5) & 0x007fff80,
+ sec->contents + sec->size + 12);
if (ovl == 0)
/* Extra space for linked list entries. */
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 04b3bae..b9c2965 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,8 @@
+2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * emultempl/spuelf.em (PARSE_AND_LIST_ARGS_CASES): Always use
+ compact stubs with software i-cache.
+
2009-05-14 Alan Modra <amodra@bigpond.net.au>
* emultempl/spuelf.em (spu_before_allocation): Call
diff --git a/ld/emultempl/spuelf.em b/ld/emultempl/spuelf.em
index 2ddf662..1b549ad 100644
--- a/ld/emultempl/spuelf.em
+++ b/ld/emultempl/spuelf.em
@@ -719,6 +719,8 @@ PARSE_AND_LIST_ARGS_CASES='
case OPTION_SPU_SOFT_ICACHE:
params.ovly_flavour = ovly_soft_icache;
+ /* Software i-cache stubs are always "compact". */
+ params.compact_stub = 1;
if (!num_lines_set)
params.num_lines = 32;
else if ((params.num_lines & -params.num_lines) != params.num_lines)
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index fc9640c..b9100b6 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,9 @@
2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
+ * ld-spu/icache1.d: Update for compact stubs.
+
+2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
+
* ld-spu/icache1.d: Update all addresses to accomodate icache
buffer shifted down 0x800 bytes.
diff --git a/ld/testsuite/ld-spu/icache1.d b/ld/testsuite/ld-spu/icache1.d
index 9342862..f73c6c0 100644
--- a/ld/testsuite/ld-spu/icache1.d
+++ b/ld/testsuite/ld-spu/icache1.d
@@ -26,30 +26,23 @@ Disassembly of section \.ovly2:
.* 24 00 40 80 stqd \$0,16\(\$1\)
.* 1c f0 00 81 ai \$1,\$1,-64
.* 24 00 00 81 stqd \$1,0\(\$1\)
-.* 33 00 73 80 brsl \$0,7ac .*
-.* 33 00 77 00 brsl \$0,7cc .*
- \.\.\.
-.* 32 00 16 80 br 7ec .*
- \.\.\.
- 7a0: 00 00 00 02.*
- 7a4: 00 04 09 04.*
- 7a8: a0 00 04 10.*
- 7ac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- 7b0: 00 00 ed 00.*
- \.\.\.
- 7c0: 00 00 00 02.*
- 7c4: 00 04 08 00.*
- 7c8: a0 00 04 14.*
- 7cc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- 7d0: 00 00 00 00.*
- 7d4: 00 00 0a 80.*
- \.\.\.
- 7e4: 00 04 00 00.*
- 7e8: 20 00 07 38.*
- 7ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- \.\.\.
- 7f8: 00 7f 0f 80.*
- 7fc: 00 00 00 00.*
+.* 33 00 78 80 brsl \$0,7d4 .*
+.* 33 00 7a 00 brsl \$0,7e4 .*
+ \.\.\.
+.* 32 00 17 80 br 7f4 .*
+ \.\.\.
+ 7d0: 00 04 09 04.*
+ 7d4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 7d8: a0 00 04 10.*
+ 7dc: 00 00 e6 00.*
+ 7e0: 00 04 08 00.*
+ 7e4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 7e8: a0 00 04 14.*
+ 7ec: 00 00 07 80.*
+ 7f0: 00 04 00 00.*
+ 7f4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 7f8: 20 00 07 38.*
+ 7fc: 00 7f 0e 80.*
Disassembly of section \.ovly3:
@@ -86,43 +79,33 @@ Disassembly of section \.ovly5:
.* 42 01 00 03 ila \$3,200 .*
.* 18 00 c0 81 a \$1,\$1,\$3
.* 34 00 40 80 lqd \$0,16\(\$1\)
-.* 30 00 7d 80 bra 3ec .*
+.* 30 00 7e 80 bra 3f4 .*
\.\.\.
- 3e0: 00 00 00 03.*
- 3e4: 00 04 0c 00.*
- 3e8: a0 00 03 2c.*
- 3ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- \.\.\.
- 3fc: 00 01 fd 80.*
+ 3f0: 00 04 0c 00.*
+ 3f4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 3f8: a0 00 03 2c.*
+ 3fc: 00 01 fe 80.*
Disassembly of section \.ovly6:
00000400 <\.ovly6>:
-.* 31 00 f5 80 brasl \$0,7ac .*
-.* 33 00 79 00 brsl \$0,7cc .*
- \.\.\.
-.* 32 00 18 80 br 7ec .*
- \.\.\.
- 7a0: 00 00 00 07.*
- 7a4: 00 08 0c 00.*
- 7a8: a0 00 04 00.*
- 7ac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- 7b0: 00 01 75 80.*
- \.\.\.
- 7c0: 00 00 00 07.*
- 7c4: 00 08 0c 00.*
- 7c8: a0 00 04 04.*
- 7cc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- 7d0: 00 00 00 00.*
- 7d4: 00 00 86 80.*
- \.\.\.
- 7e0: 00 00 00 04.*
- 7e4: 00 08 00 00.*
- 7e8: 20 00 07 28.*
- 7ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- \.\.\.
- 7f8: 00 7f 03 80.*
- 7fc: 00 00 00 00.*
+.* 31 00 fa 80 brasl \$0,7d4 .*
+.* 33 00 7c 00 brsl \$0,7e4 .*
+ \.\.\.
+.* 32 00 19 80 br 7f4 .*
+ \.\.\.
+ 7d0: 00 08 0c 00.*
+ 7d4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 7d8: a0 00 04 00.*
+ 7dc: 00 01 7a 80.*
+ 7e0: 00 08 0c 00.*
+ 7e4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 7e8: a0 00 04 04.*
+ 7ec: 00 00 83 80.*
+ 7f0: 00 08 00 00.*
+ 7f4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ 7f8: 20 00 07 28.*
+ 7fc: 00 7f 02 80.*
Disassembly of section \.ovly7:
@@ -133,32 +116,24 @@ Disassembly of section \.ovly7:
.* 00 20 00 00 lnop
.* 04 00 02 01 ori \$1,\$4,0
.* 24 00 02 04 stqd \$4,0\(\$4\)
-.* 33 00 72 80 brsl \$0,bac .*
-.* 33 00 76 00 brsl \$0,bcc .*
+.* 33 00 77 80 brsl \$0,bd4 .*
+.* 33 00 79 00 brsl \$0,be4 .*
.* 34 00 00 81 lqd \$1,0\(\$1\)
\.\.\.
-.* 32 00 15 00 br bec .*
- \.\.\.
- ba0: 00 00 00 03.*
- ba4: 00 04 0c 00.*
- ba8: a0 00 08 18.*
- bac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- \.\.\.
- bb8: 00 00 0f 80.*
- bbc: 00 00 00 00.*
- bc0: 00 00 00 07.*
- bc4: 00 08 0c 00.*
- bc8: a0 00 08 1c.*
- bcc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+.* 32 00 16 00 br bf4 .*
\.\.\.
+ bd0: 00 04 0c 00.*
+ bd4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ bd8: a0 00 08 18.*
bdc: 00 00 0a 80.*
- be0: 00 00 00 05.*
- be4: 00 08 04 00.*
- be8: 20 00 0b 44.*
- bec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- bf0: 00 00 00 00.*
- bf4: 00 7f 02 80.*
- \.\.\.
+ be0: 00 08 0c 00.*
+ be4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ be8: a0 00 08 1c.*
+ bec: 00 00 05 80.*
+ bf0: 00 08 04 00.*
+ bf4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ bf8: 20 00 0b 44.*
+ bfc: 00 7f 01 80.*
Disassembly of section \.ovly8:
@@ -166,39 +141,32 @@ Disassembly of section \.ovly8:
.* 24 00 40 80 stqd \$0,16\(\$1\)
.* 24 f8 00 81 stqd \$1,-512\(\$1\)
.* 1c 80 00 81 ai \$1,\$1,-512
-.* 31 01 f9 80 brasl \$0,fcc .*
+.* 31 01 fc 80 brasl \$0,fe4 .*
\.\.\.
-.* 32 00 17 80 br fec .*
- \.\.\.
- fc0: 00 00 00 02.*
- fc4: 00 04 09 04.*
- fc8: a0 00 0c 0c.*
- fcc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- \.\.\.
- fdc: 00 00 d9 00.*
- fe0: 00 00 00 06.*
- fe4: 00 08 08 00.*
- fe8: 20 00 0f 30.*
- fec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
- ff0: 00 7f 0d 80.*
+.* 32 00 18 80 br ff4 .*
\.\.\.
+ fe0: 00 04 09 04.*
+ fe4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ fe8: a0 00 0c 0c.*
+ fec: 00 00 dc 00.*
+ ff0: 00 08 08 00.*
+ ff4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
+ ff8: 20 00 0f 30.*
+ ffc: 00 7f 02 80.*
Disassembly of section \.text:
00001000 <_start>:
.* 41 00 02 03 ilhu \$3,4
.* 60 86 00 03 iohl \$3,3072 # c00
-.* 32 00 04 80 br 102c.*
+.* 32 00 03 80 br 1024.*
0000100c <__icache_br_handler>:
100c: 00 00 00 00 stop
00001010 <__icache_call_handler>:
\.\.\.
- 1020: 00 00 00 01.*
- 1024: 00 04 04 00.*
+ 1020: 00 04 04 00.*
+ 1024: 31 02 02 4b brasl \$75,1010 <__icache_call_handler>
1028: a0 00 10 08.*
- 102c: 31 02 02 4b brasl \$75,1010 <__icache_call_handler>
- \.\.\.
- 1038: 00 7e 7b 80.*
- \.\.\.
+ 102c: 00 7e 7c 80.*
#pass
generated by cgit v1.1 at 2024-09-16 12:18:29 +0000