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-rw-r--r--bfd/elfxx-riscv.c1
-rw-r--r--gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d36
-rw-r--r--opcodes/riscv-opc.c28
3 files changed, 51 insertions, 14 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 069832f..b280618 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1104,6 +1104,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"zfh", "zicsr", check_implicit_always},
{"zqinx", "zdinx", check_implicit_always},
{"zdinx", "zfinx", check_implicit_always},
+ {"zfinx", "zicsr", check_implicit_always},
{"zk", "zkn", check_implicit_always},
{"zk", "zkr", check_implicit_always},
{"zk", "zkt", check_implicit_always},
diff --git a/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d b/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d
new file mode 100644
index 0000000..6e86398
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d
@@ -0,0 +1,36 @@
+#source: csr-insns-pseudo.s
+#as: -march=rv32i_zfinx
+#objdump: -dr
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <pseudo_csr_insn>:
+[ ]+[0-9a-f]+:[ ]+000022f3[ ]+csrr[ ]+t0,ustatus
+[ ]+[0-9a-f]+:[ ]+00029073[ ]+csrw[ ]+ustatus,t0
+[ ]+[0-9a-f]+:[ ]+0002a073[ ]+csrs[ ]+ustatus,t0
+[ ]+[0-9a-f]+:[ ]+0002b073[ ]+csrc[ ]+ustatus,t0
+[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrwi[ ]+ustatus,31
+[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrsi[ ]+ustatus,31
+[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrci[ ]+ustatus,31
+[ ]+[0-9a-f]+:[ ]+c00022f3[ ]+rdcycle[ ]+t0
+[ ]+[0-9a-f]+:[ ]+c01022f3[ ]+rdtime[ ]+t0
+[ ]+[0-9a-f]+:[ ]+c02022f3[ ]+rdinstret[ ]+t0
+[ ]+[0-9a-f]+:[ ]+c80022f3[ ]+rdcycleh[ ]+t0
+[ ]+[0-9a-f]+:[ ]+c81022f3[ ]+rdtimeh[ ]+t0
+[ ]+[0-9a-f]+:[ ]+c82022f3[ ]+rdinstreth[ ]+t0
+[ ]+[0-9a-f]+:[ ]+003022f3[ ]+frcsr[ ]+t0
+[ ]+[0-9a-f]+:[ ]+003392f3[ ]+fscsr[ ]+t0,t2
+[ ]+[0-9a-f]+:[ ]+00339073[ ]+fscsr[ ]+t2
+[ ]+[0-9a-f]+:[ ]+002022f3[ ]+frrm[ ]+t0
+[ ]+[0-9a-f]+:[ ]+002312f3[ ]+fsrm[ ]+t0,t1
+[ ]+[0-9a-f]+:[ ]+00231073[ ]+fsrm[ ]+t1
+[ ]+[0-9a-f]+:[ ]+002fd2f3[ ]+fsrmi[ ]+t0,31
+[ ]+[0-9a-f]+:[ ]+002fd073[ ]+fsrmi[ ]+zero,31
+[ ]+[0-9a-f]+:[ ]+001022f3[ ]+frflags[ ]+t0
+[ ]+[0-9a-f]+:[ ]+001312f3[ ]+fsflags[ ]+t0,t1
+[ ]+[0-9a-f]+:[ ]+00131073[ ]+fsflags[ ]+t1
+[ ]+[0-9a-f]+:[ ]+001fd2f3[ ]+fsflagsi[ ]+t0,31
+[ ]+[0-9a-f]+:[ ]+001fd073[ ]+fsflagsi[ ]+zero,31
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index eaba3cb..bbd4a37 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -638,22 +638,22 @@ const struct riscv_opcode riscv_opcodes[] =
{"fcvt.h.lu", 64, INSN_CLASS_ZFH, "D,s,m", MATCH_FCVT_H_LU, MASK_FCVT_H_LU, match_opcode, 0 },
/* Single-precision floating-point instruction subset. */
-{"frcsr", 0, INSN_CLASS_F, "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, INSN_ALIAS },
-{"frsr", 0, INSN_CLASS_F, "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, INSN_ALIAS },
-{"fscsr", 0, INSN_CLASS_F, "s", MATCH_FSCSR, MASK_FSCSR|MASK_RD, match_opcode, INSN_ALIAS },
-{"fscsr", 0, INSN_CLASS_F, "d,s", MATCH_FSCSR, MASK_FSCSR, match_opcode, INSN_ALIAS },
-{"fssr", 0, INSN_CLASS_F, "s", MATCH_FSCSR, MASK_FSCSR|MASK_RD, match_opcode, INSN_ALIAS },
-{"fssr", 0, INSN_CLASS_F, "d,s", MATCH_FSCSR, MASK_FSCSR, match_opcode, INSN_ALIAS },
-{"frrm", 0, INSN_CLASS_F, "d", MATCH_FRRM, MASK_FRRM, match_opcode, INSN_ALIAS },
-{"fsrm", 0, INSN_CLASS_F, "s", MATCH_FSRM, MASK_FSRM|MASK_RD, match_opcode, INSN_ALIAS },
-{"fsrm", 0, INSN_CLASS_F, "d,s", MATCH_FSRM, MASK_FSRM, match_opcode, INSN_ALIAS },
-{"fsrmi", 0, INSN_CLASS_F, "d,Z", MATCH_FSRMI, MASK_FSRMI, match_opcode, INSN_ALIAS },
-{"fsrmi", 0, INSN_CLASS_F, "Z", MATCH_FSRMI, MASK_FSRMI|MASK_RD, match_opcode, INSN_ALIAS },
+{"frcsr", 0, INSN_CLASS_F_OR_ZFINX, "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, INSN_ALIAS },
+{"frsr", 0, INSN_CLASS_F_OR_ZFINX, "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, INSN_ALIAS },
+{"fscsr", 0, INSN_CLASS_F_OR_ZFINX, "s", MATCH_FSCSR, MASK_FSCSR|MASK_RD, match_opcode, INSN_ALIAS },
+{"fscsr", 0, INSN_CLASS_F_OR_ZFINX, "d,s", MATCH_FSCSR, MASK_FSCSR, match_opcode, INSN_ALIAS },
+{"fssr", 0, INSN_CLASS_F_OR_ZFINX, "s", MATCH_FSCSR, MASK_FSCSR|MASK_RD, match_opcode, INSN_ALIAS },
+{"fssr", 0, INSN_CLASS_F_OR_ZFINX, "d,s", MATCH_FSCSR, MASK_FSCSR, match_opcode, INSN_ALIAS },
+{"frrm", 0, INSN_CLASS_F_OR_ZFINX, "d", MATCH_FRRM, MASK_FRRM, match_opcode, INSN_ALIAS },
+{"fsrm", 0, INSN_CLASS_F_OR_ZFINX, "s", MATCH_FSRM, MASK_FSRM|MASK_RD, match_opcode, INSN_ALIAS },
+{"fsrm", 0, INSN_CLASS_F_OR_ZFINX, "d,s", MATCH_FSRM, MASK_FSRM, match_opcode, INSN_ALIAS },
+{"fsrmi", 0, INSN_CLASS_F_OR_ZFINX, "d,Z", MATCH_FSRMI, MASK_FSRMI, match_opcode, INSN_ALIAS },
+{"fsrmi", 0, INSN_CLASS_F_OR_ZFINX, "Z", MATCH_FSRMI, MASK_FSRMI|MASK_RD, match_opcode, INSN_ALIAS },
{"frflags", 0, INSN_CLASS_F_OR_ZFINX, "d", MATCH_FRFLAGS, MASK_FRFLAGS, match_opcode, INSN_ALIAS },
{"fsflags", 0, INSN_CLASS_F_OR_ZFINX, "s", MATCH_FSFLAGS, MASK_FSFLAGS|MASK_RD, match_opcode, INSN_ALIAS },
-{"fsflags", 0, INSN_CLASS_F, "d,s", MATCH_FSFLAGS, MASK_FSFLAGS, match_opcode, INSN_ALIAS },
-{"fsflagsi", 0, INSN_CLASS_F, "d,Z", MATCH_FSFLAGSI, MASK_FSFLAGSI, match_opcode, INSN_ALIAS },
-{"fsflagsi", 0, INSN_CLASS_F, "Z", MATCH_FSFLAGSI, MASK_FSFLAGSI|MASK_RD, match_opcode, INSN_ALIAS },
+{"fsflags", 0, INSN_CLASS_F_OR_ZFINX, "d,s", MATCH_FSFLAGS, MASK_FSFLAGS, match_opcode, INSN_ALIAS },
+{"fsflagsi", 0, INSN_CLASS_F_OR_ZFINX, "d,Z", MATCH_FSFLAGSI, MASK_FSFLAGSI, match_opcode, INSN_ALIAS },
+{"fsflagsi", 0, INSN_CLASS_F_OR_ZFINX, "Z", MATCH_FSFLAGSI, MASK_FSFLAGSI|MASK_RD, match_opcode, INSN_ALIAS },
{"flw", 32, INSN_CLASS_F_AND_C, "D,Cm(Cc)", MATCH_C_FLWSP, MASK_C_FLWSP, match_opcode, INSN_ALIAS|INSN_DREF|INSN_4_BYTE },
{"flw", 32, INSN_CLASS_F_AND_C, "CD,Ck(Cs)", MATCH_C_FLW, MASK_C_FLW, match_opcode, INSN_ALIAS|INSN_DREF|INSN_4_BYTE },
{"flw", 0, INSN_CLASS_F, "D,o(s)", MATCH_FLW, MASK_FLW, match_opcode, INSN_DREF|INSN_4_BYTE },
generated by cgit v1.1 at 2024-09-13 13:05:58 +0000