aboutsummaryrefslogtreecommitdiff
path: root/sim
diff options
context:
space:
mode:
authorMike Frysinger <vapier@gentoo.org>2021-06-15 00:39:28 -0400
committerMike Frysinger <vapier@gentoo.org>2021-06-16 01:51:32 -0400
commit7b2298cbd812320c7f78d41d556ecb174cfdd675 (patch)
tree8b63620515e20a0bd7e0aafe11a1970aac52b204 /sim
parenta8a3d90792ae60239ef6ae9c38f133c8ade40761 (diff)
downloadfsf-binutils-gdb-7b2298cbd812320c7f78d41d556ecb174cfdd675.zip
fsf-binutils-gdb-7b2298cbd812320c7f78d41d556ecb174cfdd675.tar.gz
fsf-binutils-gdb-7b2298cbd812320c7f78d41d556ecb174cfdd675.tar.bz2
sim: mips: fix uninitialized register use
In the default case, this code will read from this variable before it is initialized as a dummy access. Set it to 0 to fix the compiler warning.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/dv-tx3904irc.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index fcc8ab3..1e57fe5 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,5 +1,10 @@
2021-06-16 Mike Frysinger <vapier@gentoo.org>
+ * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
+ register_value to 0.
+
+2021-06-16 Mike Frysinger <vapier@gentoo.org>
+
* configure: Regenerate.
2021-06-16 Mike Frysinger <vapier@gentoo.org>
diff --git a/sim/mips/dv-tx3904irc.c b/sim/mips/dv-tx3904irc.c
index 0896b0f..6fbe61c 100644
--- a/sim/mips/dv-tx3904irc.c
+++ b/sim/mips/dv-tx3904irc.c
@@ -381,7 +381,7 @@ tx3904irc_io_write_buffer (struct hw *me,
int reg_number = (address - controller->base_address) / 4;
int reg_offset = (address - controller->base_address) % 4;
unsigned_4* register_ptr;
- unsigned_4 register_value;
+ unsigned_4 register_value = 0;
/* fill in entire register_value word */
switch (reg_number)