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| author | Mike Frysinger <vapier@gentoo.org> | 2021-06-17 00:12:15 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-06-17 00:14:02 -0400 |
| commit | 209f108f73888741bf31d03d35722b6e0b521ec8 (patch) | |
| tree | 5374414480176263b5160ba9c5dc810ecd1422b3 /sim | |
| parent | ef5058ae8714d68c0f671726618e721681523ac5 (diff) | |
| download | fsf-binutils-gdb-209f108f73888741bf31d03d35722b6e0b521ec8.zip fsf-binutils-gdb-209f108f73888741bf31d03d35722b6e0b521ec8.tar.gz fsf-binutils-gdb-209f108f73888741bf31d03d35722b6e0b521ec8.tar.bz2 | |
sim: mn10300: tweak static inlines
Use INLINE2 instead of INLINE to fix builds when -O0 are used -- the
latter define is omitted at -O0 levels while the former is always
set to inline. These helper funcs are used by defines in here but
the defines aren't always called.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mn10300/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/mn10300/mn10300_sim.h | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index e4db482..0e2c36f 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,3 +1,7 @@ +2021-06-17 Mike Frysinger <vapier@gentoo.org> + + * mn10300_sim.h (u642dw, dw2u64): Change INLINE to INLINE2. + 2021-06-16 Mike Frysinger <vapier@gentoo.org> * configure: Regenerate. diff --git a/sim/mn10300/mn10300_sim.h b/sim/mn10300/mn10300_sim.h index c63efaa..1f696d5 100644 --- a/sim/mn10300/mn10300_sim.h +++ b/sim/mn10300/mn10300_sim.h @@ -158,7 +158,7 @@ sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR)) u642dw (sim_core_read_unaligned_8 (STATE_CPU (simulator, 0), \ PC, read_map, (ADDR))) -static INLINE dword +static INLINE2 dword u642dw (unsigned64 dw) { dword r; @@ -185,7 +185,7 @@ sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \ sim_core_write_unaligned_8 (STATE_CPU (simulator, 0), \ PC, write_map, (ADDR), dw2u64 (DATA)) -static INLINE unsigned64 +static INLINE2 unsigned64 dw2u64 (dword data) { return data.low | (((unsigned64)data.high) << 32); |