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author | Mike Frysinger <vapier@gentoo.org> | 2021-04-26 23:17:15 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2021-05-04 21:49:11 -0400 |
commit | 4d47dcfcf1cf8fa34df057b0d5accf7ab91b6b47 (patch) | |
tree | 26eb47648d74bd22f6c1cd76523117157e48aac4 /sim | |
parent | cd09ab7c7463d05fe27e3dab4f97bb8aa6570413 (diff) | |
download | fsf-binutils-gdb-4d47dcfcf1cf8fa34df057b0d5accf7ab91b6b47.zip fsf-binutils-gdb-4d47dcfcf1cf8fa34df057b0d5accf7ab91b6b47.tar.gz fsf-binutils-gdb-4d47dcfcf1cf8fa34df057b0d5accf7ab91b6b47.tar.bz2 |
sim: microblaze: enable some basic trace points
This isn't super complete, but it's useful enough as-is.
Diffstat (limited to 'sim')
-rw-r--r-- | sim/microblaze/ChangeLog | 6 | ||||
-rw-r--r-- | sim/microblaze/interp.c | 2 | ||||
-rw-r--r-- | sim/microblaze/microblaze.isa | 1 |
3 files changed, 9 insertions, 0 deletions
diff --git a/sim/microblaze/ChangeLog b/sim/microblaze/ChangeLog index 8300491..c78e896 100644 --- a/sim/microblaze/ChangeLog +++ b/sim/microblaze/ChangeLog @@ -1,5 +1,11 @@ 2021-05-04 Mike Frysinger <vapier@gentoo.org> + * interp.c (sim_engine_run): Call TRACE_INSN. + (INSTRUCTION): Likewise. + * microblaze.isa (addi): Call TRACE_REGISTER. + +2021-05-04 Mike Frysinger <vapier@gentoo.org> + * interp.c: Include sim-syscall.h. (sim_engine_run): Call sim_syscall for brki instructions. diff --git a/sim/microblaze/interp.c b/sim/microblaze/interp.c index 1292918..bff7327 100644 --- a/sim/microblaze/interp.c +++ b/sim/microblaze/interp.c @@ -168,6 +168,7 @@ sim_engine_run (SIM_DESC sd, { insts += 1; bonus_cycles++; + TRACE_INSN (cpu, "HALT (%i)", RETREG); sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_exited, RETREG); } else @@ -176,6 +177,7 @@ sim_engine_run (SIM_DESC sd, { #define INSTRUCTION(NAME, OPCODE, TYPE, ACTION) \ case NAME: \ + TRACE_INSN (cpu, #NAME); \ ACTION; \ break; #include "microblaze.isa" diff --git a/sim/microblaze/microblaze.isa b/sim/microblaze/microblaze.isa index a7ac0d4..1d96e8f 100644 --- a/sim/microblaze/microblaze.isa +++ b/sim/microblaze/microblaze.isa @@ -110,6 +110,7 @@ INSTRUCTION(addi, INST_TYPE_RD_RA_IMM, CARRY = C_calc(RA, IMM, 0); RD = RA + IMM; + TRACE_REGISTER (cpu, "r%i = r%i + %i", rd, ra, IMM); C_wr(CARRY); PC += INST_SIZE) |