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| author | Jiri Gaisler <jiri@gaisler.se> | 2015-02-19 23:31:21 +0100 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2015-02-21 23:18:23 -0500 |
| commit | 20a0ffe33a7d43ba13eff917ec3f50b4f7644f81 (patch) | |
| tree | 6c18f423308e80f747ec8a2bb0a576c1c858be00 /sim | |
| parent | df9bc4163b1331c8a4dad6830afeff4ff305a20a (diff) | |
| download | fsf-binutils-gdb-20a0ffe33a7d43ba13eff917ec3f50b4f7644f81.zip fsf-binutils-gdb-20a0ffe33a7d43ba13eff917ec3f50b4f7644f81.tar.gz fsf-binutils-gdb-20a0ffe33a7d43ba13eff917ec3f50b4f7644f81.tar.bz2 | |
sim/erc32: Perform pseudo-init if binary linked to non-zero address.
Binaries produced by most erc32 tool-chains do not include
system initialization. sis will detect this and initialize
necessary registers for memory and timer control.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/erc32/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/erc32/erc32.c | 24 | ||||
| -rw-r--r-- | sim/erc32/func.c | 2 | ||||
| -rw-r--r-- | sim/erc32/interf.c | 2 |
4 files changed, 37 insertions, 0 deletions
diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog index 3757e5b..38c3a32 100644 --- a/sim/erc32/ChangeLog +++ b/sim/erc32/ChangeLog @@ -1,5 +1,14 @@ 2015-02-21 Jiri Gaisler <jiri@gaisler.se> + * erc32.c (mec_read): Allow simulator memory size to be read + by application. + (boot_init): initialize memory and timers if start address is + not 0. + * func.c (exe_cmd): Call boot_init if start address not 0. + * interf.c (run_sim): Likewise. + +2015-02-21 Jiri Gaisler <jiri@gaisler.se> + * exec.c (init_regs): erc32 has vendor ID 1 and version ID 1 in %psr. 2015-02-21 Jiri Gaisler <jiri@gaisler.se> diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c index 4d4177e..428d6c4 100644 --- a/sim/erc32/erc32.c +++ b/sim/erc32/erc32.c @@ -743,6 +743,14 @@ mec_read(addr, asi, data) *data = read_uart(addr); break; + case 0xF4: /* simulator RAM size in bytes */ + *data = 4096*1024; + break; + + case 0xF8: /* simulator ROM size in bytes */ + *data = 1024*1024; + break; + default: set_sfsr(MEC_ACC, addr, asi, 1); return (1); @@ -1887,3 +1895,19 @@ sis_memory_read(addr, data, length) memcpy(data, mem, length); return (length); } + +extern struct pstate sregs; + +void +boot_init (void) +{ + mec_write(MEC_WCR, 0); /* zero waitstates */ + mec_write(MEC_TRAPD, 0); /* turn off watch-dog */ + mec_write(MEC_RTC_SCALER, sregs.freq - 1); /* generate 1 MHz RTC tick */ + mec_write(MEC_MEMCFG, (3 << 18) | (4 << 10)); /* 1 MB ROM, 4 MB RAM */ + sregs.wim = 2; + sregs.psr = 0x110010e0; + sregs.r[30] = RAM_END; + sregs.r[14] = sregs.r[30] - 96 * 4; + mec_mcr |= 1; /* power-down enabled */ +} diff --git a/sim/erc32/func.c b/sim/erc32/func.c index e6744ee..6526085 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -468,6 +468,8 @@ exec_cmd(sregs, cmd) } sregs->pc = len & ~3; sregs->npc = sregs->pc + 4; + if ((sregs->pc != 0) && (ebase.simtime == 0)) + boot_init(); printf("resuming at 0x%08x\n",sregs->pc); if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) { stat = run_sim(sregs, VAL(cmd2), 0); diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c index 63b3f38..ca1a29a 100644 --- a/sim/erc32/interf.c +++ b/sim/erc32/interf.c @@ -78,6 +78,8 @@ run_sim(sregs, icount, dis) init_stdio(); sregs->starttime = time(NULL); irq = 0; + if ((sregs->pc != 0) && (ebase.simtime == 0)) + boot_init(); while (!sregs->err_mode & (icount > 0)) { sregs->fhold = 0; |