aboutsummaryrefslogtreecommitdiff
path: root/sim
diff options
context:
space:
mode:
authorChris Demetriou <cgd@google.com>2002-06-07 16:43:19 +0000
committerChris Demetriou <cgd@google.com>2002-06-07 16:43:19 +0000
commit196496eda07d1faa8d71fbbf000fa09a05c8e908 (patch)
treef284e8d4efb25eb1ef05ce7407125320bf4edeef /sim
parent91a106e65e4ecec7cd92024af03b319a630c8e84 (diff)
downloadfsf-binutils-gdb-196496eda07d1faa8d71fbbf000fa09a05c8e908.zip
fsf-binutils-gdb-196496eda07d1faa8d71fbbf000fa09a05c8e908.tar.gz
fsf-binutils-gdb-196496eda07d1faa8d71fbbf000fa09a05c8e908.tar.bz2
2002-06-07 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up formatting of a few comments. (value_fpr): Reformat switch statement.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/cp1.c28
2 files changed, 12 insertions, 21 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index dff7b80..0afcde9 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+2002-06-07 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Clean up formatting of a few comments.
+ (value_fpr): Reformat switch statement.
+
2002-06-06 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
diff --git a/sim/mips/cp1.c b/sim/mips/cp1.c
index 3641df7..e4bfba2 100644
--- a/sim/mips/cp1.c
+++ b/sim/mips/cp1.c
@@ -127,25 +127,11 @@ value_fpr (sim_cpu *cpu,
/* Set QNaN value: */
switch (fmt)
{
- case fmt_single:
- value = FPQNaN_SINGLE;
- break;
-
- case fmt_double:
- value = FPQNaN_DOUBLE;
- break;
-
- case fmt_word:
- value = FPQNaN_WORD;
- break;
-
- case fmt_long:
- value = FPQNaN_LONG;
- break;
-
- default:
- err = -1;
- break;
+ case fmt_single: value = FPQNaN_SINGLE; break;
+ case fmt_double: value = FPQNaN_DOUBLE; break;
+ case fmt_word: value = FPQNaN_WORD; break;
+ case fmt_long: value = FPQNaN_LONG; break;
+ default: err = -1; break;
}
}
else if (SizeFGR () == 64)
@@ -182,7 +168,7 @@ value_fpr (sim_cpu *cpu,
case fmt_long:
if ((fpr & 1) == 0)
{
- /* even registers only */
+ /* Even registers numbers only. */
#ifdef DEBUG
printf ("DBG: ValueFPR: FGR[%d] = %s, FGR[%d] = %s\n",
fpr + 1, pr_uword64 ((uword64) FGR[fpr+1]),
@@ -280,7 +266,7 @@ store_fpr (sim_cpu *cpu,
case fmt_long:
if ((fpr & 1) == 0)
{
- /* even register number only */
+ /* Even register numbers only. */
FGR[fpr+1] = (value >> 32);
FGR[fpr] = (value & 0xFFFFFFFF);
FPR_STATE[fpr + 1] = fmt;