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| author | Nick Clifton <nickc@redhat.com> | 2016-03-18 14:44:27 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2016-03-18 14:46:42 +0000 |
| commit | 4c0ca98e58fc409c93b41bb6c42f3e873db47725 (patch) | |
| tree | 388dbe48bced6bf28901e7c93069c150f21bdc2d /sim | |
| parent | 941319d15194580a047484a53f232d374dc2d712 (diff) | |
| download | fsf-binutils-gdb-4c0ca98e58fc409c93b41bb6c42f3e873db47725.zip fsf-binutils-gdb-4c0ca98e58fc409c93b41bb6c42f3e873db47725.tar.gz fsf-binutils-gdb-4c0ca98e58fc409c93b41bb6c42f3e873db47725.tar.bz2 | |
Fix code to check for illegal element numbers when accessing AArch64 vector registers in AArch64 sim.
* cpustate.c (GET_VEC_ELEMENT): Fix off by one error checking
for an invalid element index.
(SET_VEC_ELEMENT): Likewise.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/aarch64/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/aarch64/cpustate.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog index f11eaad..e8f8b48 100644 --- a/sim/aarch64/ChangeLog +++ b/sim/aarch64/ChangeLog @@ -4,6 +4,10 @@ Print hex equivalents of floats and doubles. Check element number against array size when accessing vector registers. + (GET_VEC_ELEMENT): Fix off by one error checking for an invalid + element index. + (SET_VEC_ELEMENT): Likewise. + * memory.c: Trace memory reads when --trace-memory is enabled. Remove float and double load and store functions. * memory.h (aarch64_get_mem_float): Delete prototype. diff --git a/sim/aarch64/cpustate.c b/sim/aarch64/cpustate.c index 86b1b15..19f485e 100644 --- a/sim/aarch64/cpustate.c +++ b/sim/aarch64/cpustate.c @@ -345,7 +345,7 @@ aarch64_set_FP_long_double (sim_cpu *cpu, VReg reg, FRegister a) #define GET_VEC_ELEMENT(REG, ELEMENT, FIELD) \ do \ { \ - if (element > ARRAY_SIZE (cpu->fr[0].FIELD)) \ + if (element >= ARRAY_SIZE (cpu->fr[0].FIELD)) \ { \ TRACE_REGISTER (cpu, \ "Internal SIM error: invalid element number: %d ",\ @@ -421,7 +421,7 @@ aarch64_get_vec_double (sim_cpu *cpu, VReg reg, unsigned element) #define SET_VEC_ELEMENT(REG, ELEMENT, VAL, FIELD, PRINTER) \ do \ { \ - if (ELEMENT > ARRAY_SIZE (cpu->fr[0].FIELD)) \ + if (ELEMENT >= ARRAY_SIZE (cpu->fr[0].FIELD)) \ { \ TRACE_REGISTER (cpu, \ "Internal SIM error: invalid element number: %d ",\ |