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| author | Andrew Cagney <cagney@redhat.com> | 1997-09-15 08:18:20 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-09-15 08:18:20 +0000 |
| commit | 658303f7d4219618030b6a5afce163c93e6034ce (patch) | |
| tree | 8f69ed6bf0554fcf59936609f67d2c894613090c /sim/v850/v850.igen | |
| parent | 9c82b2b8058ac93b4d9640f5afa2d2abb40f1f20 (diff) | |
| download | fsf-binutils-gdb-658303f7d4219618030b6a5afce163c93e6034ce.zip fsf-binutils-gdb-658303f7d4219618030b6a5afce163c93e6034ce.tar.gz fsf-binutils-gdb-658303f7d4219618030b6a5afce163c93e6034ce.tar.bz2 | |
For v850eq start up with US bit set.
Let sim_analyze_program determine the architecture.
Fix various sanitizations.
Diffstat (limited to 'sim/v850/v850.igen')
| -rw-r--r-- | sim/v850/v850.igen | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen index bbbe1f6..5a40cf7 100644 --- a/sim/v850/v850.igen +++ b/sim/v850/v850.igen @@ -455,7 +455,10 @@ rrrrr!0,11110,dddddd + ddddddddddddddd,0:V:::jarl 00000000011,RRRRR:I:::jmp "jmp [r<reg1>]" { - COMPAT_1 (OP_60 ()); + COMPAT_1 (0); + trace_input ("jmp", OP_REG, 0); + nia = State.regs[ reg1 ]; + trace_output (OP_REG); } @@ -884,18 +887,39 @@ rrrrr,1010,dddddd,0:IV:::sld.w COMPAT_1 (OP_500 ()); } +// start-sanitize-v850e rrrrr!0,0000110,dddd:IV:::sld.bu "sld.bu <disp4>[ep], r<reg2>" { - COMPAT_1 (OP_60 ()); + unsigned long result; + + COMPAT_1 (0); + result = load_mem (State.regs[30] + disp4, 1); + + /* start-sanitize-v850eq */ + if (PSW & PSW_US) { + trace_input ("sld.b", OP_LOAD16, 1); + + State.regs[ reg2 ] = EXTEND8 (result); + } else { + /* end-sanitize-v850eq */ + trace_input ("sld.bu", OP_LOAD16, 1); + State.regs[ reg2 ] = result; + /* start-sanitize-v850eq */ + } + /* end-sanitize-v850eq */ + trace_output (OP_LOAD16); } +// end-sanitize-v850e +// start-sanitize-v850e rrrrr!0,0000111,dddd:IV:::sld.hu "sld.hu <disp5>[ep], r<reg2>" { COMPAT_1 (OP_70 ()); } +// end-sanitize-v850e // SST |