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| author | Jim Wilson <wilson@tuliptree.org> | 1997-09-16 01:45:23 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@tuliptree.org> | 1997-09-16 01:45:23 +0000 |
| commit | 5262de21672329804caaa818272c4ddbf83a2ad3 (patch) | |
| tree | 3ded685b85c03f21382b76aa5ffa93c60187a662 /sim/v850/simops.c | |
| parent | d30a2be45d6518c9de3aba98b75b5552880cb524 (diff) | |
| download | fsf-binutils-gdb-5262de21672329804caaa818272c4ddbf83a2ad3.zip fsf-binutils-gdb-5262de21672329804caaa818272c4ddbf83a2ad3.tar.gz fsf-binutils-gdb-5262de21672329804caaa818272c4ddbf83a2ad3.tar.bz2 | |
* simops.c (Multiply64): Don't store into register zero.
Diffstat (limited to 'sim/v850/simops.c')
| -rw-r--r-- | sim/v850/simops.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sim/v850/simops.c b/sim/v850/simops.c index c4ecdc4..2cc54e4 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -414,8 +414,11 @@ Multiply64 (boolean sign, unsigned long op0) RdLo += 1; } - State.regs[ OP[1] ] = RdLo; - State.regs[ OP[2] >> 11 ] = RdHi; + /* Don't store into register 0. */ + if (OP[1]) + State.regs[ OP[1] ] = RdLo; + if (OP[2] >> 11) + State.regs[ OP[2] >> 11 ] = RdHi; return; } |