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| author | Andrew Cagney <cagney@redhat.com> | 1997-05-02 05:31:34 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-05-02 05:31:34 +0000 |
| commit | d9b75947387d9868a041a3472649754f68f62358 (patch) | |
| tree | 9166f3649c75b57fb94c1d81854a7613cdc9aa9d /sim/tic80/alu.h | |
| parent | 2317a49939905f8aeb16b62ee6bd5e1f661f1357 (diff) | |
| download | fsf-binutils-gdb-d9b75947387d9868a041a3472649754f68f62358.zip fsf-binutils-gdb-d9b75947387d9868a041a3472649754f68f62358.tar.gz fsf-binutils-gdb-d9b75947387d9868a041a3472649754f68f62358.tar.bz2 | |
o Add core and event objects into simulator
base type
o Add preliminary tracing support for same
o trace_printf() takes both SD and CPU arguments
o Add CIA to standard set of parameters for
generated functions.
o Pacify GCC
Diffstat (limited to 'sim/tic80/alu.h')
| -rw-r--r-- | sim/tic80/alu.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/sim/tic80/alu.h b/sim/tic80/alu.h index 5b44cad..7312f60 100644 --- a/sim/tic80/alu.h +++ b/sim/tic80/alu.h @@ -15,14 +15,20 @@ /* Bring data in from the cold */ -#define IMEM(EA) sim_core_read_4(sd, sim_core_execute_map, (EA)) +#define IMEM(EA) \ +(sim_core_read_4(sd, sim_core_execute_map, (EA), \ + STATE_CPU (sd, 0), cia)) #define MEM(SIGN, EA, NR_BYTES) \ -((SIGN##_##NR_BYTES) sim_core_read_##NR_BYTES (SD, sim_core_read_map, (EA) & ~(NR_BYTES - 1))) +((SIGN##_##NR_BYTES) sim_core_read_##NR_BYTES (SD, sim_core_read_map, \ + (EA) & ~(NR_BYTES - 1), \ + STATE_CPU (sd, 0), cia)) #define STORE(EA, NR_BYTES, VAL) \ do { \ - sim_core_write_##NR_BYTES (SD, sim_core_write_map, (EA) & ~(NR_BYTES - 1), (VAL)); \ + sim_core_write_##NR_BYTES (SD, sim_core_write_map, \ + (EA) & ~(NR_BYTES - 1), (VAL), \ + STATE_CPU (sd, 0), cia); \ } while (0) |