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| author | David Faust <david.faust@oracle.com> | 2020-09-08 11:39:07 -0700 |
|---|---|---|
| committer | David Faust <david.faust@oracle.com> | 2020-09-08 11:39:07 -0700 |
| commit | 3ad6c19423eedf84dfd5ea83bc03933dff8a4579 (patch) | |
| tree | e76e0f17f4d59deba3bd65dabb1b19f1a0eba84c /sim/testsuite | |
| parent | 790147a9e9ee05542c621a36669288413880c876 (diff) | |
| download | fsf-binutils-gdb-3ad6c19423eedf84dfd5ea83bc03933dff8a4579.zip fsf-binutils-gdb-3ad6c19423eedf84dfd5ea83bc03933dff8a4579.tar.gz fsf-binutils-gdb-3ad6c19423eedf84dfd5ea83bc03933dff8a4579.tar.bz2 | |
bpf: simulator: correct div, mod insn semantics
The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).
Tested in bpf-unknown-none.
cpu/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* bpf.cpu (define-alu-instructions): Correct semantic operators
for div, mod to unsigned versions.
sim/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* bpf/sem-be.c: Regenerate.
* bpf/sem-le.c: Likewise.
sim/testsuite/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* sim/bpf/alu.s: Correct div and mod tests.
* sim/bpf/alu32.s: Likewise.
Diffstat (limited to 'sim/testsuite')
| -rw-r--r-- | sim/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/testsuite/sim/bpf/alu.s | 26 | ||||
| -rw-r--r-- | sim/testsuite/sim/bpf/alu32.s | 31 |
3 files changed, 45 insertions, 17 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index f2df734..14055f8 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-09-08 David Faust <david.faust@oracle.com> + + * sim/bpf/alu.s: Correct div and mod tests. + * sim/bpf/alu32.s: Likewise. + 2020-08-04 David Faust <david.faust@oracle.com> Jose E. Marchesi <jose.marchesi@oracle.com> diff --git a/sim/testsuite/sim/bpf/alu.s b/sim/testsuite/sim/bpf/alu.s index 6013ac7..4dc37b1 100644 --- a/sim/testsuite/sim/bpf/alu.s +++ b/sim/testsuite/sim/bpf/alu.s @@ -40,11 +40,16 @@ main: ;; div div %r2, %r1 fail_ne %r2, 0 - div %r1, -10000 - fail_ne %r1, -11007531 + div %r1, 10000 + fail_ne %r1, 11007531 div %r1, %r1 fail_ne %r1, 1 + ;; div is unsigned + lddw %r1, -8 + div %r1, 2 + fail_ne %r1, 0x7ffffffffffffffc ; sign bits NOT maintained - large pos. + ;; and lddw %r1, 0xaaaaaaaa55555555 and %r1, 0x55aaaaaa ; we still only have 32-bit imm. @@ -84,14 +89,21 @@ main: ;; mod mov %r1, 1025 - mod %r1, -16 + mod %r1, 16 + fail_ne %r1, 1 + + ;; mod is unsigned + mov %r1, 1025 + mod %r1, -16 ; mod unsigned -> will treat as large positive + fail_ne %r1, 1025 + + mov %r1, -25 ; -25 is 0xff..ffe7 + mov %r2, 5 ; ... which when unsigned is a large positive + mod %r1, %r2 ; ... which is not evenly divisible by 5 fail_ne %r1, 1 - mov %r1, -25 - mov %r2, 5 - mod %r1, %r2 - fail_ne %r1, 0 ;; xor + mov %r1, 0 xor %r1, %r2 fail_ne %r1, 5 xor %r1, 0x7eadbeef diff --git a/sim/testsuite/sim/bpf/alu32.s b/sim/testsuite/sim/bpf/alu32.s index fcd6699..e8d5062 100644 --- a/sim/testsuite/sim/bpf/alu32.s +++ b/sim/testsuite/sim/bpf/alu32.s @@ -31,10 +31,15 @@ main: fail_ne32 %r1, 264 ;; div - div32 %r1, %r2 ; r1 /= r2 (r1 = 264 / -6 = -44) - div32 %r1, -2 ; r1 /= -2 (r1 = 22) - div32 %r1, 2 ; r1 /= 2 (r1 = 11) - fail_ne32 %r1, 11 + div32 %r1, 6 + mov32 %r2, 11 + div32 %r1, %r2 + fail_ne32 %r1, 4 + + ;; div is unsigned + mov32 %r1, -8 ; 0xfffffff8 + div32 %r1, 2 + fail_ne32 %r1, 0x7ffffffc ; sign bits are not preserved ;; and (bitwise) mov32 %r1, 0xb ; r1 = (0xb = 0b1011) @@ -70,13 +75,19 @@ main: ; i.e. upper-32 bits should be untouched ;; mod - mov32 %r1, -25 - mov32 %r2, 4 + mov32 %r1, 1025 + mod32 %r1, 16 + fail_ne32 %r1, 1 + + ;; mod is unsigned + mov32 %r1, 1025 + mod32 %r1, -16 ; when unsigned, much larger than 1025 + fail_ne32 %r1, 1025 + + mov32 %r1, -25 ; when unsigned, a large positive which is + mov32 %r2, 5 ; ... not evenly divisible by 5 mod32 %r1, %r2 - fail_ne32 %r1, -1 - mov32 %r1, 25 - mod32 %r1, 5 - fail_ne32 %r1, 0 + fail_ne32 %r1, 1 ;; xor xor32 %r1, %r2 |