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| author | Oleg Endo <olegendo@gcc.gnu.org> | 2016-04-10 11:00:01 +0900 |
|---|---|---|
| committer | Oleg Endo <olegendo@gcc.gnu.org> | 2016-04-10 11:02:47 +0900 |
| commit | 93e6fe04ccb4008f14e3584bb1e86b2d04c9234c (patch) | |
| tree | 6434e6b44038c517764a4c7005cc7c87cd8320a9 /sim/sh/gencode.c | |
| parent | ba442f0f41a57ee9a3f0c7f574500f2bda896d08 (diff) | |
| download | fsf-binutils-gdb-93e6fe04ccb4008f14e3584bb1e86b2d04c9234c.zip fsf-binutils-gdb-93e6fe04ccb4008f14e3584bb1e86b2d04c9234c.tar.gz fsf-binutils-gdb-93e6fe04ccb4008f14e3584bb1e86b2d04c9234c.tar.bz2 | |
Fix primary reason why the SH simulation hasn't been working on 64 bit hosts.
sim/sh/
* interp.c (dmul): Split into dmul_s and dmul_u. Use explicit integer
width types and simplify implementation.
* gencode.c (dmuls.l, dmulu.l): Use new functions dmul_s and dmul_u.
Diffstat (limited to 'sim/sh/gencode.c')
| -rw-r--r-- | sim/sh/gencode.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c index e3978ea..2f1a3f5 100644 --- a/sim/sh/gencode.c +++ b/sim/sh/gencode.c @@ -405,11 +405,11 @@ static op tab[] = }, { "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101", - "dmul (1/*signed*/, R[n], R[m]);", + "dmul_s (R[n], R[m]);", }, { "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101", - "dmul (0/*unsigned*/, R[n], R[m]);", + "dmul_u (R[n], R[m]);", }, { "n", "n", "dt <REG_N>", "0100nnnn00010000", |