sim/or1k: Regenerate sim

This picks up changes for:

 - new orfpx64a32 spec
 - new unordered instructions
 - documentation and symbol updates

sim/ChangeLog:

	* or1k/cpu.c: Regenerate.
	* or1k/cpu.h: Regenerate.
	* or1k/decode.c: Regenerate.
	* or1k/decode.h: Regenerate.
	* or1k/model.c: Regenerate.
	* or1k/sem-switch.c: Regenerate.
	* or1k/sem.c: Regenerate.

1 files changed, 63 insertions, 15 deletions

diff --git a/sim/or1k/cpu.c b/sim/or1k/cpu.c
index f93b512..a668ac4 100644
--- a/sim/or1k/cpu.c
+++ b/sim/or1k/cpu.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2019 Free Software Foundation, Inc.
+Copyright (C) 1996-2019 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -44,6 +44,38 @@ or1k32bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
   SET_H_PC (newval);
 }
 
+/* Get the value of h-spr.  */
+
+USI
+or1k32bf_h_spr_get (SIM_CPU *current_cpu, UINT regno)
+{
+  return GET_H_SPR (regno);
+}
+
+/* Set a value for h-spr.  */
+
+void
+or1k32bf_h_spr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
+{
+  SET_H_SPR (regno, newval);
+}
+
+/* Get the value of h-gpr.  */
+
+USI
+or1k32bf_h_gpr_get (SIM_CPU *current_cpu, UINT regno)
+{
+  return GET_H_GPR (regno);
+}
+
+/* Set a value for h-gpr.  */
+
+void
+or1k32bf_h_gpr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
+{
+  SET_H_GPR (regno, newval);
+}
+
 /* Get the value of h-fsr.  */
 
 SF
@@ -60,36 +92,36 @@ or1k32bf_h_fsr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
   SET_H_FSR (regno, newval);
 }
 
-/* Get the value of h-spr.  */
+/* Get the value of h-fd32r.  */
 
-USI
-or1k32bf_h_spr_get (SIM_CPU *current_cpu, UINT regno)
+DF
+or1k32bf_h_fd32r_get (SIM_CPU *current_cpu, UINT regno)
 {
-  return GET_H_SPR (regno);
+  return GET_H_FD32R (regno);
 }
 
-/* Set a value for h-spr.  */
+/* Set a value for h-fd32r.  */
 
 void
-or1k32bf_h_spr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
+or1k32bf_h_fd32r_set (SIM_CPU *current_cpu, UINT regno, DF newval)
 {
-  SET_H_SPR (regno, newval);
+  SET_H_FD32R (regno, newval);
 }
 
-/* Get the value of h-gpr.  */
+/* Get the value of h-i64r.  */
 
-USI
-or1k32bf_h_gpr_get (SIM_CPU *current_cpu, UINT regno)
+DI
+or1k32bf_h_i64r_get (SIM_CPU *current_cpu, UINT regno)
 {
-  return GET_H_GPR (regno);
+  return GET_H_I64R (regno);
 }
 
-/* Set a value for h-gpr.  */
+/* Set a value for h-i64r.  */
 
 void
-or1k32bf_h_gpr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
+or1k32bf_h_i64r_set (SIM_CPU *current_cpu, UINT regno, DI newval)
 {
-  SET_H_GPR (regno, newval);
+  SET_H_I64R (regno, newval);
 }
 
 /* Get the value of h-sys-vr.  */
@@ -10172,6 +10204,22 @@ or1k32bf_h_atomic_address_set (SIM_CPU *current_cpu, SI newval)
   CPU (h_atomic_address) = newval;
 }
 
+/* Get the value of h-roff1.  */
+
+BI
+or1k32bf_h_roff1_get (SIM_CPU *current_cpu)
+{
+  return CPU (h_roff1);
+}
+
+/* Set a value for h-roff1.  */
+
+void
+or1k32bf_h_roff1_set (SIM_CPU *current_cpu, BI newval)
+{
+  CPU (h_roff1) = newval;
+}
+
 /* Record trace results for INSN.  */
 
 void