diff options
| author | Andrew Cagney <cagney@redhat.com> | 1998-05-21 08:18:21 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-05-21 08:18:21 +0000 |
| commit | 84048259930b9dc812404285e3508eb09beeec51 (patch) | |
| tree | 4e87256ed9a1b6cc3d6343150a89a6632e351d99 /sim/mips | |
| parent | 643878d01705dbc37908583984ab14da155a8b28 (diff) | |
| download | fsf-binutils-gdb-84048259930b9dc812404285e3508eb09beeec51.zip fsf-binutils-gdb-84048259930b9dc812404285e3508eb09beeec51.tar.gz fsf-binutils-gdb-84048259930b9dc812404285e3508eb09beeec51.tar.bz2 | |
* interp.c (sim_fetch_register): Convert internal r5900 regs to
target byte order
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/mips/interp.c | 2 |
2 files changed, 10 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 7900eba..2afcd49 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,10 @@ +start-sanitize-r5900 +Thu May 21 17:15:39 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * interp.c (sim_fetch_register): Convert internal r5900 regs to + target byte order + +end-sanitize-r5900 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com> * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware @@ -35,11 +42,13 @@ Wed May 13 14:27:53 1998 Gavin Koch <gavin@cygnus.com> function check_op_hilo_hi1lo1 with the pair check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1. +start-sanitize-r5900 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com> * tx.igen (madd,maddu): Replace calls to check_op_hilo with calls to check_div_hilo. +end-sanitize-r5900 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com> * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo): diff --git a/sim/mips/interp.c b/sim/mips/interp.c index f83fdc3..e0c878d 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -1017,7 +1017,7 @@ sim_fetch_register (sd,rn,memory,length) /* start-sanitize-r5900 */ if (rn >= 90 && rn < 90 + 32) { - *(unsigned64*)memory = GPR1[rn - 90]; + *((unsigned64*)memory) = H2T_8 (GPR1[rn - 90]); return 8; } switch (rn) |