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| author | Thiemo Seufer <ths@networkno.de> | 2007-02-17 01:26:48 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2007-02-17 01:26:48 +0000 |
| commit | 3669427c8eaf2004867e9594cc865a77575d1fbe (patch) | |
| tree | d1afb1d9816ffaaa57b09508d3ce407c975afeb5 /sim/mips | |
| parent | dc1946a131f73f5bc4b3dc38141a3411dd39a91e (diff) | |
| download | fsf-binutils-gdb-3669427c8eaf2004867e9594cc865a77575d1fbe.zip fsf-binutils-gdb-3669427c8eaf2004867e9594cc865a77575d1fbe.tar.gz fsf-binutils-gdb-3669427c8eaf2004867e9594cc865a77575d1fbe.tar.bz2 | |
2007-02-17 Thiemo Seufer <ths@mips.com>
[ sim/mips/ChangeLog ]
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add mdmx to sim_igen_machine.
(mipsisa64*-*-*): Likewise. Remove dsp.
(mipsisa32*-*-*): Remove dsp.
* configure: Regenerate.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Add case for mips*-sde-elf*.
(mdmxmodels): Run mdmx tests only on mdmx capable configurations.
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 8 | ||||
| -rwxr-xr-x | sim/mips/configure | 10 | ||||
| -rw-r--r-- | sim/mips/configure.ac | 20 |
3 files changed, 23 insertions, 15 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index bd4fb33..f6771d4 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,11 @@ +2007-02-17 Thiemo Seufer <ths@mips.com> + + * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*): + Add mdmx to sim_igen_machine. + (mipsisa64*-*-*): Likewise. Remove dsp. + (mipsisa32*-*-*): Remove dsp. + * configure: Regenerate. + 2007-02-13 Thiemo Seufer <ths@mips.com> * configure.ac: Add mips*-sde-elf* target. diff --git a/sim/mips/configure b/sim/mips/configure index 529eb52..2ddf7fc 100755 --- a/sim/mips/configure +++ b/sim/mips/configure @@ -5131,7 +5131,7 @@ case "${target}" in sim_multi_default=mips5000 ;; mips*-sde-elf*) sim_gen=M16 - sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,smartmips" sim_m16_machine="-M mips16,mips16e,mips64r2" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64r2" @@ -5144,19 +5144,19 @@ case "${target}" in sim_m16_filter="16" ;; mipsisa32r2*-*-*) sim_gen=M16 - sim_igen_machine="-M mips32r2,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,smartmips" sim_m16_machine="-M mips16,mips16e,mips32r2" sim_igen_filter="32,f" sim_mach_default="mipsisa32r2" ;; mipsisa32*-*-*) sim_gen=M16 - sim_igen_machine="-M mips32,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips32,mips16,mips16e,smartmips" sim_m16_machine="-M mips16,mips16e,mips32" sim_igen_filter="32,f" sim_mach_default="mipsisa32" ;; mipsisa64r2*-*-*) sim_gen=M16 - sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp" + sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp" sim_m16_machine="-M mips16,mips16e,mips64r2" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64r2" @@ -5167,7 +5167,7 @@ case "${target}" in sim_mach_default="mips_sb1" ;; mipsisa64*-*-*) sim_gen=M16 - sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp" + sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx" sim_m16_machine="-M mips16,mips16e,mips64" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64" diff --git a/sim/mips/configure.ac b/sim/mips/configure.ac index 3bdafff..b0d5416 100644 --- a/sim/mips/configure.ac +++ b/sim/mips/configure.ac @@ -141,6 +141,12 @@ case "${target}" in vr5500:mipsIV,vr5500:32,64,f:mips5500" sim_multi_default=mips5000 ;; + mips*-sde-elf*) sim_gen=M16 + sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,smartmips" + sim_m16_machine="-M mips16,mips16e,mips64r2" + sim_igen_filter="32,64,f" + sim_mach_default="mipsisa64r2" + ;; mips64*-*-*) sim_igen_filter="32,64,f" sim_gen=IGEN ;; @@ -148,26 +154,20 @@ case "${target}" in sim_igen_filter="32,64,f" sim_m16_filter="16" ;; - mips*-sde-elf*) sim_gen=M16 - sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp,smartmips" - sim_m16_machine="-M mips16,mips16e,mips64r2" - sim_igen_filter="32,64,f" - sim_mach_default="mipsisa64r2" - ;; mipsisa32r2*-*-*) sim_gen=M16 - sim_igen_machine="-M mips32r2,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,smartmips" sim_m16_machine="-M mips16,mips16e,mips32r2" sim_igen_filter="32,f" sim_mach_default="mipsisa32r2" ;; mipsisa32*-*-*) sim_gen=M16 - sim_igen_machine="-M mips32,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips32,mips16,mips16e,smartmips" sim_m16_machine="-M mips16,mips16e,mips32" sim_igen_filter="32,f" sim_mach_default="mipsisa32" ;; mipsisa64r2*-*-*) sim_gen=M16 - sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp" + sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp" sim_m16_machine="-M mips16,mips16e,mips64r2" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64r2" @@ -178,7 +178,7 @@ case "${target}" in sim_mach_default="mips_sb1" ;; mipsisa64*-*-*) sim_gen=M16 - sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp" + sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx" sim_m16_machine="-M mips16,mips16e,mips64" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64" |