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| author | Andrew Cagney <cagney@redhat.com> | 2000-06-23 12:39:41 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2000-06-23 12:39:41 +0000 |
| commit | 673388c077f8f1fdb185e0dc563b1dbd563b59f2 (patch) | |
| tree | 76d8da2a57a806f94ac9a02f0c2375df7d56e816 /sim/mips/mips.igen | |
| parent | 3e87a7603fcec0cb95e8f4cbaacc1a6df721b021 (diff) | |
| download | fsf-binutils-gdb-673388c077f8f1fdb185e0dc563b1dbd563b59f2.zip fsf-binutils-gdb-673388c077f8f1fdb185e0dc563b1dbd563b59f2.tar.gz fsf-binutils-gdb-673388c077f8f1fdb185e0dc563b1dbd563b59f2.tar.bz2 | |
Fix printf arguments.
Diffstat (limited to 'sim/mips/mips.igen')
| -rw-r--r-- | sim/mips/mips.igen | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index 585e83a..23908a9 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -3034,8 +3034,8 @@ { if (STATE_VERBOSE_P(SD)) sim_io_eprintf (SD, - "Warning: PC 0x%x: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n", - CIA); + "Warning: PC 0x%lx: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n", + (long) CIA); PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0); } } @@ -3209,7 +3209,8 @@ { if (STATE_VERBOSE_P(SD)) sim_io_eprintf (SD, - "Warning: PC 0x%x: MTC1 not DMTC1 with 64 bit regs\n", CIA); + "Warning: PC 0x%lx: MTC1 not DMTC1 with 64 bit regs\n", + (long) CIA); PENDING_FILL ((FS + FGRIDX), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT]))); } else |