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authorFrank Ch. Eigler <fche@redhat.com>1998-12-08 12:23:26 +0000
committerFrank Ch. Eigler <fche@redhat.com>1998-12-08 12:23:26 +0000
commit1ee7d2b1c84f7015b487d50f11b007f399e5dbb9 (patch)
treec980fc0e9e2a9ae8adf9ac399b2753ea83f4f803 /sim/mips/mips.igen
parenteeba69f17f09add68e8bfe02fa2df375a810ea9f (diff)
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* sky->devo merge, final part of sim merge
[ChangeLog.sky] 1998-12-08 Frank Ch. Eigler <fche@cygnus.com> * sim-main.h (sim_state): Add multi-phase load tracking fields. * sky-gdb.c (sky_option_handler): Add --load-next option handling. * mips.igen (BREAK): Add multi-phase load and printf code handling.
Diffstat (limited to 'sim/mips/mips.igen')
-rw-r--r--sim/mips/mips.igen209
1 files changed, 205 insertions, 4 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 1757acb..21e822e 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1,5 +1,9 @@
// -*- C -*-
//
+// In mips.igen, the semantics for many of the instructions were created
+// using code generated by gencode. Those semantic segments could be
+// greatly simplified.
+//
// <insn> ::=
// <insn-word> { "+" <insn-word> }
// ":" <format-name>
@@ -145,6 +149,7 @@
:function:::int:check_mt_hilo:hilo_history *history
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -334,6 +339,7 @@
000000,5.RS,5.RT,5.RD,00000,100000:SPECIAL:32::ADD
"add r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -363,6 +369,7 @@
001000,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ADDI
"addi r<RT>, r<RS>, IMMEDIATE"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -399,6 +406,7 @@
001001,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ADDIU
"addiu r<RT>, r<RS>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -429,6 +437,7 @@
000000,5.RS,5.RT,5.RD,00000,100001:SPECIAL:32::ADDU
"addu r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -459,6 +468,7 @@
000000,5.RS,5.RT,5.RD,00000,100100:SPECIAL:32::AND
"and r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -482,6 +492,7 @@
001100,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ANDI
"and r<RT>, r<RS>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -507,6 +518,7 @@
000100,5.RS,5.RT,16.OFFSET:NORMAL:32::BEQ
"beq r<RS>, r<RT>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -538,6 +550,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -569,6 +582,7 @@
000001,5.RS,00001,16.OFFSET:REGIMM:32::BGEZ
"bgez r<RS>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -598,6 +612,7 @@
000001,5.RS!31,10001,16.OFFSET:REGIMM:32::BGEZAL
"bgezal r<RS>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -630,6 +645,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -666,6 +682,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -697,6 +714,7 @@
000111,5.RS,00000,16.OFFSET:NORMAL:32::BGTZ
"bgtz r<RS>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -728,6 +746,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -761,6 +780,7 @@
000110,5.RS,00000,16.OFFSET:NORMAL:32::BLEZ
"blez r<RS>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -794,6 +814,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -825,6 +846,7 @@
000001,5.RS,00000,16.OFFSET:REGIMM:32::BLTZ
"bltz r<RS>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -854,6 +876,7 @@
000001,5.RS!31,10000,16.OFFSET:REGIMM:32::BLTZAL
"bltzal r<RS>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -888,6 +911,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -922,6 +946,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -955,6 +980,7 @@
000101,5.RS,5.RT,16.OFFSET:NORMAL:32::BNE
"bne r<RS>, r<RT>, <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -986,6 +1012,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1017,6 +1044,7 @@
000000,20.CODE,001101:SPECIAL:32::BREAK
"break"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1050,6 +1078,7 @@
sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
}
// start-sanitize-sky
+#ifdef TARGET_SKY
else if (break_code == (HALT_INSTRUCTION_PASS & HALT_INSTRUCTION_MASK))
{
sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 0);
@@ -1058,11 +1087,49 @@
{
sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 15);
}
+ else if (break_code == (PRINTF_INSTRUCTION & HALT_INSTRUCTION_MASK))
+ {
+ sim_monitor(SD, CPU, cia, 316); /* Magic number for idt printf routine. */
+ }
+ else if (break_code == (LOAD_INSTRUCTION & HALT_INSTRUCTION_MASK))
+ {
+ /* This is a multi-phase load instruction. Load next configured
+ executable and return its starting PC in A0 ($4). */
+
+ if (STATE_MLOAD_INDEX (SD) == STATE_MLOAD_COUNT (SD))
+ {
+ sim_io_eprintf (SD, "Cannot load program %d. Not enough load-next options.\n",
+ STATE_MLOAD_COUNT (SD));
+ A0 = 0;
+ }
+ else
+ {
+ char* next = STATE_MLOAD_NAME (SD) [STATE_MLOAD_INDEX (SD)];
+ SIM_RC rc;
+
+ STATE_MLOAD_INDEX (SD) ++;
+
+ /* call sim_load_file, preserving most previous state */
+ rc = sim_load (SD, next, NULL, 0);
+ if(rc != SIM_RC_OK)
+ {
+ sim_io_eprintf (SD, "Error during multi-phase load #%d.\n",
+ STATE_MLOAD_INDEX (SD));
+ A0 = 0;
+ }
+ else
+ A0 = STATE_START_ADDR (SD);
+ }
+ }
+#endif TARGET_SKY
// end-sanitize-sky
- /* If we get this far, we're not an instruction reserved by the sim. Raise
- the exception. */
- SignalException(BreakPoint, instruction_0);
+ else
+ {
+ /* If we get this far, we're not an instruction reserved by the sim. Raise
+ the exception. */
+ SignalException(BreakPoint, instruction_0);
+ }
}
@@ -1074,6 +1141,7 @@
"dadd r<RD>, r<RS>, r<RT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1104,6 +1172,7 @@
"daddi r<RT>, r<RS>, <IMMEDIATE>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1140,6 +1209,7 @@
"daddu r<RT>, r<RS>, <IMMEDIATE>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1170,6 +1240,7 @@
"daddu r<RD>, r<RS>, r<RT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1219,6 +1290,7 @@
"ddiv r<RS>, r<RT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1263,6 +1335,7 @@
"ddivu r<RS>, r<RT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1308,6 +1381,7 @@
000000,5.RS,5.RT,0000000000011010:SPECIAL:32::DIV
"div r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1352,6 +1426,7 @@
000000,5.RS,5.RT,0000000000011011:SPECIAL:32::DIVU
"divu r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1440,6 +1515,7 @@
000000,5.RS,5.RT,0000000000011100:SPECIAL:64::DMULT
"dmult r<RS>, r<RT>"
*mipsIII,mipsIV:
+*vr4100:
// start-sanitize-tx19
*tx19:
// end-sanitize-tx19
@@ -1471,6 +1547,7 @@
000000,5.RS,5.RT,0000000000011101:SPECIAL:64::DMULTU
"dmultu r<RS>, r<RT>"
*mipsIII,mipsIV:
+*vr4100:
// start-sanitize-tx19
*tx19:
// end-sanitize-tx19
@@ -1498,6 +1575,7 @@
"dsll r<RD>, r<RT>, <SHIFT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1521,6 +1599,7 @@
"dsll32 r<RD>, r<RT>, <SHIFT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1545,6 +1624,7 @@
"dsllv r<RD>, r<RT>, r<RS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1569,6 +1649,7 @@
"dsra r<RD>, r<RT>, <SHIFT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1592,6 +1673,7 @@
"dsra32 r<RT>, r<RD>, <SHIFT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1623,6 +1705,7 @@
"dsra32 r<RT>, r<RD>, r<RS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1645,6 +1728,7 @@
"dsrl r<RD>, r<RT>, <SHIFT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1668,6 +1752,7 @@
"dsrl32 r<RD>, r<RT>, <SHIFT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1691,6 +1776,7 @@
"dsrl32 r<RD>, r<RT>, r<RS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1714,6 +1800,7 @@
"dsub r<RD>, r<RS>, r<RT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1749,6 +1836,7 @@
"dsubu r<RD>, r<RS>, r<RT>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1770,6 +1858,7 @@
000010,26.INSTR_INDEX:NORMAL:32::J
"j <INSTR_INDEX>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1795,6 +1884,7 @@
000011,26.INSTR_INDEX:NORMAL:32::JAL
"jal <INSTR_INDEX>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1822,6 +1912,7 @@
"jalr r<RS>":RD == 31
"jalr r<RD>, r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1846,6 +1937,7 @@
000000,5.RS,000000000000000001000:SPECIAL:32::JR
"jr r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1890,6 +1982,7 @@
100000,5.BASE,5.RT,16.OFFSET:NORMAL:32::LB
"lb r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1912,6 +2005,7 @@
100100,5.BASE,5.RT,16.OFFSET:NORMAL:32::LBU
"lbu r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1935,6 +2029,7 @@
"ld r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1958,6 +2053,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -1980,6 +2076,7 @@
"ldl r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2002,6 +2099,7 @@
"ldr r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2023,6 +2121,7 @@
100001,5.BASE,5.RT,16.OFFSET:NORMAL:32::LH
"lh r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2045,6 +2144,7 @@
100101,5.BASE,5.RT,16.OFFSET:NORMAL:32::LHU
"lhu r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2069,6 +2169,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2119,6 +2220,7 @@
"lld r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2161,6 +2263,7 @@
001111,00000,5.RT,16.IMMEDIATE:NORMAL:32::LUI
"lui r<RT>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2185,6 +2288,7 @@
100011,5.BASE,5.RT,16.OFFSET:NORMAL:32::LW
"lw r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2207,6 +2311,7 @@
1100,ZZ!0!1!3,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWCz
"lwc<ZZ> r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2286,6 +2391,7 @@
100010,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWL
"lwl r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2339,6 +2445,7 @@
100110,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWR
"lwr r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2362,6 +2469,7 @@
"lwu r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2391,6 +2499,7 @@
000000,0000000000,5.RD,00000,010000:SPECIAL:32::MFHI
"mfhi r<RD>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2422,6 +2531,7 @@
000000,0000000000,5.RD,00000,010010:SPECIAL:32::MFLO
"mflo r<RD>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2485,6 +2595,7 @@
000000,5.RS,000000000000000,010001:SPECIAL:32::MTHI
"mthi r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2509,6 +2620,7 @@
000000,5.RS,000000000000000010011:SPECIAL:32::MTLO
"mtlo r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2547,6 +2659,7 @@
000000,5.RS,5.RT,00000,00000011000:SPECIAL:32::MULT
"mult r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
// start-sanitize-vr4320
*vr4320:
// end-sanitize-vr4320
@@ -2590,6 +2703,7 @@
000000,5.RS,5.RT,00000,00000011001:SPECIAL:32::MULTU
"multu r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
// start-sanitize-vr4320
*vr4320:
// end-sanitize-vr4320
@@ -2625,6 +2739,7 @@
000000,5.RS,5.RT,5.RD,00000,100111:SPECIAL:32::NOR
"nor r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2654,6 +2769,7 @@
000000,5.RS,5.RT,5.RD,00000,100101:SPECIAL:32::OR
"or r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2684,6 +2800,7 @@
001101,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ORI
"ori r<RT>, r<RS>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2756,6 +2873,7 @@
101000,5.BASE,5.RT,16.OFFSET:NORMAL:32::SB
"sb r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2780,6 +2898,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2830,6 +2949,7 @@
"scd r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2876,6 +2996,7 @@
"sd r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2899,6 +3020,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2918,6 +3040,7 @@
"sdl r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2940,6 +3063,7 @@
"sdr r<RT>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2961,6 +3085,7 @@
101001,5.BASE,5.RT,16.OFFSET:NORMAL:32::SH
"sh r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -2991,6 +3116,7 @@
00000000000,5.RT,5.RD,5.SHIFT,000000:SPECIAL:32::SLL
"sll r<RD>, r<RT>, <SHIFT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3022,6 +3148,7 @@
000000,5.RS,5.RT,5.RD,00000000100:SPECIAL:32::SLLV
"sllv r<RD>, r<RT>, r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3051,6 +3178,7 @@
000000,5.RS,5.RT,5.RD,00000101010:SPECIAL:32::SLT
"slt r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3080,6 +3208,7 @@
001010,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::SLTI
"slti r<RT>, r<RS>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3109,6 +3238,7 @@
001011,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::SLTIU
"sltiu r<RT>, r<RS>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3139,6 +3269,7 @@
000000,5.RS,5.RT,5.RD,00000101011:SPECIAL:32::SLTU
"sltu r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3169,6 +3300,7 @@
000000,00000,5.RT,5.RD,5.SHIFT,000011:SPECIAL:32::SRA
"sra r<RD>, r<RT>, <SHIFT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3201,6 +3333,7 @@
000000,5.RS,5.RT,5.RD,00000000111:SPECIAL:32::SRAV
"srav r<RD>, r<RT>, r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3232,6 +3365,7 @@
000000,00000,5.RT,5.RD,5.SHIFT,000010:SPECIAL:32::SRL
"srl r<RD>, r<RT>, <SHIFT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3263,6 +3397,7 @@
000000,5.RS,5.RT,5.RD,00000000110:SPECIAL:32::SRLV
"srlv r<RD>, r<RT>, r<RS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3285,6 +3420,7 @@
000000,5.RS,5.RT,5.RD,00000100010:SPECIAL:32::SUB
"sub r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3320,6 +3456,7 @@
000000,5.RS,5.RT,5.RD,00000100011:SPECIAL:32::SUBU
"subu r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3342,6 +3479,7 @@
101011,5.BASE,5.RT,16.OFFSET:NORMAL:32::SW
"sw r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
// start-sanitize-tx19
*tx19:
// end-sanitize-tx19
@@ -3364,6 +3502,7 @@
1110,ZZ!0!1!3,5.BASE,5.RT,16.OFFSET:NORMAL:32::SWCz
"swc<ZZ> r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3430,6 +3569,7 @@
101010,5.BASE,5.RT,16.OFFSET:NORMAL:32::SWL
"swl r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3473,6 +3613,7 @@
101110,5.BASE,5.RT,16.OFFSET:NORMAL:32::SWR
"swr r<RT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3498,6 +3639,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3520,6 +3662,7 @@
000000,20.CODE,001100:SPECIAL:32::SYSCALL
"syscall <CODE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3544,6 +3687,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3568,6 +3712,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3592,6 +3737,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3616,6 +3762,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3640,6 +3787,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3664,6 +3812,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3688,6 +3837,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3712,6 +3862,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3736,6 +3887,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3760,6 +3912,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3784,6 +3937,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3808,6 +3962,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3837,6 +3992,7 @@
000000,5.RS,5.RT,5.RD,00000100110:SPECIAL:32::XOR
"xor r<RD>, r<RS>, r<RT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3866,6 +4022,7 @@
001110,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::XORI
"xori r<RT>, r<RS>, <IMMEDIATE>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3958,6 +4115,7 @@
010001,10,3.FMT,00000,5.FS,5.FD,000101:COP1:32,f::ABS.fmt
"abs.%s<FMT> f<FD>, f<FS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -3987,6 +4145,7 @@
010001,10,3.FMT,5.FT,5.FS,5.FD,000000:COP1:32,f::ADD.fmt
"add.%s<FMT> f<FD>, f<FS>, f<FT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4022,6 +4181,7 @@
010001,01000,3.0,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1
"bc1%s<TF>%s<ND> <OFFSET>"
*mipsI,mipsII,mipsIII:
+*vr4100:
// start-sanitize-r5900
*r5900:
// end-sanitize-r5900
@@ -4131,6 +4291,7 @@
"c.%s<COND>.%s<FMT> f<FS>, f<FT>":CC == 0
"c.%s<COND>.%s<FMT> <CC>, f<FS>, f<FT>"
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4151,6 +4312,7 @@
"ceil.l.%s<FMT> f<FD>, f<FS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4183,6 +4345,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4240,6 +4403,7 @@
010001,00,X,10,5.RT,5.FS,00000000000:COP1S:32::CxC1
"c%s<X>c1 r<RT>, f<FS>"
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4297,6 +4461,7 @@
010001,10,3.FMT,00000,5.FS,5.FD,100001:COP1:32::CVT.D.fmt
"cvt.d.%s<FMT> f<FD>, f<FS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4326,6 +4491,7 @@
"cvt.l.%s<FMT> f<FD>, f<FS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4357,6 +4523,7 @@
010001,10,3.FMT,00000,5.FS,5.FD,100000:COP1:32::CVT.S.fmt
"cvt.s.%s<FMT> f<FD>, f<FS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4385,6 +4552,7 @@
010001,10,3.FMT,00000,5.FS,5.FD,100100:COP1:32::CVT.W.fmt
"cvt.w.%s<FMT> f<FD>, f<FS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4413,6 +4581,7 @@
010001,10,3.FMT,5.FT,5.FS,5.FD,000011:COP1:32::DIV.fmt
"div.%s<FMT> f<FD>, f<FS>, f<FT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4468,6 +4637,7 @@
010001,00,X,01,5.RT,5.FS,00000000000:COP1S:64::DMxC1
"dm%s<X>c1 r<RT>, f<FS>"
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4506,6 +4676,7 @@
"floor.l.%s<FMT> f<FD>, f<FS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4539,6 +4710,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4572,6 +4744,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4607,6 +4780,7 @@
110001,5.BASE,5.FT,16.OFFSET:COP1:32::LWC1
"lwc1 f<FT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4710,6 +4884,7 @@
010001,00,X,00,5.RT,5.FS,00000000000:COP1S:32::MxC1
"m%s<X>c1 r<RT>, f<FS>"
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4733,6 +4908,7 @@
010001,10,3.FMT,00000,5.FS,5.FD,000110:COP1:32::MOV.fmt
"mov.%s<FMT> f<FD>, f<FS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4913,6 +5089,7 @@
010001,10,3.FMT,5.FT,5.FS,5.FD,000010:COP1:32::MUL.fmt
"mul.%s<FMT> f<FD>, f<FS>, f<FT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -4942,6 +5119,7 @@
010001,10,3.FMT,00000,5.FS,5.FD,000111:COP1:32::NEG.fmt
"neg.%s<FMT> f<FD>, f<FS>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5111,6 +5289,7 @@
"round.l.%s<FMT> f<FD>, f<FS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5144,6 +5323,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5201,6 +5381,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5237,6 +5418,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5265,6 +5447,7 @@
010001,10,3.FMT,5.FT,5.FS,5.FD,000001:COP1:32::SUB.fmt
"sub.%s<FMT> f<FD>, f<FS>, f<FT>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5295,6 +5478,7 @@
111001,5.BASE,5.FT,16.OFFSET:COP1:32::SWC1
"swc1 f<FT>, <OFFSET>(r<BASE>)"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5385,6 +5569,7 @@
"trunc.l.%s<FMT> f<FD>, f<FS>"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5418,6 +5603,7 @@
*mipsII:
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5456,6 +5642,7 @@
010000,01000,00000,16.OFFSET:COP0:32::BC0F
"bc0f <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5468,6 +5655,7 @@
010000,01000,00010,16.OFFSET:COP0:32::BC0FL
"bc0fl <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5480,12 +5668,13 @@
010000,01000,00001,16.OFFSET:COP0:32::BC0T
"bc0t <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
-
+*vr4100:
010000,01000,00011,16.OFFSET:COP0:32::BC0TL
"bc0tl <OFFSET>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5498,6 +5687,7 @@
101111,5.BASE,5.OP,16.OFFSET:NORMAL:32::CACHE
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5527,6 +5717,7 @@
010000,10000,000000000000000,111001:COP0:32::DI
"di"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5539,6 +5730,7 @@
010000,10000,000000000000000,111000:COP0:32::EI
"ei"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5552,6 +5744,7 @@
"eret"
*mipsIII:
*mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5582,6 +5775,7 @@
"mfc0 r<RT>, r<RD> # <REGX>"
*mipsI,mipsII,mipsIII,mipsIV:
*r3900:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5605,6 +5799,7 @@
*tx19:
// end-sanitize-tx19
*r3900:
+*vr4100:
// start-sanitize-vr4320
*vr4320:
// end-sanitize-vr4320
@@ -5627,6 +5822,7 @@
*tx19:
// end-sanitize-tx19
*r3900:
+*vr4100:
// start-sanitize-vr4320
*vr4320:
// end-sanitize-vr4320
@@ -5645,6 +5841,7 @@
0100,ZZ!0!1!3,5.COP_FUN0!8,5.COP_FUN1,16.COP_FUN2:NORMAL:32::COPz
"cop<ZZ> <COP_FUN0><COP_FUN1><COP_FUN2>"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
// start-sanitize-r5900
*r5900:
// end-sanitize-r5900
@@ -5661,6 +5858,7 @@
010000,10000,000000000000000,001000:COP0:32::TLBP
"tlbp"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5673,6 +5871,7 @@
010000,10000,000000000000000,000001:COP0:32::TLBR
"tlbr"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5685,6 +5884,7 @@
010000,10000,000000000000000,000010:COP0:32::TLBWI
"tlbwi"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320:
@@ -5697,6 +5897,7 @@
010000,10000,000000000000000,000110:COP0:32::TLBWR
"tlbwr"
*mipsI,mipsII,mipsIII,mipsIV:
+*vr4100:
*vr5000:
// start-sanitize-vr4320
*vr4320: