aboutsummaryrefslogtreecommitdiff
path: root/sim/mips/mips.igen
diff options
context:
space:
mode:
authorFrank Ch. Eigler <fche@redhat.com>1998-06-16 18:13:47 +0000
committerFrank Ch. Eigler <fche@redhat.com>1998-06-16 18:13:47 +0000
commit702968c54b22f3d8df61f5a559d8c02f69d8e396 (patch)
tree401167ab24daf6e187da768bca8704abccc4a3bf /sim/mips/mips.igen
parent1106213c560f0adee00816e97017585deff2bc8d (diff)
downloadfsf-binutils-gdb-702968c54b22f3d8df61f5a559d8c02f69d8e396.zip
fsf-binutils-gdb-702968c54b22f3d8df61f5a559d8c02f69d8e396.tar.gz
fsf-binutils-gdb-702968c54b22f3d8df61f5a559d8c02f69d8e396.tar.bz2
* ECC (tx39) and sky changes.
[ChangeLog] start-sanitize-tx3904 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904tmr.c: Deschedule timer event after dispatching. Reduce unnecessarily high timer event frequency. * dv-tx3904cpu.c: Ditto for interrupt event. end-sanitize-tx3904 start-sanitize-sky Tue Jun 16 14:12:09 1998 Frank Ch. Eigler <fche@cygnus.com> * interp.c (decode_coproc): Removed COP2 branches. * r5900.igen: Moved COP2 branch instructions here. * mips.igen: Restricted COPz == COP2 bit pattern to exclude COP2 branches. end-sanitize-sky
Diffstat (limited to 'sim/mips/mips.igen')
-rw-r--r--sim/mips/mips.igen32
1 files changed, 19 insertions, 13 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index a9479b2..4efde4a 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -976,19 +976,6 @@
-0100,ZZ!0!1!3,26.COP_FUN:NORMAL:32::COPz
-"cop<ZZ> <COP_FUN>"
-*mipsI,mipsII,mipsIII,mipsIV:
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-*r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
- DecodeCoproc (instruction_0);
-}
@@ -3997,6 +3984,9 @@
+
+
+
// C.EQ.S
// C.EQ.D
// ...
@@ -5620,6 +5610,22 @@
}
+0100,ZZ!0!1!3,5.COP_FUN0!8,5.COP_FUN1,16.COP_FUN2:NORMAL:32::COPz
+"cop<ZZ> <COP_FUN0><COP_FUN1><COP_FUN2>"
+*mipsI,mipsII,mipsIII,mipsIV:
+// start-sanitize-r5900
+*r5900:
+// end-sanitize-r5900
+*r3900:
+// start-sanitize-tx19
+*tx19:
+// end-sanitize-tx19
+{
+ DecodeCoproc (instruction_0);
+}
+
+
+
010000,10000,000000000000000,001000:COP0:32::TLBP
"tlbp"
*mipsI,mipsII,mipsIII,mipsIV: