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authorFrank Ch. Eigler <fche@redhat.com>1998-12-30 21:16:14 +0000
committerFrank Ch. Eigler <fche@redhat.com>1998-12-30 21:16:14 +0000
commit08f758df94ff4fb77af76e821bd144959dd3cc49 (patch)
treeef761c49969966bcb7b040c7cedfb2ca4f1cae68 /sim/mips/interp.c
parentbd164e283521804221550fbefe9080904d79aaf3 (diff)
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* resolution of eCos-vs.-sky merge conflict!
[ChangeLog] 1998-12-30 Frank Ch. Eigler <fche@cygnus.com> * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt. start-sanitize-sky * interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook. Call sim_engine_halt on BreakPoint. end-sanitize-sky [ChangeLog.sky] 1998-12-30 Frank Ch. Eigler <fche@cygnus.com> * sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
Diffstat (limited to 'sim/mips/interp.c')
-rw-r--r--sim/mips/interp.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index 4a666d3..811307f 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1941,6 +1941,11 @@ signal_exception (SIM_DESC sd,
/* Ensure that any active atomic read/modify/write operation will fail: */
LLBIT = 0;
+ /* Save registers before interrupt dispatching */
+#ifdef SIM_CPU_EXCEPTION_TRIGGER
+ SIM_CPU_EXCEPTION_TRIGGER(sd, cpu, cia);
+#endif
+
/* First, handle any simulator specific magic exceptions. These are not "real" exceptions, but
are exceptions which the simulator uses to implement different features. */
@@ -2144,10 +2149,13 @@ signal_exception (SIM_DESC sd,
sim_stopped, SIM_SIGFPE);
break;
+ case BreakPoint:
+ sim_engine_halt (SD, CPU, NULL, PC, sim_stopped, SIM_SIGTRAP);
+ break;
+
case TLBModification:
case TLBLoad:
case TLBStore:
- case BreakPoint:
case SystemCall:
case Trap:
sim_engine_restart (SD, CPU, NULL, PC);