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| author | Chris Demetriou <cgd@google.com> | 2002-06-03 22:05:15 +0000 |
|---|---|---|
| committer | Chris Demetriou <cgd@google.com> | 2002-06-03 22:05:15 +0000 |
| commit | bad673a9cb51c25370660c88887d0ad3b34b007b (patch) | |
| tree | a47ac45335aeaeda684cc9ed2e358df4ddd283e0 /sim/mips/cp1.c | |
| parent | 7cbea0890ed72ea3c56a8c8abe4824c020c87295 (diff) | |
| download | fsf-binutils-gdb-bad673a9cb51c25370660c88887d0ad3b34b007b.zip fsf-binutils-gdb-bad673a9cb51c25370660c88887d0ad3b34b007b.tar.gz fsf-binutils-gdb-bad673a9cb51c25370660c88887d0ad3b34b007b.tar.bz2 | |
2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up comments which describe FP formats.
(FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
Diffstat (limited to 'sim/mips/cp1.c')
| -rw-r--r-- | sim/mips/cp1.c | 49 |
1 files changed, 25 insertions, 24 deletions
diff --git a/sim/mips/cp1.c b/sim/mips/cp1.c index 063c241..3b1cac2 100644 --- a/sim/mips/cp1.c +++ b/sim/mips/cp1.c @@ -26,35 +26,36 @@ /*-- FPU support routines ---------------------------------------------------*/ /* Numbers are held in normalized form. The SINGLE and DOUBLE binary - formats conform to ANSI/IEEE Std 754-1985. */ -/* SINGLE precision floating: - * seeeeeeeefffffffffffffffffffffff - * s = 1bit = sign - * e = 8bits = exponent - * f = 23bits = fraction - */ -/* SINGLE precision fixed: - * siiiiiiiiiiiiiiiiiiiiiiiiiiiiiii - * s = 1bit = sign - * i = 31bits = integer - */ -/* DOUBLE precision floating: - * seeeeeeeeeeeffffffffffffffffffffffffffffffffffffffffffffffffffff - * s = 1bit = sign - * e = 11bits = exponent - * f = 52bits = fraction - */ -/* DOUBLE precision fixed: - * siiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiii - * s = 1bit = sign - * i = 63bits = integer + formats conform to ANSI/IEEE Std 754-1985. + + SINGLE precision floating: + seeeeeeeefffffffffffffffffffffff + s = 1bit = sign + e = 8bits = exponent + f = 23bits = fraction + + SINGLE precision fixed: + siiiiiiiiiiiiiiiiiiiiiiiiiiiiiii + s = 1bit = sign + i = 31bits = integer + + DOUBLE precision floating: + seeeeeeeeeeeffffffffffffffffffffffffffffffffffffffffffffffffffff + s = 1bit = sign + e = 11bits = exponent + f = 52bits = fraction + + DOUBLE precision fixed: + siiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiii + s = 1bit = sign + i = 63bits = integer */ /* Explicit QNaN values used when value required: */ #define FPQNaN_SINGLE (0x7FBFFFFF) #define FPQNaN_WORD (0x7FFFFFFF) -#define FPQNaN_DOUBLE ((((uword64) 0x7FF7FFFF) << 32) | 0xFFFFFFFF) -#define FPQNaN_LONG ((((uword64) 0x7FFFFFFF) << 32) | 0xFFFFFFFF) +#define FPQNaN_DOUBLE (UNSIGNED64 (0x7FF7FFFFFFFFFFFF)) +#define FPQNaN_LONG (UNSIGNED64 (0x7FFFFFFFFFFFFFFF)) static const char *fpu_format_name (FP_formats fmt); #ifdef DEBUG |