sim: mcore: pull cpu state out of global scope

This avoids using global variables to hold the cpu state so we can
better integrate with the sim common code.

There's also a minor fix here where we move the pc register back into
the state that is accessible by the asints array.  When it was pulled
out previously, the reg store/fetch functions broke, but no one really
noticed as the mcore gdb port was dropped a while back.

1 files changed, 28 insertions, 0 deletions

diff --git a/sim/mcore/ChangeLog b/sim/mcore/ChangeLog
index d89050d..b85c281 100644
--- a/sim/mcore/ChangeLog
+++ b/sim/mcore/ChangeLog
@@ -1,5 +1,33 @@
 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 
+	* interp.c (mcore_regset, LAST_VALID_CREG, NUM_MCORE_REGS: Move
+	to sim-main.h.
+	(cpu): Delete.
+	(gr, cr): Change from asregs to cpu.
+	(sr, vbr, esr, fsr, epc, fpc, ss0, ss1, ss2, ss3, ss4, gcr, gsr):
+	Change from asregs to cr.
+	(C_ON, C_VALUE, C_OFF, SET_C, CLR_C, NEW_C, SR_AF): Change from
+	cpu.sr to sr.
+	(set_active_regs): Define.
+	(set_initial_gprs): Rename scpu to cpu.  Change cpu.sr to sr and
+	cpu.gr to gr.  Replace for loop with memset.  Replace SR_AF with
+	set_active_regs.
+	(handle_trap1): Add cpu arg.
+	(process_stub): Likewise.  Change cpu.gr to gr.
+	(util): Rename scpu to cpu.  Change cpu.gr to gr.
+	(rbat, rhat, rlat, wbat, what, wlat, ILLEGAL, sim_engine_run,
+	mcore_reg_store, mcore_reg_fetch, sim_create_inferior): Rename scpu
+	to cpu.
+	(step_once): Likewise.  Replace SR_AF with set_active_regs.  Adjust
+	cpu.asregs to cpu.
+	(mcore_pc_get, mcore_pc_set): Adjust cpu->pc to cpu->regs.pc.
+	* sim-main.h (mcore_regset, LAST_VALID_CREG, NUM_MCORE_REGS: Move
+	from interp.c.
+	(_sim_cpu): Add regs, asints, active_gregs, ticks, stalls, cycles,
+	and insts members.
+
+2015-11-15  Mike Frysinger  <vapier@gentoo.org>
+
 	* Makefile.in (SIM_OBJS): Add sim-reg.o.
 	* interp.c (sim_store_register): Rename to ...
 	(mcore_reg_store): ... this.  Change SIM_DESC to SIM_CPU.