sim: m68hc11: migrate to standard uintXX_t types

This old port setup its own uintXX types, but since we require C11
now, we can assume the standard uintXX_t types exist and use them.

Also migrate off the sim-specific unsignedXX types.

1 files changed, 68 insertions, 68 deletions

diff --git a/sim/m68hc11/m68hc11_sim.c b/sim/m68hc11/m68hc11_sim.c
index 80a450d..6ec45f7 100644
--- a/sim/m68hc11/m68hc11_sim.c
+++ b/sim/m68hc11/m68hc11_sim.c
@@ -101,7 +101,7 @@ cpu_option_handler (SIM_DESC sd, sim_cpu *cpu,
 
     
 void
-cpu_call (sim_cpu *cpu, uint16 addr)
+cpu_call (sim_cpu *cpu, uint16_t addr)
 {
 
   cpu_set_pc (cpu, addr);
@@ -114,13 +114,13 @@ cpu_return (sim_cpu *cpu)
 
 /* Set the stack pointer and re-compute the current frame.  */
 void
-cpu_set_sp (sim_cpu *cpu, uint16 val)
+cpu_set_sp (sim_cpu *cpu, uint16_t val)
 {
   cpu->cpu_regs.sp = val;
 }
 
-static uint16
-cpu_get_reg (sim_cpu *cpu, uint8 reg)
+static uint16_t
+cpu_get_reg (sim_cpu *cpu, uint8_t reg)
 {
   switch (reg)
     {
@@ -141,8 +141,8 @@ cpu_get_reg (sim_cpu *cpu, uint8 reg)
     }
 }
 
-static uint16
-cpu_get_src_reg (sim_cpu *cpu, uint8 reg)
+static uint16_t
+cpu_get_src_reg (sim_cpu *cpu, uint8_t reg)
 {
   switch (reg)
     {
@@ -176,7 +176,7 @@ cpu_get_src_reg (sim_cpu *cpu, uint8 reg)
 }
 
 static void
-cpu_set_dst_reg (sim_cpu *cpu, uint8 reg, uint16 val)
+cpu_set_dst_reg (sim_cpu *cpu, uint8_t reg, uint16_t val)
 {
   switch (reg)
     {
@@ -218,7 +218,7 @@ cpu_set_dst_reg (sim_cpu *cpu, uint8 reg, uint16 val)
 }
 
 static void
-cpu_set_reg (sim_cpu *cpu, uint8 reg, uint16 val)
+cpu_set_reg (sim_cpu *cpu, uint8_t reg, uint16_t val)
 {
   switch (reg)
     {
@@ -245,13 +245,13 @@ cpu_set_reg (sim_cpu *cpu, uint8 reg, uint16 val)
 
 /* Returns the address of a 68HC12 indexed operand.
    Pre and post modifications are handled on the source register.  */
-uint16
+uint16_t
 cpu_get_indexed_operand_addr (sim_cpu *cpu, int restricted)
 {
-  uint8 reg;
-  uint16 sval;
-  uint16 addr;
-  uint8 code;
+  uint8_t reg;
+  uint16_t sval;
+  uint16_t addr;
+  uint8_t code;
 
   code = cpu_fetch8 (cpu);
 
@@ -350,29 +350,29 @@ cpu_get_indexed_operand_addr (sim_cpu *cpu, int restricted)
   return addr;
 }
 
-static uint8
+static uint8_t
 cpu_get_indexed_operand8 (sim_cpu *cpu, int restricted)
 {
-  uint16 addr;
+  uint16_t addr;
 
   addr = cpu_get_indexed_operand_addr (cpu, restricted);
   return memory_read8 (cpu, addr);
 }
 
-static uint16
+static uint16_t
 cpu_get_indexed_operand16 (sim_cpu *cpu, int restricted)
 {
-  uint16 addr;
+  uint16_t addr;
 
   addr = cpu_get_indexed_operand_addr (cpu, restricted);
   return memory_read16 (cpu, addr);
 }
 
 void
-cpu_move8 (sim_cpu *cpu, uint8 code)
+cpu_move8 (sim_cpu *cpu, uint8_t code)
 {
-  uint8 src;
-  uint16 addr;
+  uint8_t src;
+  uint16_t addr;
 
   switch (code)
     {
@@ -416,10 +416,10 @@ cpu_move8 (sim_cpu *cpu, uint8 code)
 }
 
 void
-cpu_move16 (sim_cpu *cpu, uint8 code)
+cpu_move16 (sim_cpu *cpu, uint8_t code)
 {
-  uint16 src;
-  uint16 addr;
+  uint16_t src;
+  uint16_t addr;
 
   switch (code)
     {
@@ -530,7 +530,7 @@ cpu_reset (sim_cpu *cpu)
 int
 cpu_restart (sim_cpu *cpu)
 {
-  uint16 addr;
+  uint16_t addr;
 
   /* Get CPU starting address depending on the CPU mode.  */
   if (cpu->cpu_use_elf_start == 0)
@@ -591,7 +591,7 @@ print_io_reg_desc (SIM_DESC sd, io_reg_desc *desc, int val, int mode)
 
 void
 print_io_byte (SIM_DESC sd, const char *name, io_reg_desc *desc,
-	       uint8 val, uint16 addr)
+	       uint8_t val, uint16_t addr)
 {
   sim_io_printf (sd, "  %-9.9s @ 0x%04x 0x%02x ", name, addr, val);
   if (desc)
@@ -600,7 +600,7 @@ print_io_byte (SIM_DESC sd, const char *name, io_reg_desc *desc,
 
 void
 print_io_word (SIM_DESC sd, const char *name, io_reg_desc *desc,
-	       uint16 val, uint16 addr)
+	       uint16_t val, uint16_t addr)
 {
   sim_io_printf (sd, "  %-9.9s @ 0x%04x 0x%04x ", name, addr, val);
   if (desc)
@@ -608,7 +608,7 @@ print_io_word (SIM_DESC sd, const char *name, io_reg_desc *desc,
 }
 
 void
-cpu_ccr_update_tst8 (sim_cpu *cpu, uint8 val)
+cpu_ccr_update_tst8 (sim_cpu *cpu, uint8_t val)
 {
   cpu_set_ccr_V (cpu, 0);
   cpu_set_ccr_N (cpu, val & 0x80 ? 1 : 0);
@@ -616,10 +616,10 @@ cpu_ccr_update_tst8 (sim_cpu *cpu, uint8 val)
 }
 
 
-uint16
+uint16_t
 cpu_fetch_relbranch (sim_cpu *cpu)
 {
-  uint16 addr = (uint16) cpu_fetch8 (cpu);
+  uint16_t addr = (uint16_t) cpu_fetch8 (cpu);
 
   if (addr & 0x0080)
     {
@@ -629,10 +629,10 @@ cpu_fetch_relbranch (sim_cpu *cpu)
   return addr;
 }
 
-uint16
+uint16_t
 cpu_fetch_relbranch16 (sim_cpu *cpu)
 {
-  uint16 addr = cpu_fetch16 (cpu);
+  uint16_t addr = cpu_fetch16 (cpu);
 
   addr += cpu->cpu_regs.pc;
   return addr;
@@ -664,10 +664,10 @@ cpu_push_all (sim_cpu *cpu)
 void
 cpu_dbcc (sim_cpu *cpu)
 {
-  uint8 code;
-  uint16 addr;
-  uint16 inc;
-  uint16 reg;
+  uint8_t code;
+  uint16_t addr;
+  uint16_t inc;
+  uint16_t reg;
   
   code = cpu_fetch8 (cpu);
   switch (code & 0xc0)
@@ -703,11 +703,11 @@ cpu_dbcc (sim_cpu *cpu)
 }
 
 void
-cpu_exg (sim_cpu *cpu, uint8 code)
+cpu_exg (sim_cpu *cpu, uint8_t code)
 {
-  uint8 r1, r2;
-  uint16 src1;
-  uint16 src2;
+  uint8_t r1, r2;
+  uint16_t src1;
+  uint16_t src2;
 
   r1 = (code >> 4) & 0x07;
   r2 = code & 0x07;
@@ -741,7 +741,7 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
     {
     case M6811_RTI:
       {
-        uint8 ccr;
+        uint8_t ccr;
 
         ccr = cpu_m68hc11_pop_uint8 (cpu);
         cpu_set_ccr (cpu, ccr);
@@ -755,7 +755,7 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 
     case M6812_RTI:
       {
-        uint8 ccr;
+        uint8_t ccr;
 
         ccr = cpu_m68hc12_pop_uint8 (cpu);
         cpu_set_ccr (cpu, ccr);
@@ -791,7 +791,7 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
     case M6811_ILLEGAL:
       if (cpu->cpu_emul_syscall)
         {
-          uint8 op = memory_read8 (cpu,
+          uint8_t op = memory_read8 (cpu,
                                    cpu_get_pc (cpu) - 1);
           if (op == 0x41)
             {
@@ -833,8 +833,8 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 
     case M6812_IDIVS:
       {
-        int32 src1 = (int16) cpu_get_d (cpu);
-        int32 src2 = (int16) cpu_get_x (cpu);
+        int32_t src1 = (int16_t) cpu_get_d (cpu);
+        int32_t src2 = (int16_t) cpu_get_x (cpu);
 
         if (src2 == 0)
           {
@@ -855,9 +855,9 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
       
     case M6812_EDIV:
       {
-        uint32 src1 = (uint32) cpu_get_x (cpu);
-        uint32 src2 = (uint32) (cpu_get_y (cpu) << 16)
-          | (uint32) (cpu_get_d (cpu));
+        uint32_t src1 = (uint32_t) cpu_get_x (cpu);
+        uint32_t src2 = (uint32_t) (cpu_get_y (cpu) << 16)
+          | (uint32_t) (cpu_get_d (cpu));
 
         if (src1 == 0)
           {
@@ -878,9 +878,9 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
       
     case M6812_EDIVS:
       {
-        int32 src1 = (int16) cpu_get_x (cpu);
-        int32 src2 = (uint32) (cpu_get_y (cpu) << 16)
-          | (uint32) (cpu_get_d (cpu));
+        int32_t src1 = (int16_t) cpu_get_x (cpu);
+        int32_t src2 = (uint32_t) (cpu_get_y (cpu) << 16)
+          | (uint32_t) (cpu_get_d (cpu));
 
         if (src1 == 0)
           {
@@ -901,10 +901,10 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 
     case M6812_EMULS:
       {
-        int32 src1, src2;
+        int32_t src1, src2;
 
-        src1 = (int16) cpu_get_d (cpu);
-        src2 = (int16) cpu_get_y (cpu);
+        src1 = (int16_t) cpu_get_d (cpu);
+        src2 = (int16_t) cpu_get_y (cpu);
         src1 = src1 * src2;
         cpu_set_d (cpu, src1 & 0x0ffff);
         cpu_set_y (cpu, src1 >> 16);
@@ -916,15 +916,15 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
       
     case M6812_EMACS:
       {
-        int32 src1, src2;
-        uint16 addr;
+        int32_t src1, src2;
+        uint16_t addr;
         
         addr = cpu_fetch16 (cpu);
-        src1 = (int16) memory_read16 (cpu, cpu_get_x (cpu));
-        src2 = (int16) memory_read16 (cpu, cpu_get_y (cpu));
+        src1 = (int16_t) memory_read16 (cpu, cpu_get_x (cpu));
+        src2 = (int16_t) memory_read16 (cpu, cpu_get_y (cpu));
         src1 = src1 * src2;
-        src2 = (((uint32) memory_read16 (cpu, addr)) << 16)
-          | (uint32) memory_read16 (cpu, addr + 2);
+        src2 = (((uint32_t) memory_read16 (cpu, addr)) << 16)
+          | (uint32_t) memory_read16 (cpu, addr + 2);
 
         memory_write16 (cpu, addr, (src1 + src2) >> 16);
         memory_write16 (cpu, addr + 2, (src1 + src2));
@@ -935,8 +935,8 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 
     case M6812_CALL:
       {
-        uint8 page;
-        uint16 addr;
+        uint8_t page;
+        uint16_t addr;
 
         addr = cpu_fetch16 (cpu);
         page = cpu_fetch8 (cpu);
@@ -951,9 +951,9 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 
     case M6812_CALL_INDIRECT:
       {
-        uint8 code;
-        uint16 addr;
-        uint8 page;
+        uint8_t code;
+        uint16_t addr;
+        uint8_t page;
 
         code = memory_read8 (cpu, cpu_get_pc (cpu));
         /* Indirect addressing call has the page specified in the
@@ -979,8 +979,8 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 
     case M6812_RTC:
       {
-        uint8 page = cpu_m68hc12_pop_uint8 (cpu);
-        uint16 addr = cpu_m68hc12_pop_uint16 (cpu);
+        uint8_t page = cpu_m68hc12_pop_uint8 (cpu);
+        uint16_t addr = cpu_m68hc12_pop_uint16 (cpu);
 
         cpu_set_page (cpu, page);
         cpu_set_pc (cpu, addr);
@@ -1019,7 +1019,7 @@ cpu_single_step (sim_cpu *cpu)
 /* VARARGS */
 void
 sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
-		  uint16 addr, const char *message, ...)
+		  uint16_t addr, const char *message, ...)
 {
   char buf[1024];
   va_list args;
@@ -1035,7 +1035,7 @@ sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
 
 void
 cpu_memory_exception (sim_cpu *cpu, SIM_SIGNAL excep,
-                      uint16 addr, const char *message)
+                      uint16_t addr, const char *message)
 {
   if (cpu->cpu_running == 0)
     return;