Add pseudo-basic-block execution support.

	* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
	(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
	(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
	(mloop.c): Build pseudo-basic-block version.  Depend on stamp-cpu.
	(stamp-decode): Delete, build decode files with other cpu files.
	* arch.c,arch.h,cpuall.h: Regenerate.
	* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
	* sem-switch.c,sem.c: Regenerate.
	* m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
	load_regs_pending.
	* m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
	(m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
	m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
	m32rbf_h_accum_set): Likewise.
	(m32r_model_{init,update}_insn_cycles): Delete.
	(m32rbf_model_insn_{before,after}): New fns.
	(m32r_model_record_cti,m32r_model_record_cycles): Delete.
	(m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
	(m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
	(check_load_stall): New fn.
	(m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
	(m32rbf_model_test_u_exec): New fn.
	* mloop.in: Rewrite, use pbb support.
	* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
	(sim_fetch_register,sim_store_register): Delete.
	* sim-main.h (CIA_GET,CIA_SET): Fix.
	(SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
	* tconfig.in (WITH_SCACHE_PBB): Define.
	(WITH_SCACHE_PBB_M32RBF): Define.
	* traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
	(m32r_trap): Pass pc to sim_engine_halt.
	* configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
	* configure: Regenerate.
start-sanitize-m32rx
	* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
	(mloopx.c): Build pseudo-basic-block version.  Depend on stamp-xcpu.
	(semx.o): Delete.
	(extractx.o): Add.
	(stamp-xdecode): Delete, build decode files with other cpu files.
	* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
	* readx.c: Delete.
	* semx.c: Delete.
	* extractx.c: New file.
	* semx-switch.c: New file.
	* m32r-sim.h (BRANCH_NEW_PC): Delete.
	(SEM_SKIP_INSN): New macro.
	* m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
	(m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
	m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
	m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
	(m32rxf_model_insn_{before,after}): New fns.
	(m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
	(m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
	(check_load_stall): New fn.
	(m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
	* mloopx.in: Rewrite, use pbb support.
	* tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
	(WITH_SEM_SWITCH_FULL): Change from 0 to 1.
end-sanitize-m32rx

1 files changed, 26 insertions, 43 deletions

diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 0dad156..4257f85 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -22,7 +22,7 @@
 
 M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
 # start-sanitize-m32rx
-M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
+M32RX_OBJS = m32rx.o cpux.o decodex.o extractx.o modelx.o mloopx.o
 # end-sanitize-m32rx
 
 CONFIG_DEVICES = dv-sockser.o
@@ -31,12 +31,12 @@ CONFIG_DEVICES =
 SIM_OBJS = \
 	$(SIM_NEW_COMMON_OBJS) \
 	sim-cpu.o \
-	sim-engine.o \
 	sim-hload.o \
 	sim-hrw.o \
 	sim-model.o \
-	sim-reason.o \
+	sim-reg.o \
 	cgen-utils.o cgen-trace.o cgen-scache.o \
+	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
 	sim-if.o arch.o \
 	$(M32R_OBJS) \
 	$(start-sanitize-m32rx) \
@@ -50,7 +50,8 @@ SIM_EXTRA_DEPS = \
 	$(srcdir)/../common/cgen-types.h \
 	$(srcdir)/../common/cgen-sim.h \
 	$(srcdir)/../common/cgen-trace.h \
-	arch.h cpuall.h m32r-sim.h cpu-opc.h
+	arch.h cpuall.h m32r-sim.h cpu-opc.h \
+	$(srcdir)/../../include/opcode/cgen.h
 
 SIM_EXTRA_CFLAGS =
 
@@ -73,8 +74,7 @@ MAIN_INCLUDE_DEPS = \
 	$(srcdir)/../common/sim-trace.h \
 	$(srcdir)/../common/sim-profile.h \
 	tconfig.h
-INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h \
-	$(srcdir)/../../include/opcode/cgen.h
+INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
 OPS_INCLUDE_DEPS = \
 	$(srcdir)/../common/cgen-mem.h \
 	$(srcdir)/../common/cgen-ops.h
@@ -93,21 +93,17 @@ m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
 mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	rm -f mloop.c
 	$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
-		-mono -scache -fast m32r $(srcdir)/mloop.in \
-		| sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
-mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
+		-mono -fast -pbb -switch sem-switch.c \
+		m32rbf $(srcdir)/mloop.in \
+		| sed -e 's/@cpu@/m32rbf/' -e 's/@CPU@/M32RBF/' >mloop.c
+mloop.o: mloop.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-cpu
 
 cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
 decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
 extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
-	$(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
 sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
-	$(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
 model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
 
-#sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
-#	$(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)
-
 # start-sanitize-m32rx
 # M32RX objs
 
@@ -117,21 +113,22 @@ m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
 mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 	rm -f mloopx.c
 	$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
-		-mono -no-scache -no-fast -parallel \
-		m32r $(srcdir)/mloopx.in \
-		| sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
-mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+		-mono -no-fast -pbb -parallel -switch semx-switch.c \
+		m32rxf $(srcdir)/mloopx.in \
+		| sed -e 's/@cpu@/m32rxf/' -e 's/@CPU@/M32RXF/' >mloopx.c
+mloopx.o: mloopx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-xcpu
 
 cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
 decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
-semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+extractx.o: extractx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+#semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
 modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
 # end-sanitize-m32rx
 
 m32r-clean:
-	rm -f mloop.c stamp-arch stamp-cpu stamp-decode
+	rm -f mloop.c stamp-arch stamp-cpu
 # start-sanitize-m32rx
-	rm -f mloopx.c stamp-xcpu stamp-xdecode
+	rm -f mloopx.c stamp-xcpu
 # end-sanitize-m32rx
 	rm -f tmp-*
 
@@ -147,33 +144,19 @@ stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
 
-stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+	  cpu=m32rbf mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 	touch stamp-cpu
-cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu
-	@true
-
-stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
-	touch stamp-decode
-decode.h decode.c: $(CGEN_MAINT) stamp-decode
+cpu.h extract.c sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 	@true
 # end-sanitize-cygnus
 
 # start-sanitize-m32rx
-stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
+stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+	  cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEMSW)"
 	touch stamp-xcpu
-cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu
-	@true
-
-stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32rx mach=m32rx SUFFIX=x
-	touch stamp-xdecode
-decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode
+cpux.h extractx.c semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
 	@true
 # end-sanitize-m32rx