* Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h.

	(stamp-arch,stamp-cpu): Update FLAGS variable, option syntax changed.
	(stamp-xmloop): s/-parallel/-parallel-write/.
	(stamp-xcpu): Update FLAGS variable, option syntax changed.
	* configure.in (sim_link_files,sim_link_links): Delete.
	* configure: Rebuild.
	* decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
	* decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
	* mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE.
	* sim-if.c (sim_open): m32r_cgen_cpu_open renamed from
	m32r_cgen_opcode_open.  Set disassembler.
	(sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open.
	* sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
	m32r-desc.h,m32r-opc.h,m32r-sim.h.

1 files changed, 17 insertions, 17 deletions

diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 8e4c6d6..75c2853 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -1,6 +1,5 @@
-
 # Makefile template for Configure for the m32r simulator
-# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
 # Contributed by Cygnus Support.
 #
 # This file is part of GDB, the GNU debugger.
@@ -22,9 +21,9 @@
 ## COMMON_PRE_CONFIG_FRAG
 
 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
-# start-sanitize-m32rx
+# start-sanitize-cygnus
 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
-# end-sanitize-m32rx
+# end-sanitize-cygnus
 
 CONFIG_DEVICES = dv-sockser.o
 CONFIG_DEVICES =
@@ -40,16 +39,16 @@ SIM_OBJS = \
 	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
 	sim-if.o arch.o \
 	$(M32R_OBJS) \
-	$(start-sanitize-m32rx) \
+	$(start-sanitize-cygnus) \
 	$(M32RX_OBJS) \
-	$(end-sanitize-m32rx) \
+	$(end-sanitize-cygnus) \
 	traps.o devices.o \
 	$(CONFIG_DEVICES)
 
 # Extra headers included by sim-main.h.
 SIM_EXTRA_DEPS = \
 	$(CGEN_INCLUDE_DEPS) \
-	arch.h cpuall.h m32r-sim.h cpu-opc.h
+	arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
 
 SIM_EXTRA_CFLAGS =
 
@@ -94,7 +93,7 @@ decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
 model.o: model.c $(M32RBF_INCLUDE_DEPS)
 
-# start-sanitize-m32rx
+# start-sanitize-cygnus
 # M32RX objs
 
 M32RXF_INCLUDE_DEPS = \
@@ -107,7 +106,7 @@ m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 mloopx.c engx.h: stamp-xmloop
 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh \
-		-mono -no-fast -pbb -parallel -switch semx-switch.c \
+		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 		-cpu m32rxf -infile $(srcdir)/mloopx.in
 	$(SHELL) $(srcroot)/move-if-change eng.hin engx.h
 	$(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
@@ -118,13 +117,13 @@ cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
-# end-sanitize-m32rx
+# end-sanitize-cygnus
 
 m32r-clean:
 	rm -f mloop.c eng.h stamp-arch stamp-cpu stamp-mloop
-# start-sanitize-m32rx
+# start-sanitize-cygnus
 	rm -f mloopx.c engx.h stamp-xcpu stamp-xmloop
-# end-sanitize-m32rx
+# end-sanitize-cygnus
 	rm -f tmp-*
 
 # start-sanitize-cygnus
@@ -134,7 +133,8 @@ CGEN_MAINT = ; @true
 @CGEN_MAINT@CGEN_MAINT =
 
 stamp-arch: $(CGEN_MAIN_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all
+	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
+	  FLAGS="with-scache with-profile=fn"
 	touch stamp-arch
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
@@ -142,18 +142,18 @@ arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  cpu=m32rbf mach=m32r SUFFIX= \
-	  FLAGS="with-scache,with-profile fn" \
+	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 	touch stamp-cpu
 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 	@true
 # end-sanitize-cygnus
 
-# start-sanitize-m32rx
+# start-sanitize-cygnus
 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
+	  cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	touch stamp-xcpu
 cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
 	@true
-# end-sanitize-m32rx
+# end-sanitize-cygnus