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| author | Nick Clifton <nickc@redhat.com> | 2003-12-19 11:44:01 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2003-12-19 11:44:01 +0000 |
| commit | 6edf0760c5c65c9f0582c5d8036bfa058f2cd6c2 (patch) | |
| tree | 475a1c15199a9a645d40a11faddc392816d6e35c /sim/m32r/Makefile.in | |
| parent | c4bf77942dea9cad22426964bf32c46cbc443705 (diff) | |
| download | fsf-binutils-gdb-6edf0760c5c65c9f0582c5d8036bfa058f2cd6c2.zip fsf-binutils-gdb-6edf0760c5c65c9f0582c5d8036bfa058f2cd6c2.tar.gz fsf-binutils-gdb-6edf0760c5c65c9f0582c5d8036bfa058f2cd6c2.tar.bz2 | |
Add support for m32r-linux target, including a RELA ABI and PIC.
Diffstat (limited to 'sim/m32r/Makefile.in')
| -rw-r--r-- | sim/m32r/Makefile.in | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index ee3f7e8..eb29ab1 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -23,6 +23,7 @@ M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o +TRAPS_OBJ = @traps_obj@ CONFIG_DEVICES = dv-sockser.o CONFIG_DEVICES = @@ -40,7 +41,8 @@ SIM_OBJS = \ $(M32R_OBJS) \ $(M32RX_OBJS) \ $(M32R2_OBJS) \ - traps.o devices.o \ + $(TRAPS_OBJ) \ + devices.o \ $(CONFIG_DEVICES) # Extra headers included by sim-main.h. @@ -48,7 +50,7 @@ SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h -SIM_EXTRA_CFLAGS = +SIM_EXTRA_CFLAGS = @sim_extra_cflags@ SIM_RUN_OBJS = nrun.o SIM_EXTRA_CLEAN = m32r-clean @@ -65,6 +67,7 @@ sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h arch.o: arch.c $(SIM_MAIN_DEPS) traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) +traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS) devices.o: devices.c $(SIM_MAIN_DEPS) # M32R objs |