import gdb-1999-08-09 snapshot

9 files changed, 4076 insertions, 6154 deletions

diff --git a/sim/i960/ChangeLog b/sim/i960/ChangeLog
index 4978b8b..f6582fc 100644
--- a/sim/i960/ChangeLog
+++ b/sim/i960/ChangeLog
@@ -1,3 +1,12 @@
+1999-08-09  Doug Evans  <devans@casey.cygnus.com>
+
+	* cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
+
+1999-08-04  Doug Evans  <devans@casey.cygnus.com>
+
+	* cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
+	* i960-desc.h: Rebuild.
+
 1999-05-08  Felix Lee  <flee@cygnus.com>
 
 	* configure: Regenerated to track ../common/aclocal.m4 changes.
diff --git a/sim/i960/cpu.h b/sim/i960/cpu.h
index 9887906..17701d3 100644
--- a/sim/i960/cpu.h
+++ b/sim/i960/cpu.h
@@ -72,1485 +72,208 @@ typedef struct {
   int empty;
 } MODEL_I960CA_DATA;
 
+/* Instruction argument buffer.  */
+
 union sem_fields {
-    struct { /* empty sformat for unspecified field list */
-      int empty;
-    } fmt_empty;
-    struct { /* e.g. mulo $src1, $src2, $dst */
-      SI * i_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_mulo;
-    struct { /* e.g. mulo $lit1, $src2, $dst */
-      UINT f_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_mulo1;
-    struct { /* e.g. mulo $src1, $lit2, $dst */
-      UINT f_src2;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char out_dst;
-    } fmt_mulo2;
-    struct { /* e.g. mulo $lit1, $lit2, $dst */
-      UINT f_src1;
-      UINT f_src2;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_mulo3;
-    struct { /* e.g. notbit $src1, $src2, $dst */
-      SI * i_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_notbit;
-    struct { /* e.g. notbit $lit1, $src2, $dst */
-      UINT f_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_notbit1;
-    struct { /* e.g. notbit $src1, $lit2, $dst */
-      UINT f_src2;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char out_dst;
-    } fmt_notbit2;
-    struct { /* e.g. notbit $lit1, $lit2, $dst */
-      UINT f_src1;
-      UINT f_src2;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_notbit3;
-    struct { /* e.g. not $src1, $src2, $dst */
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char out_dst;
-    } fmt_not;
-    struct { /* e.g. not $lit1, $src2, $dst */
-      UINT f_src1;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_not1;
-    struct { /* e.g. not $src1, $lit2, $dst */
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char out_dst;
-    } fmt_not2;
-    struct { /* e.g. not $lit1, $lit2, $dst */
-      UINT f_src1;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_not3;
-    struct { /* e.g. shlo $src1, $src2, $dst */
-      SI * i_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_shlo;
-    struct { /* e.g. shlo $lit1, $src2, $dst */
-      UINT f_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_shlo1;
-    struct { /* e.g. shlo $src1, $lit2, $dst */
-      UINT f_src2;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char out_dst;
-    } fmt_shlo2;
-    struct { /* e.g. shlo $lit1, $lit2, $dst */
-      UINT f_src1;
-      UINT f_src2;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_shlo3;
-    struct { /* e.g. emul $src1, $src2, $dst */
-      UINT f_srcdst;
-      SI * i_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char in_src2;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_emul;
-    struct { /* e.g. emul $lit1, $src2, $dst */
-      UINT f_srcdst;
-      UINT f_src1;
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src2;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_emul1;
-    struct { /* e.g. emul $src1, $lit2, $dst */
-      UINT f_srcdst;
-      UINT f_src2;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_src1;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_emul2;
-    struct { /* e.g. emul $lit1, $lit2, $dst */
-      UINT f_srcdst;
-      UINT f_src1;
-      UINT f_src2;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_emul3;
-    struct { /* e.g. movl $src1, $dst */
-      UINT f_src1;
-      UINT f_srcdst;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_h_gr_add__VM_index_of_src1_1;
-      unsigned char in_src1;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_movl;
-    struct { /* e.g. movl $lit1, $dst */
-      UINT f_srcdst;
-      UINT f_src1;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_movl1;
-    struct { /* e.g. movt $src1, $dst */
-      UINT f_src1;
-      UINT f_srcdst;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_h_gr_add__VM_index_of_src1_1;
-      unsigned char in_h_gr_add__VM_index_of_src1_2;
-      unsigned char in_src1;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_movt;
-    struct { /* e.g. movt $lit1, $dst */
-      UINT f_srcdst;
-      UINT f_src1;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_movt1;
-    struct { /* e.g. movq $src1, $dst */
-      UINT f_src1;
-      UINT f_srcdst;
-      SI * i_src1;
-      SI * i_dst;
-      unsigned char in_h_gr_add__VM_index_of_src1_1;
-      unsigned char in_h_gr_add__VM_index_of_src1_2;
-      unsigned char in_h_gr_add__VM_index_of_src1_3;
-      unsigned char in_src1;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_movq;
-    struct { /* e.g. movq $lit1, $dst */
-      UINT f_srcdst;
-      UINT f_src1;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_movq1;
-    struct { /* e.g. modpc $src1, $src2, $dst */
-      SI * i_src2;
-      SI * i_dst;
-      unsigned char in_src2;
-      unsigned char out_dst;
-    } fmt_modpc;
-    struct { /* e.g. lda $offset, $dst */
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_lda_offset;
-    struct { /* e.g. lda $offset($abase), $dst */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_lda_indirect_offset;
-    struct { /* e.g. lda ($abase), $dst */
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_lda_indirect;
-    struct { /* e.g. lda ($abase)[$index*S$scale], $dst */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_lda_indirect_index;
-    struct { /* e.g. lda $optdisp, $dst */
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_lda_disp;
-    struct { /* e.g. lda $optdisp($abase), $dst */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_lda_indirect_disp;
-    struct { /* e.g. lda $optdisp[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_lda_index_disp;
-    struct { /* e.g. lda $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_lda_indirect_index_disp;
-    struct { /* e.g. ld $offset, $dst */
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ld_offset;
-    struct { /* e.g. ld $offset($abase), $dst */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ld_indirect_offset;
-    struct { /* e.g. ld ($abase), $dst */
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ld_indirect;
-    struct { /* e.g. ld ($abase)[$index*S$scale], $dst */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ld_indirect_index;
-    struct { /* e.g. ld $optdisp, $dst */
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ld_disp;
-    struct { /* e.g. ld $optdisp($abase), $dst */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ld_indirect_disp;
-    struct { /* e.g. ld $optdisp[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ld_index_disp;
-    struct { /* e.g. ld $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ld_indirect_index_disp;
-    struct { /* e.g. ldob $offset, $dst */
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldob_offset;
-    struct { /* e.g. ldob $offset($abase), $dst */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldob_indirect_offset;
-    struct { /* e.g. ldob ($abase), $dst */
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldob_indirect;
-    struct { /* e.g. ldob ($abase)[$index*S$scale], $dst */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldob_indirect_index;
-    struct { /* e.g. ldob $optdisp, $dst */
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldob_disp;
-    struct { /* e.g. ldob $optdisp($abase), $dst */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldob_indirect_disp;
-    struct { /* e.g. ldob $optdisp[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldob_index_disp;
-    struct { /* e.g. ldob $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldob_indirect_index_disp;
-    struct { /* e.g. ldos $offset, $dst */
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldos_offset;
-    struct { /* e.g. ldos $offset($abase), $dst */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldos_indirect_offset;
-    struct { /* e.g. ldos ($abase), $dst */
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldos_indirect;
-    struct { /* e.g. ldos ($abase)[$index*S$scale], $dst */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldos_indirect_index;
-    struct { /* e.g. ldos $optdisp, $dst */
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldos_disp;
-    struct { /* e.g. ldos $optdisp($abase), $dst */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldos_indirect_disp;
-    struct { /* e.g. ldos $optdisp[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldos_index_disp;
-    struct { /* e.g. ldos $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldos_indirect_index_disp;
-    struct { /* e.g. ldib $offset, $dst */
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldib_offset;
-    struct { /* e.g. ldib $offset($abase), $dst */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldib_indirect_offset;
-    struct { /* e.g. ldib ($abase), $dst */
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldib_indirect;
-    struct { /* e.g. ldib ($abase)[$index*S$scale], $dst */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldib_indirect_index;
-    struct { /* e.g. ldib $optdisp, $dst */
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldib_disp;
-    struct { /* e.g. ldib $optdisp($abase), $dst */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldib_indirect_disp;
-    struct { /* e.g. ldib $optdisp[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldib_index_disp;
-    struct { /* e.g. ldib $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldib_indirect_index_disp;
-    struct { /* e.g. ldis $offset, $dst */
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldis_offset;
-    struct { /* e.g. ldis $offset($abase), $dst */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldis_indirect_offset;
-    struct { /* e.g. ldis ($abase), $dst */
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldis_indirect;
-    struct { /* e.g. ldis ($abase)[$index*S$scale], $dst */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldis_indirect_index;
-    struct { /* e.g. ldis $optdisp, $dst */
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-    } fmt_ldis_disp;
-    struct { /* e.g. ldis $optdisp($abase), $dst */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-    } fmt_ldis_indirect_disp;
-    struct { /* e.g. ldis $optdisp[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldis_index_disp;
-    struct { /* e.g. ldis $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-    } fmt_ldis_indirect_index_disp;
-    struct { /* e.g. ldl $offset, $dst */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_offset;
-    struct { /* e.g. ldl $offset($abase), $dst */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_indirect_offset;
-    struct { /* e.g. ldl ($abase), $dst */
-      UINT f_srcdst;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_indirect;
-    struct { /* e.g. ldl ($abase)[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_indirect_index;
-    struct { /* e.g. ldl $optdisp, $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_disp;
-    struct { /* e.g. ldl $optdisp($abase), $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_indirect_disp;
-    struct { /* e.g. ldl $optdisp[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_index_disp;
-    struct { /* e.g. ldl $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-    } fmt_ldl_indirect_index_disp;
-    struct { /* e.g. ldt $offset, $dst */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_offset;
-    struct { /* e.g. ldt $offset($abase), $dst */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_indirect_offset;
-    struct { /* e.g. ldt ($abase), $dst */
-      UINT f_srcdst;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_indirect;
-    struct { /* e.g. ldt ($abase)[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_indirect_index;
-    struct { /* e.g. ldt $optdisp, $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_disp;
-    struct { /* e.g. ldt $optdisp($abase), $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_indirect_disp;
-    struct { /* e.g. ldt $optdisp[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_index_disp;
-    struct { /* e.g. ldt $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-    } fmt_ldt_indirect_index_disp;
-    struct { /* e.g. ldq $offset, $dst */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_offset;
-    struct { /* e.g. ldq $offset($abase), $dst */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_indirect_offset;
-    struct { /* e.g. ldq ($abase), $dst */
-      UINT f_srcdst;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_indirect;
-    struct { /* e.g. ldq ($abase)[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_indirect_index;
-    struct { /* e.g. ldq $optdisp, $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_dst;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_disp;
-    struct { /* e.g. ldq $optdisp($abase), $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_indirect_disp;
-    struct { /* e.g. ldq $optdisp[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_index_disp;
-    struct { /* e.g. ldq $optdisp($abase)[$index*S$scale], $dst */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_dst;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char out_dst;
-      unsigned char out_h_gr_add__VM_index_of_dst_1;
-      unsigned char out_h_gr_add__VM_index_of_dst_2;
-      unsigned char out_h_gr_add__VM_index_of_dst_3;
-    } fmt_ldq_indirect_index_disp;
-    struct { /* e.g. st $st_src, $offset */
-      UINT f_offset;
-      SI * i_st_src;
-      unsigned char in_st_src;
-    } fmt_st_offset;
-    struct { /* e.g. st $st_src, $offset($abase) */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_st_indirect_offset;
-    struct { /* e.g. st $st_src, ($abase) */
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_st_indirect;
-    struct { /* e.g. st $st_src, ($abase)[$index*S$scale] */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_st_indirect_index;
-    struct { /* e.g. st $st_src, $optdisp */
-      UINT f_optdisp;
-      SI * i_st_src;
-      unsigned char in_st_src;
-    } fmt_st_disp;
-    struct { /* e.g. st $st_src, $optdisp($abase) */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_st_indirect_disp;
-    struct { /* e.g. st $st_src, $optdisp[$index*S$scale */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_st_index_disp;
-    struct { /* e.g. st $st_src, $optdisp($abase)[$index*S$scale] */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_st_indirect_index_disp;
-    struct { /* e.g. stob $st_src, $offset */
-      UINT f_offset;
-      SI * i_st_src;
-      unsigned char in_st_src;
-    } fmt_stob_offset;
-    struct { /* e.g. stob $st_src, $offset($abase) */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_stob_indirect_offset;
-    struct { /* e.g. stob $st_src, ($abase) */
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_stob_indirect;
-    struct { /* e.g. stob $st_src, ($abase)[$index*S$scale] */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stob_indirect_index;
-    struct { /* e.g. stob $st_src, $optdisp */
-      UINT f_optdisp;
-      SI * i_st_src;
-      unsigned char in_st_src;
-    } fmt_stob_disp;
-    struct { /* e.g. stob $st_src, $optdisp($abase) */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_stob_indirect_disp;
-    struct { /* e.g. stob $st_src, $optdisp[$index*S$scale */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stob_index_disp;
-    struct { /* e.g. stob $st_src, $optdisp($abase)[$index*S$scale] */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stob_indirect_index_disp;
-    struct { /* e.g. stos $st_src, $offset */
-      UINT f_offset;
-      SI * i_st_src;
-      unsigned char in_st_src;
-    } fmt_stos_offset;
-    struct { /* e.g. stos $st_src, $offset($abase) */
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_stos_indirect_offset;
-    struct { /* e.g. stos $st_src, ($abase) */
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_stos_indirect;
-    struct { /* e.g. stos $st_src, ($abase)[$index*S$scale] */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stos_indirect_index;
-    struct { /* e.g. stos $st_src, $optdisp */
-      UINT f_optdisp;
-      SI * i_st_src;
-      unsigned char in_st_src;
-    } fmt_stos_disp;
-    struct { /* e.g. stos $st_src, $optdisp($abase) */
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_st_src;
-    } fmt_stos_indirect_disp;
-    struct { /* e.g. stos $st_src, $optdisp[$index*S$scale */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stos_index_disp;
-    struct { /* e.g. stos $st_src, $optdisp($abase)[$index*S$scale] */
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stos_indirect_index_disp;
-    struct { /* e.g. stl $st_src, $offset */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_st_src;
-    } fmt_stl_offset;
-    struct { /* e.g. stl $st_src, $offset($abase) */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_st_src;
-    } fmt_stl_indirect_offset;
-    struct { /* e.g. stl $st_src, ($abase) */
-      UINT f_srcdst;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_st_src;
-    } fmt_stl_indirect;
-    struct { /* e.g. stl $st_src, ($abase)[$index*S$scale] */
-      UINT f_srcdst;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stl_indirect_index;
-    struct { /* e.g. stl $st_src, $optdisp */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_st_src;
-    } fmt_stl_disp;
-    struct { /* e.g. stl $st_src, $optdisp($abase) */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_st_src;
-    } fmt_stl_indirect_disp;
-    struct { /* e.g. stl $st_src, $optdisp[$index*S$scale */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stl_index_disp;
-    struct { /* e.g. stl $st_src, $optdisp($abase)[$index*S$scale] */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stl_indirect_index_disp;
-    struct { /* e.g. stt $st_src, $offset */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_st_src;
-    } fmt_stt_offset;
-    struct { /* e.g. stt $st_src, $offset($abase) */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_st_src;
-    } fmt_stt_indirect_offset;
-    struct { /* e.g. stt $st_src, ($abase) */
-      UINT f_srcdst;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_st_src;
-    } fmt_stt_indirect;
-    struct { /* e.g. stt $st_src, ($abase)[$index*S$scale] */
-      UINT f_srcdst;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stt_indirect_index;
-    struct { /* e.g. stt $st_src, $optdisp */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_st_src;
-    } fmt_stt_disp;
-    struct { /* e.g. stt $st_src, $optdisp($abase) */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_st_src;
-    } fmt_stt_indirect_disp;
-    struct { /* e.g. stt $st_src, $optdisp[$index*S$scale */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stt_index_disp;
-    struct { /* e.g. stt $st_src, $optdisp($abase)[$index*S$scale] */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stt_indirect_index_disp;
-    struct { /* e.g. stq $st_src, $offset */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_st_src;
-    } fmt_stq_offset;
-    struct { /* e.g. stq $st_src, $offset($abase) */
-      UINT f_srcdst;
-      UINT f_offset;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_st_src;
-    } fmt_stq_indirect_offset;
-    struct { /* e.g. stq $st_src, ($abase) */
-      UINT f_srcdst;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_st_src;
-    } fmt_stq_indirect;
-    struct { /* e.g. stq $st_src, ($abase)[$index*S$scale] */
-      UINT f_srcdst;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stq_indirect_index;
-    struct { /* e.g. stq $st_src, $optdisp */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_st_src;
-    } fmt_stq_disp;
-    struct { /* e.g. stq $st_src, $optdisp($abase) */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      SI * i_abase;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_st_src;
-    } fmt_stq_indirect_disp;
-    struct { /* e.g. stq $st_src, $optdisp[$index*S$scale */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stq_index_disp;
-    struct { /* e.g. stq $st_src, $optdisp($abase)[$index*S$scale] */
-      UINT f_srcdst;
-      UINT f_optdisp;
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      SI * i_st_src;
-      unsigned char in_abase;
-      unsigned char in_h_gr_add__VM_index_of_st_src_1;
-      unsigned char in_h_gr_add__VM_index_of_st_src_2;
-      unsigned char in_h_gr_add__VM_index_of_st_src_3;
-      unsigned char in_index;
-      unsigned char in_st_src;
-    } fmt_stq_indirect_index_disp;
-    struct { /* e.g. cmpi $src1, $src2 */
-      SI * i_src1;
-      SI * i_src2;
-      unsigned char in_src1;
-      unsigned char in_src2;
-    } fmt_cmpi;
-    struct { /* e.g. cmpi $lit1, $src2 */
-      UINT f_src1;
-      SI * i_src2;
-      unsigned char in_src2;
-    } fmt_cmpi1;
-    struct { /* e.g. cmpi $src1, $lit2 */
-      UINT f_src2;
-      SI * i_src1;
-      unsigned char in_src1;
-    } fmt_cmpi2;
-    struct { /* e.g. cmpi $lit1, $lit2 */
-      UINT f_src1;
-      UINT f_src2;
-    } fmt_cmpi3;
-    struct { /* e.g. cmpo $src1, $src2 */
-      SI * i_src1;
-      SI * i_src2;
-      unsigned char in_src1;
-      unsigned char in_src2;
-    } fmt_cmpo;
-    struct { /* e.g. cmpo $lit1, $src2 */
-      UINT f_src1;
-      SI * i_src2;
-      unsigned char in_src2;
-    } fmt_cmpo1;
-    struct { /* e.g. cmpo $src1, $lit2 */
-      UINT f_src2;
-      SI * i_src1;
-      unsigned char in_src1;
-    } fmt_cmpo2;
-    struct { /* e.g. cmpo $lit1, $lit2 */
-      UINT f_src1;
-      UINT f_src2;
-    } fmt_cmpo3;
-    struct { /* e.g. testno $br_src1 */
-      SI * i_br_src1;
-      unsigned char out_br_src1;
-    } fmt_testno_reg;
-    struct { /* e.g. flushreg */
-      int empty;
-    } fmt_flushreg;
-  /* cti insns, kept separately so addr_cache is in fixed place */
-  struct {
-    union {
-    struct { /* e.g. cmpobe $br_src1, $br_src2, $br_disp */
-      IADDR i_br_disp;
-      SI * i_br_src1;
-      SI * i_br_src2;
-      unsigned char in_br_src1;
-      unsigned char in_br_src2;
-    } fmt_cmpobe_reg;
-    struct { /* e.g. cmpobe $br_lit1, $br_src2, $br_disp */
-      UINT f_br_src1;
-      IADDR i_br_disp;
-      SI * i_br_src2;
-      unsigned char in_br_src2;
-    } fmt_cmpobe_lit;
-    struct { /* e.g. cmpobl $br_src1, $br_src2, $br_disp */
-      IADDR i_br_disp;
-      SI * i_br_src1;
-      SI * i_br_src2;
-      unsigned char in_br_src1;
-      unsigned char in_br_src2;
-    } fmt_cmpobl_reg;
-    struct { /* e.g. cmpobl $br_lit1, $br_src2, $br_disp */
-      UINT f_br_src1;
-      IADDR i_br_disp;
-      SI * i_br_src2;
-      unsigned char in_br_src2;
-    } fmt_cmpobl_lit;
-    struct { /* e.g. bbc $br_src1, $br_src2, $br_disp */
-      IADDR i_br_disp;
-      SI * i_br_src1;
-      SI * i_br_src2;
-      unsigned char in_br_src1;
-      unsigned char in_br_src2;
-    } fmt_bbc_reg;
-    struct { /* e.g. bbc $br_lit1, $br_src2, $br_disp */
-      UINT f_br_src1;
-      IADDR i_br_disp;
-      SI * i_br_src2;
-      unsigned char in_br_src2;
-    } fmt_bbc_lit;
-    struct { /* e.g. bno $ctrl_disp */
-      IADDR i_ctrl_disp;
-    } fmt_bno;
-    struct { /* e.g. b $ctrl_disp */
-      IADDR i_ctrl_disp;
-    } fmt_b;
-    struct { /* e.g. bx $offset($abase) */
-      UINT f_offset;
-      SI * i_abase;
-      unsigned char in_abase;
-    } fmt_bx_indirect_offset;
-    struct { /* e.g. bx ($abase) */
-      SI * i_abase;
-      unsigned char in_abase;
-    } fmt_bx_indirect;
-    struct { /* e.g. bx ($abase)[$index*S$scale] */
-      UINT f_scale;
-      SI * i_abase;
-      SI * i_index;
-      unsigned char in_abase;
-      unsigned char in_index;
-    } fmt_bx_indirect_index;
-    struct { /* e.g. bx $optdisp */
-      UINT f_optdisp;
-    } fmt_bx_disp;
-    struct { /* e.g. bx $optdisp($abase) */
-      UINT f_optdisp;
-      SI * i_abase;
-      unsigned char in_abase;
-    } fmt_bx_indirect_disp;
-    struct { /* e.g. callx $optdisp */
-      UINT f_optdisp;
-      unsigned char in_h_gr_0;
-      unsigned char in_h_gr_1;
-      unsigned char in_h_gr_10;
-      unsigned char in_h_gr_11;
-      unsigned char in_h_gr_12;
-      unsigned char in_h_gr_13;
-      unsigned char in_h_gr_14;
-      unsigned char in_h_gr_15;
-      unsigned char in_h_gr_2;
-      unsigned char in_h_gr_3;
-      unsigned char in_h_gr_31;
-      unsigned char in_h_gr_4;
-      unsigned char in_h_gr_5;
-      unsigned char in_h_gr_6;
-      unsigned char in_h_gr_7;
-      unsigned char in_h_gr_8;
-      unsigned char in_h_gr_9;
-      unsigned char out_h_gr_0;
-      unsigned char out_h_gr_1;
-      unsigned char out_h_gr_10;
-      unsigned char out_h_gr_11;
-      unsigned char out_h_gr_12;
-      unsigned char out_h_gr_13;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-      unsigned char out_h_gr_2;
-      unsigned char out_h_gr_3;
-      unsigned char out_h_gr_31;
-      unsigned char out_h_gr_4;
-      unsigned char out_h_gr_5;
-      unsigned char out_h_gr_6;
-      unsigned char out_h_gr_7;
-      unsigned char out_h_gr_8;
-      unsigned char out_h_gr_9;
-    } fmt_callx_disp;
-    struct { /* e.g. callx ($abase) */
-      SI * i_abase;
-      unsigned char in_abase;
-      unsigned char in_h_gr_0;
-      unsigned char in_h_gr_1;
-      unsigned char in_h_gr_10;
-      unsigned char in_h_gr_11;
-      unsigned char in_h_gr_12;
-      unsigned char in_h_gr_13;
-      unsigned char in_h_gr_14;
-      unsigned char in_h_gr_15;
-      unsigned char in_h_gr_2;
-      unsigned char in_h_gr_3;
-      unsigned char in_h_gr_31;
-      unsigned char in_h_gr_4;
-      unsigned char in_h_gr_5;
-      unsigned char in_h_gr_6;
-      unsigned char in_h_gr_7;
-      unsigned char in_h_gr_8;
-      unsigned char in_h_gr_9;
-      unsigned char out_h_gr_0;
-      unsigned char out_h_gr_1;
-      unsigned char out_h_gr_10;
-      unsigned char out_h_gr_11;
-      unsigned char out_h_gr_12;
-      unsigned char out_h_gr_13;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-      unsigned char out_h_gr_2;
-      unsigned char out_h_gr_3;
-      unsigned char out_h_gr_31;
-      unsigned char out_h_gr_4;
-      unsigned char out_h_gr_5;
-      unsigned char out_h_gr_6;
-      unsigned char out_h_gr_7;
-      unsigned char out_h_gr_8;
-      unsigned char out_h_gr_9;
-    } fmt_callx_indirect;
-    struct { /* e.g. callx $offset($abase) */
-      UINT f_offset;
-      SI * i_abase;
-      unsigned char in_abase;
-      unsigned char in_h_gr_0;
-      unsigned char in_h_gr_1;
-      unsigned char in_h_gr_10;
-      unsigned char in_h_gr_11;
-      unsigned char in_h_gr_12;
-      unsigned char in_h_gr_13;
-      unsigned char in_h_gr_14;
-      unsigned char in_h_gr_15;
-      unsigned char in_h_gr_2;
-      unsigned char in_h_gr_3;
-      unsigned char in_h_gr_31;
-      unsigned char in_h_gr_4;
-      unsigned char in_h_gr_5;
-      unsigned char in_h_gr_6;
-      unsigned char in_h_gr_7;
-      unsigned char in_h_gr_8;
-      unsigned char in_h_gr_9;
-      unsigned char out_h_gr_0;
-      unsigned char out_h_gr_1;
-      unsigned char out_h_gr_10;
-      unsigned char out_h_gr_11;
-      unsigned char out_h_gr_12;
-      unsigned char out_h_gr_13;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-      unsigned char out_h_gr_2;
-      unsigned char out_h_gr_3;
-      unsigned char out_h_gr_31;
-      unsigned char out_h_gr_4;
-      unsigned char out_h_gr_5;
-      unsigned char out_h_gr_6;
-      unsigned char out_h_gr_7;
-      unsigned char out_h_gr_8;
-      unsigned char out_h_gr_9;
-    } fmt_callx_indirect_offset;
-    struct { /* e.g. ret */
-      int empty;
-      unsigned char in_h_gr_0;
-      unsigned char in_h_gr_2;
-      unsigned char in_h_gr_31;
-      unsigned char out_h_gr_0;
-      unsigned char out_h_gr_1;
-      unsigned char out_h_gr_10;
-      unsigned char out_h_gr_11;
-      unsigned char out_h_gr_12;
-      unsigned char out_h_gr_13;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-      unsigned char out_h_gr_2;
-      unsigned char out_h_gr_3;
-      unsigned char out_h_gr_31;
-      unsigned char out_h_gr_4;
-      unsigned char out_h_gr_5;
-      unsigned char out_h_gr_6;
-      unsigned char out_h_gr_7;
-      unsigned char out_h_gr_8;
-      unsigned char out_h_gr_9;
-    } fmt_ret;
-    struct { /* e.g. calls $src1 */
-      SI * i_src1;
-      unsigned char in_src1;
-    } fmt_calls;
-    struct { /* e.g. fmark */
-      int empty;
-    } fmt_fmark;
-    } fields;
-#if WITH_SCACHE_PBB
-    SEM_PC addr_cache;
-#endif
-  } cti;
+  struct { /* no operands */
+    int empty;
+  } fmt_empty;
+  struct { /*  */
+    IADDR i_ctrl_disp;
+  } sfmt_bno;
+  struct { /*  */
+    SI* i_br_src1;
+    unsigned char out_br_src1;
+  } sfmt_testno_reg;
+  struct { /*  */
+    IADDR i_br_disp;
+    SI* i_br_src2;
+    UINT f_br_src1;
+    unsigned char in_br_src2;
+  } sfmt_cmpobe_lit;
+  struct { /*  */
+    IADDR i_br_disp;
+    SI* i_br_src1;
+    SI* i_br_src2;
+    unsigned char in_br_src1;
+    unsigned char in_br_src2;
+  } sfmt_cmpobe_reg;
+  struct { /*  */
+    SI* i_dst;
+    UINT f_src1;
+    UINT f_src2;
+    UINT f_srcdst;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+  } sfmt_emul3;
+  struct { /*  */
+    SI* i_dst;
+    SI* i_src1;
+    UINT f_src2;
+    UINT f_srcdst;
+    unsigned char in_src1;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+  } sfmt_emul2;
+  struct { /*  */
+    SI* i_dst;
+    SI* i_src2;
+    UINT f_src1;
+    UINT f_srcdst;
+    unsigned char in_src2;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+  } sfmt_emul1;
+  struct { /*  */
+    SI* i_dst;
+    SI* i_src1;
+    SI* i_src2;
+    UINT f_srcdst;
+    unsigned char in_src1;
+    unsigned char in_src2;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+  } sfmt_emul;
+  struct { /*  */
+    SI* i_abase;
+    SI* i_st_src;
+    UINT f_offset;
+    UINT f_srcdst;
+    unsigned char in_abase;
+    unsigned char in_h_gr_add__VM_index_of_st_src_1;
+    unsigned char in_h_gr_add__VM_index_of_st_src_2;
+    unsigned char in_h_gr_add__VM_index_of_st_src_3;
+    unsigned char in_st_src;
+  } sfmt_stq_indirect_offset;
+  struct { /*  */
+    SI* i_abase;
+    SI* i_dst;
+    UINT f_offset;
+    UINT f_srcdst;
+    unsigned char in_abase;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+    unsigned char out_h_gr_add__VM_index_of_dst_2;
+    unsigned char out_h_gr_add__VM_index_of_dst_3;
+  } sfmt_ldq_indirect_offset;
+  struct { /*  */
+    SI* i_abase;
+    SI* i_index;
+    SI* i_st_src;
+    UINT f_optdisp;
+    UINT f_scale;
+    UINT f_srcdst;
+    unsigned char in_abase;
+    unsigned char in_h_gr_add__VM_index_of_st_src_1;
+    unsigned char in_h_gr_add__VM_index_of_st_src_2;
+    unsigned char in_h_gr_add__VM_index_of_st_src_3;
+    unsigned char in_index;
+    unsigned char in_st_src;
+  } sfmt_stq_indirect_index_disp;
+  struct { /*  */
+    SI* i_abase;
+    SI* i_dst;
+    SI* i_index;
+    UINT f_optdisp;
+    UINT f_scale;
+    UINT f_srcdst;
+    unsigned char in_abase;
+    unsigned char in_index;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+    unsigned char out_h_gr_add__VM_index_of_dst_2;
+    unsigned char out_h_gr_add__VM_index_of_dst_3;
+  } sfmt_ldq_indirect_index_disp;
+  struct { /*  */
+    SI* i_dst;
+    SI* i_src1;
+    UINT f_src1;
+    UINT f_srcdst;
+    unsigned char in_h_gr_add__VM_index_of_src1_1;
+    unsigned char in_h_gr_add__VM_index_of_src1_2;
+    unsigned char in_h_gr_add__VM_index_of_src1_3;
+    unsigned char in_src1;
+    unsigned char out_dst;
+    unsigned char out_h_gr_add__VM_index_of_dst_1;
+    unsigned char out_h_gr_add__VM_index_of_dst_2;
+    unsigned char out_h_gr_add__VM_index_of_dst_3;
+  } sfmt_movq;
+  struct { /*  */
+    UINT f_optdisp;
+    unsigned char in_h_gr_0;
+    unsigned char in_h_gr_1;
+    unsigned char in_h_gr_10;
+    unsigned char in_h_gr_11;
+    unsigned char in_h_gr_12;
+    unsigned char in_h_gr_13;
+    unsigned char in_h_gr_14;
+    unsigned char in_h_gr_15;
+    unsigned char in_h_gr_2;
+    unsigned char in_h_gr_3;
+    unsigned char in_h_gr_31;
+    unsigned char in_h_gr_4;
+    unsigned char in_h_gr_5;
+    unsigned char in_h_gr_6;
+    unsigned char in_h_gr_7;
+    unsigned char in_h_gr_8;
+    unsigned char in_h_gr_9;
+    unsigned char out_h_gr_0;
+    unsigned char out_h_gr_1;
+    unsigned char out_h_gr_10;
+    unsigned char out_h_gr_11;
+    unsigned char out_h_gr_12;
+    unsigned char out_h_gr_13;
+    unsigned char out_h_gr_14;
+    unsigned char out_h_gr_15;
+    unsigned char out_h_gr_2;
+    unsigned char out_h_gr_3;
+    unsigned char out_h_gr_31;
+    unsigned char out_h_gr_4;
+    unsigned char out_h_gr_5;
+    unsigned char out_h_gr_6;
+    unsigned char out_h_gr_7;
+    unsigned char out_h_gr_8;
+    unsigned char out_h_gr_9;
+  } sfmt_callx_disp;
+  struct { /*  */
+    SI* i_abase;
+    UINT f_offset;
+    unsigned char in_abase;
+    unsigned char in_h_gr_0;
+    unsigned char in_h_gr_1;
+    unsigned char in_h_gr_10;
+    unsigned char in_h_gr_11;
+    unsigned char in_h_gr_12;
+    unsigned char in_h_gr_13;
+    unsigned char in_h_gr_14;
+    unsigned char in_h_gr_15;
+    unsigned char in_h_gr_2;
+    unsigned char in_h_gr_3;
+    unsigned char in_h_gr_31;
+    unsigned char in_h_gr_4;
+    unsigned char in_h_gr_5;
+    unsigned char in_h_gr_6;
+    unsigned char in_h_gr_7;
+    unsigned char in_h_gr_8;
+    unsigned char in_h_gr_9;
+    unsigned char out_h_gr_0;
+    unsigned char out_h_gr_1;
+    unsigned char out_h_gr_10;
+    unsigned char out_h_gr_11;
+    unsigned char out_h_gr_12;
+    unsigned char out_h_gr_13;
+    unsigned char out_h_gr_14;
+    unsigned char out_h_gr_15;
+    unsigned char out_h_gr_2;
+    unsigned char out_h_gr_3;
+    unsigned char out_h_gr_31;
+    unsigned char out_h_gr_4;
+    unsigned char out_h_gr_5;
+    unsigned char out_h_gr_6;
+    unsigned char out_h_gr_7;
+    unsigned char out_h_gr_8;
+    unsigned char out_h_gr_9;
+  } sfmt_callx_indirect_offset;
 #if WITH_SCACHE_PBB
   /* Writeback handler.  */
   struct {
@@ -1572,6 +295,7 @@ union sem_fields {
     int insn_count;
     /* Next pbb to execute.  */
     SCACHE *next;
+    SCACHE *branch_target;
   } chain;
 #endif
 };
@@ -1583,6 +307,9 @@ struct argbuf {
   const IDESC *idesc;
   char trace_p;
   char profile_p;
+  /* ??? Temporary hack for skip insns.  */
+  char skip_count;
+  char unused;
   /* cpu specific data follows */
   union sem semantic;
   int written;
@@ -1603,13 +330,11 @@ struct scache {
    These define and assign the local vars that contain the insn's fields.  */
 
 #define EXTRACT_IFMT_EMPTY_VARS \
-  /* Instruction fields.  */ \
   unsigned int length;
 #define EXTRACT_IFMT_EMPTY_CODE \
   length = 0; \
 
 #define EXTRACT_IFMT_MULO_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_src2; \
@@ -1622,18 +347,17 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MULO_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \
-  f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \
-  f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \
-  f_zero = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
+  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
+  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
+  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_MULO1_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_src2; \
@@ -1646,18 +370,17 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MULO1_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \
-  f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \
-  f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \
-  f_zero = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
+  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
+  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
+  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_MULO2_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_src2; \
@@ -1670,18 +393,17 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MULO2_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \
-  f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \
-  f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \
-  f_zero = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
+  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
+  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
+  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_MULO3_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_src2; \
@@ -1694,18 +416,17 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MULO3_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \
-  f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \
-  f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \
-  f_zero = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
+  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
+  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
+  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_LDA_OFFSET_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_abase; \
@@ -1715,15 +436,14 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_LDA_OFFSET_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_abase = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_modea = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_zeroa = EXTRACT_UINT (insn, 32, 19, 1); \
-  f_offset = EXTRACT_UINT (insn, 32, 20, 12); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
+  f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \
 
 #define EXTRACT_IFMT_LDA_INDIRECT_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_abase; \
@@ -1734,16 +454,15 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_LDA_INDIRECT_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_abase = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \
-  f_scale = EXTRACT_UINT (insn, 32, 22, 3); \
-  f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_index = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
+  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
+  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_LDA_DISP_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_optdisp; \
   UINT f_srcdst; \
@@ -1758,17 +477,16 @@ struct scache {
 #define EXTRACT_IFMT_LDA_DISP_CODE \
   length = 8; \
   word_1 = GETIMEMUSI (current_cpu, pc + 4); \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_optdisp = (0|(EXTRACT_UINT (word_1, 32, 0, 32) << 0)); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_abase = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \
-  f_scale = EXTRACT_UINT (insn, 32, 22, 3); \
-  f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_index = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
+  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
+  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_ST_OFFSET_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_abase; \
@@ -1778,15 +496,14 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_ST_OFFSET_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_abase = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_modea = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_zeroa = EXTRACT_UINT (insn, 32, 19, 1); \
-  f_offset = EXTRACT_UINT (insn, 32, 20, 12); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
+  f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \
 
 #define EXTRACT_IFMT_ST_INDIRECT_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_srcdst; \
   UINT f_abase; \
@@ -1797,16 +514,15 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_ST_INDIRECT_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_abase = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \
-  f_scale = EXTRACT_UINT (insn, 32, 22, 3); \
-  f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_index = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
+  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
+  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_ST_DISP_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_optdisp; \
   UINT f_srcdst; \
@@ -1821,17 +537,16 @@ struct scache {
 #define EXTRACT_IFMT_ST_DISP_CODE \
   length = 8; \
   word_1 = GETIMEMUSI (current_cpu, pc + 4); \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_optdisp = (0|(EXTRACT_UINT (word_1, 32, 0, 32) << 0)); \
-  f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_abase = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \
-  f_scale = EXTRACT_UINT (insn, 32, 22, 3); \
-  f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \
-  f_index = EXTRACT_UINT (insn, 32, 27, 5); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \
+  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
+  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
+  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
+  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
 
 #define EXTRACT_IFMT_CMPOBE_REG_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_br_src1; \
   UINT f_br_src2; \
@@ -1841,15 +556,14 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_CMPOBE_REG_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_br_src1 = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_br_src2 = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_br_m1 = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_br_disp = ((((EXTRACT_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
-  f_br_zero = EXTRACT_UINT (insn, 32, 30, 2); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
+  f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \
 
 #define EXTRACT_IFMT_CMPOBE_LIT_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   UINT f_br_src1; \
   UINT f_br_src2; \
@@ -1859,24 +573,23 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_CMPOBE_LIT_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_br_src1 = EXTRACT_UINT (insn, 32, 8, 5); \
-  f_br_src2 = EXTRACT_UINT (insn, 32, 13, 5); \
-  f_br_m1 = EXTRACT_UINT (insn, 32, 18, 1); \
-  f_br_disp = ((((EXTRACT_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
-  f_br_zero = EXTRACT_UINT (insn, 32, 30, 2); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
+  f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
+  f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
+  f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
+  f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \
 
 #define EXTRACT_IFMT_BNO_VARS \
-  /* Instruction fields.  */ \
   UINT f_opcode; \
   SI f_ctrl_disp; \
   UINT f_ctrl_zero; \
   unsigned int length;
 #define EXTRACT_IFMT_BNO_CODE \
   length = 4; \
-  f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \
-  f_ctrl_disp = ((((EXTRACT_INT (insn, 32, 8, 22)) << (2))) + (pc)); \
-  f_ctrl_zero = EXTRACT_UINT (insn, 32, 30, 2); \
+  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
+  f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); \
+  f_ctrl_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \
 
 /* Collection of various things for the trace handler to use.  */
 
diff --git a/sim/i960/cpuall.h b/sim/i960/cpuall.h
index a22e559..772cd9f 100644
--- a/sim/i960/cpuall.h
+++ b/sim/i960/cpuall.h
@@ -45,6 +45,9 @@ struct argbuf {
   const IDESC *idesc;
   char trace_p;
   char profile_p;
+  /* ??? Temporary hack for skip insns.  */
+  char skip_count;
+  char unused;
   /* cpu specific data follows */
 };
 #endif
diff --git a/sim/i960/decode.c b/sim/i960/decode.c
index a3ac523..a0f1526 100644
--- a/sim/i960/decode.c
+++ b/sim/i960/decode.c
@@ -28,29 +28,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #include "sim-main.h"
 #include "sim-assert.h"
 
-/* FIXME: Need to review choices for the following.  */
-
-#if WITH_SEM_SWITCH_FULL
-#define FULL(fn)
-#else
-#define FULL(fn) CONCAT3 (i960base,_sem_,fn) ,
-#endif
-
-#if WITH_FAST
-#if WITH_SEM_SWITCH_FAST
-#define FAST(fn)
-#else
-#define FAST(fn) CONCAT3 (i960base,_semf_,fn) , /* f for fast */
-#endif
-#else
-#define FAST(fn)
-#endif
-
-/* The INSN_ prefix is not here and is instead part of the `insn' argument
-   to avoid collisions with header files (e.g. `AND' in ansidecl.h).  */
-#define IDX(insn) CONCAT2 (I960BASE_,insn)
-#define TYPE(insn) CONCAT2 (I960_,insn)
-
 /* The instruction descriptor array.
    This is computed at runtime.  Space for it is not malloc'd to save a
    teensy bit of cpu in the decoder.  Moving it to malloc space is trivial
@@ -63,316 +40,309 @@ static IDESC i960base_insn_data[I960BASE_INSN_MAX];
 
 static const struct insn_sem i960base_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) },
-  { VIRTUAL_INSN_X_AFTER, IDX (INSN_X_AFTER), FULL (x_after) FAST (x_after) },
-  { VIRTUAL_INSN_X_BEFORE, IDX (INSN_X_BEFORE), FULL (x_before) FAST (x_before) },
-  { VIRTUAL_INSN_X_CTI_CHAIN, IDX (INSN_X_CTI_CHAIN), FULL (x_cti_chain) FAST (x_cti_chain) },
-  { VIRTUAL_INSN_X_CHAIN, IDX (INSN_X_CHAIN), FULL (x_chain) FAST (x_chain) },
-  { VIRTUAL_INSN_X_BEGIN, IDX (INSN_X_BEGIN), FULL (x_begin) FAST (x_begin) },
-  { TYPE (INSN_MULO), IDX (INSN_MULO), FULL (mulo) FAST (mulo) },
-  { TYPE (INSN_MULO1), IDX (INSN_MULO1), FULL (mulo1) FAST (mulo1) },
-  { TYPE (INSN_MULO2), IDX (INSN_MULO2), FULL (mulo2) FAST (mulo2) },
-  { TYPE (INSN_MULO3), IDX (INSN_MULO3), FULL (mulo3) FAST (mulo3) },
-  { TYPE (INSN_REMO), IDX (INSN_REMO), FULL (remo) FAST (remo) },
-  { TYPE (INSN_REMO1), IDX (INSN_REMO1), FULL (remo1) FAST (remo1) },
-  { TYPE (INSN_REMO2), IDX (INSN_REMO2), FULL (remo2) FAST (remo2) },
-  { TYPE (INSN_REMO3), IDX (INSN_REMO3), FULL (remo3) FAST (remo3) },
-  { TYPE (INSN_DIVO), IDX (INSN_DIVO), FULL (divo) FAST (divo) },
-  { TYPE (INSN_DIVO1), IDX (INSN_DIVO1), FULL (divo1) FAST (divo1) },
-  { TYPE (INSN_DIVO2), IDX (INSN_DIVO2), FULL (divo2) FAST (divo2) },
-  { TYPE (INSN_DIVO3), IDX (INSN_DIVO3), FULL (divo3) FAST (divo3) },
-  { TYPE (INSN_REMI), IDX (INSN_REMI), FULL (remi) FAST (remi) },
-  { TYPE (INSN_REMI1), IDX (INSN_REMI1), FULL (remi1) FAST (remi1) },
-  { TYPE (INSN_REMI2), IDX (INSN_REMI2), FULL (remi2) FAST (remi2) },
-  { TYPE (INSN_REMI3), IDX (INSN_REMI3), FULL (remi3) FAST (remi3) },
-  { TYPE (INSN_DIVI), IDX (INSN_DIVI), FULL (divi) FAST (divi) },
-  { TYPE (INSN_DIVI1), IDX (INSN_DIVI1), FULL (divi1) FAST (divi1) },
-  { TYPE (INSN_DIVI2), IDX (INSN_DIVI2), FULL (divi2) FAST (divi2) },
-  { TYPE (INSN_DIVI3), IDX (INSN_DIVI3), FULL (divi3) FAST (divi3) },
-  { TYPE (INSN_ADDO), IDX (INSN_ADDO), FULL (addo) FAST (addo) },
-  { TYPE (INSN_ADDO1), IDX (INSN_ADDO1), FULL (addo1) FAST (addo1) },
-  { TYPE (INSN_ADDO2), IDX (INSN_ADDO2), FULL (addo2) FAST (addo2) },
-  { TYPE (INSN_ADDO3), IDX (INSN_ADDO3), FULL (addo3) FAST (addo3) },
-  { TYPE (INSN_SUBO), IDX (INSN_SUBO), FULL (subo) FAST (subo) },
-  { TYPE (INSN_SUBO1), IDX (INSN_SUBO1), FULL (subo1) FAST (subo1) },
-  { TYPE (INSN_SUBO2), IDX (INSN_SUBO2), FULL (subo2) FAST (subo2) },
-  { TYPE (INSN_SUBO3), IDX (INSN_SUBO3), FULL (subo3) FAST (subo3) },
-  { TYPE (INSN_NOTBIT), IDX (INSN_NOTBIT), FULL (notbit) FAST (notbit) },
-  { TYPE (INSN_NOTBIT1), IDX (INSN_NOTBIT1), FULL (notbit1) FAST (notbit1) },
-  { TYPE (INSN_NOTBIT2), IDX (INSN_NOTBIT2), FULL (notbit2) FAST (notbit2) },
-  { TYPE (INSN_NOTBIT3), IDX (INSN_NOTBIT3), FULL (notbit3) FAST (notbit3) },
-  { TYPE (INSN_AND), IDX (INSN_AND), FULL (and) FAST (and) },
-  { TYPE (INSN_AND1), IDX (INSN_AND1), FULL (and1) FAST (and1) },
-  { TYPE (INSN_AND2), IDX (INSN_AND2), FULL (and2) FAST (and2) },
-  { TYPE (INSN_AND3), IDX (INSN_AND3), FULL (and3) FAST (and3) },
-  { TYPE (INSN_ANDNOT), IDX (INSN_ANDNOT), FULL (andnot) FAST (andnot) },
-  { TYPE (INSN_ANDNOT1), IDX (INSN_ANDNOT1), FULL (andnot1) FAST (andnot1) },
-  { TYPE (INSN_ANDNOT2), IDX (INSN_ANDNOT2), FULL (andnot2) FAST (andnot2) },
-  { TYPE (INSN_ANDNOT3), IDX (INSN_ANDNOT3), FULL (andnot3) FAST (andnot3) },
-  { TYPE (INSN_SETBIT), IDX (INSN_SETBIT), FULL (setbit) FAST (setbit) },
-  { TYPE (INSN_SETBIT1), IDX (INSN_SETBIT1), FULL (setbit1) FAST (setbit1) },
-  { TYPE (INSN_SETBIT2), IDX (INSN_SETBIT2), FULL (setbit2) FAST (setbit2) },
-  { TYPE (INSN_SETBIT3), IDX (INSN_SETBIT3), FULL (setbit3) FAST (setbit3) },
-  { TYPE (INSN_NOTAND), IDX (INSN_NOTAND), FULL (notand) FAST (notand) },
-  { TYPE (INSN_NOTAND1), IDX (INSN_NOTAND1), FULL (notand1) FAST (notand1) },
-  { TYPE (INSN_NOTAND2), IDX (INSN_NOTAND2), FULL (notand2) FAST (notand2) },
-  { TYPE (INSN_NOTAND3), IDX (INSN_NOTAND3), FULL (notand3) FAST (notand3) },
-  { TYPE (INSN_XOR), IDX (INSN_XOR), FULL (xor) FAST (xor) },
-  { TYPE (INSN_XOR1), IDX (INSN_XOR1), FULL (xor1) FAST (xor1) },
-  { TYPE (INSN_XOR2), IDX (INSN_XOR2), FULL (xor2) FAST (xor2) },
-  { TYPE (INSN_XOR3), IDX (INSN_XOR3), FULL (xor3) FAST (xor3) },
-  { TYPE (INSN_OR), IDX (INSN_OR), FULL (or) FAST (or) },
-  { TYPE (INSN_OR1), IDX (INSN_OR1), FULL (or1) FAST (or1) },
-  { TYPE (INSN_OR2), IDX (INSN_OR2), FULL (or2) FAST (or2) },
-  { TYPE (INSN_OR3), IDX (INSN_OR3), FULL (or3) FAST (or3) },
-  { TYPE (INSN_NOR), IDX (INSN_NOR), FULL (nor) FAST (nor) },
-  { TYPE (INSN_NOR1), IDX (INSN_NOR1), FULL (nor1) FAST (nor1) },
-  { TYPE (INSN_NOR2), IDX (INSN_NOR2), FULL (nor2) FAST (nor2) },
-  { TYPE (INSN_NOR3), IDX (INSN_NOR3), FULL (nor3) FAST (nor3) },
-  { TYPE (INSN_XNOR), IDX (INSN_XNOR), FULL (xnor) FAST (xnor) },
-  { TYPE (INSN_XNOR1), IDX (INSN_XNOR1), FULL (xnor1) FAST (xnor1) },
-  { TYPE (INSN_XNOR2), IDX (INSN_XNOR2), FULL (xnor2) FAST (xnor2) },
-  { TYPE (INSN_XNOR3), IDX (INSN_XNOR3), FULL (xnor3) FAST (xnor3) },
-  { TYPE (INSN_NOT), IDX (INSN_NOT), FULL (not) FAST (not) },
-  { TYPE (INSN_NOT1), IDX (INSN_NOT1), FULL (not1) FAST (not1) },
-  { TYPE (INSN_NOT2), IDX (INSN_NOT2), FULL (not2) FAST (not2) },
-  { TYPE (INSN_NOT3), IDX (INSN_NOT3), FULL (not3) FAST (not3) },
-  { TYPE (INSN_ORNOT), IDX (INSN_ORNOT), FULL (ornot) FAST (ornot) },
-  { TYPE (INSN_ORNOT1), IDX (INSN_ORNOT1), FULL (ornot1) FAST (ornot1) },
-  { TYPE (INSN_ORNOT2), IDX (INSN_ORNOT2), FULL (ornot2) FAST (ornot2) },
-  { TYPE (INSN_ORNOT3), IDX (INSN_ORNOT3), FULL (ornot3) FAST (ornot3) },
-  { TYPE (INSN_CLRBIT), IDX (INSN_CLRBIT), FULL (clrbit) FAST (clrbit) },
-  { TYPE (INSN_CLRBIT1), IDX (INSN_CLRBIT1), FULL (clrbit1) FAST (clrbit1) },
-  { TYPE (INSN_CLRBIT2), IDX (INSN_CLRBIT2), FULL (clrbit2) FAST (clrbit2) },
-  { TYPE (INSN_CLRBIT3), IDX (INSN_CLRBIT3), FULL (clrbit3) FAST (clrbit3) },
-  { TYPE (INSN_SHLO), IDX (INSN_SHLO), FULL (shlo) FAST (shlo) },
-  { TYPE (INSN_SHLO1), IDX (INSN_SHLO1), FULL (shlo1) FAST (shlo1) },
-  { TYPE (INSN_SHLO2), IDX (INSN_SHLO2), FULL (shlo2) FAST (shlo2) },
-  { TYPE (INSN_SHLO3), IDX (INSN_SHLO3), FULL (shlo3) FAST (shlo3) },
-  { TYPE (INSN_SHRO), IDX (INSN_SHRO), FULL (shro) FAST (shro) },
-  { TYPE (INSN_SHRO1), IDX (INSN_SHRO1), FULL (shro1) FAST (shro1) },
-  { TYPE (INSN_SHRO2), IDX (INSN_SHRO2), FULL (shro2) FAST (shro2) },
-  { TYPE (INSN_SHRO3), IDX (INSN_SHRO3), FULL (shro3) FAST (shro3) },
-  { TYPE (INSN_SHLI), IDX (INSN_SHLI), FULL (shli) FAST (shli) },
-  { TYPE (INSN_SHLI1), IDX (INSN_SHLI1), FULL (shli1) FAST (shli1) },
-  { TYPE (INSN_SHLI2), IDX (INSN_SHLI2), FULL (shli2) FAST (shli2) },
-  { TYPE (INSN_SHLI3), IDX (INSN_SHLI3), FULL (shli3) FAST (shli3) },
-  { TYPE (INSN_SHRI), IDX (INSN_SHRI), FULL (shri) FAST (shri) },
-  { TYPE (INSN_SHRI1), IDX (INSN_SHRI1), FULL (shri1) FAST (shri1) },
-  { TYPE (INSN_SHRI2), IDX (INSN_SHRI2), FULL (shri2) FAST (shri2) },
-  { TYPE (INSN_SHRI3), IDX (INSN_SHRI3), FULL (shri3) FAST (shri3) },
-  { TYPE (INSN_EMUL), IDX (INSN_EMUL), FULL (emul) FAST (emul) },
-  { TYPE (INSN_EMUL1), IDX (INSN_EMUL1), FULL (emul1) FAST (emul1) },
-  { TYPE (INSN_EMUL2), IDX (INSN_EMUL2), FULL (emul2) FAST (emul2) },
-  { TYPE (INSN_EMUL3), IDX (INSN_EMUL3), FULL (emul3) FAST (emul3) },
-  { TYPE (INSN_MOV), IDX (INSN_MOV), FULL (mov) FAST (mov) },
-  { TYPE (INSN_MOV1), IDX (INSN_MOV1), FULL (mov1) FAST (mov1) },
-  { TYPE (INSN_MOVL), IDX (INSN_MOVL), FULL (movl) FAST (movl) },
-  { TYPE (INSN_MOVL1), IDX (INSN_MOVL1), FULL (movl1) FAST (movl1) },
-  { TYPE (INSN_MOVT), IDX (INSN_MOVT), FULL (movt) FAST (movt) },
-  { TYPE (INSN_MOVT1), IDX (INSN_MOVT1), FULL (movt1) FAST (movt1) },
-  { TYPE (INSN_MOVQ), IDX (INSN_MOVQ), FULL (movq) FAST (movq) },
-  { TYPE (INSN_MOVQ1), IDX (INSN_MOVQ1), FULL (movq1) FAST (movq1) },
-  { TYPE (INSN_MODPC), IDX (INSN_MODPC), FULL (modpc) FAST (modpc) },
-  { TYPE (INSN_MODAC), IDX (INSN_MODAC), FULL (modac) FAST (modac) },
-  { TYPE (INSN_LDA_OFFSET), IDX (INSN_LDA_OFFSET), FULL (lda_offset) FAST (lda_offset) },
-  { TYPE (INSN_LDA_INDIRECT_OFFSET), IDX (INSN_LDA_INDIRECT_OFFSET), FULL (lda_indirect_offset) FAST (lda_indirect_offset) },
-  { TYPE (INSN_LDA_INDIRECT), IDX (INSN_LDA_INDIRECT), FULL (lda_indirect) FAST (lda_indirect) },
-  { TYPE (INSN_LDA_INDIRECT_INDEX), IDX (INSN_LDA_INDIRECT_INDEX), FULL (lda_indirect_index) FAST (lda_indirect_index) },
-  { TYPE (INSN_LDA_DISP), IDX (INSN_LDA_DISP), FULL (lda_disp) FAST (lda_disp) },
-  { TYPE (INSN_LDA_INDIRECT_DISP), IDX (INSN_LDA_INDIRECT_DISP), FULL (lda_indirect_disp) FAST (lda_indirect_disp) },
-  { TYPE (INSN_LDA_INDEX_DISP), IDX (INSN_LDA_INDEX_DISP), FULL (lda_index_disp) FAST (lda_index_disp) },
-  { TYPE (INSN_LDA_INDIRECT_INDEX_DISP), IDX (INSN_LDA_INDIRECT_INDEX_DISP), FULL (lda_indirect_index_disp) FAST (lda_indirect_index_disp) },
-  { TYPE (INSN_LD_OFFSET), IDX (INSN_LD_OFFSET), FULL (ld_offset) FAST (ld_offset) },
-  { TYPE (INSN_LD_INDIRECT_OFFSET), IDX (INSN_LD_INDIRECT_OFFSET), FULL (ld_indirect_offset) FAST (ld_indirect_offset) },
-  { TYPE (INSN_LD_INDIRECT), IDX (INSN_LD_INDIRECT), FULL (ld_indirect) FAST (ld_indirect) },
-  { TYPE (INSN_LD_INDIRECT_INDEX), IDX (INSN_LD_INDIRECT_INDEX), FULL (ld_indirect_index) FAST (ld_indirect_index) },
-  { TYPE (INSN_LD_DISP), IDX (INSN_LD_DISP), FULL (ld_disp) FAST (ld_disp) },
-  { TYPE (INSN_LD_INDIRECT_DISP), IDX (INSN_LD_INDIRECT_DISP), FULL (ld_indirect_disp) FAST (ld_indirect_disp) },
-  { TYPE (INSN_LD_INDEX_DISP), IDX (INSN_LD_INDEX_DISP), FULL (ld_index_disp) FAST (ld_index_disp) },
-  { TYPE (INSN_LD_INDIRECT_INDEX_DISP), IDX (INSN_LD_INDIRECT_INDEX_DISP), FULL (ld_indirect_index_disp) FAST (ld_indirect_index_disp) },
-  { TYPE (INSN_LDOB_OFFSET), IDX (INSN_LDOB_OFFSET), FULL (ldob_offset) FAST (ldob_offset) },
-  { TYPE (INSN_LDOB_INDIRECT_OFFSET), IDX (INSN_LDOB_INDIRECT_OFFSET), FULL (ldob_indirect_offset) FAST (ldob_indirect_offset) },
-  { TYPE (INSN_LDOB_INDIRECT), IDX (INSN_LDOB_INDIRECT), FULL (ldob_indirect) FAST (ldob_indirect) },
-  { TYPE (INSN_LDOB_INDIRECT_INDEX), IDX (INSN_LDOB_INDIRECT_INDEX), FULL (ldob_indirect_index) FAST (ldob_indirect_index) },
-  { TYPE (INSN_LDOB_DISP), IDX (INSN_LDOB_DISP), FULL (ldob_disp) FAST (ldob_disp) },
-  { TYPE (INSN_LDOB_INDIRECT_DISP), IDX (INSN_LDOB_INDIRECT_DISP), FULL (ldob_indirect_disp) FAST (ldob_indirect_disp) },
-  { TYPE (INSN_LDOB_INDEX_DISP), IDX (INSN_LDOB_INDEX_DISP), FULL (ldob_index_disp) FAST (ldob_index_disp) },
-  { TYPE (INSN_LDOB_INDIRECT_INDEX_DISP), IDX (INSN_LDOB_INDIRECT_INDEX_DISP), FULL (ldob_indirect_index_disp) FAST (ldob_indirect_index_disp) },
-  { TYPE (INSN_LDOS_OFFSET), IDX (INSN_LDOS_OFFSET), FULL (ldos_offset) FAST (ldos_offset) },
-  { TYPE (INSN_LDOS_INDIRECT_OFFSET), IDX (INSN_LDOS_INDIRECT_OFFSET), FULL (ldos_indirect_offset) FAST (ldos_indirect_offset) },
-  { TYPE (INSN_LDOS_INDIRECT), IDX (INSN_LDOS_INDIRECT), FULL (ldos_indirect) FAST (ldos_indirect) },
-  { TYPE (INSN_LDOS_INDIRECT_INDEX), IDX (INSN_LDOS_INDIRECT_INDEX), FULL (ldos_indirect_index) FAST (ldos_indirect_index) },
-  { TYPE (INSN_LDOS_DISP), IDX (INSN_LDOS_DISP), FULL (ldos_disp) FAST (ldos_disp) },
-  { TYPE (INSN_LDOS_INDIRECT_DISP), IDX (INSN_LDOS_INDIRECT_DISP), FULL (ldos_indirect_disp) FAST (ldos_indirect_disp) },
-  { TYPE (INSN_LDOS_INDEX_DISP), IDX (INSN_LDOS_INDEX_DISP), FULL (ldos_index_disp) FAST (ldos_index_disp) },
-  { TYPE (INSN_LDOS_INDIRECT_INDEX_DISP), IDX (INSN_LDOS_INDIRECT_INDEX_DISP), FULL (ldos_indirect_index_disp) FAST (ldos_indirect_index_disp) },
-  { TYPE (INSN_LDIB_OFFSET), IDX (INSN_LDIB_OFFSET), FULL (ldib_offset) FAST (ldib_offset) },
-  { TYPE (INSN_LDIB_INDIRECT_OFFSET), IDX (INSN_LDIB_INDIRECT_OFFSET), FULL (ldib_indirect_offset) FAST (ldib_indirect_offset) },
-  { TYPE (INSN_LDIB_INDIRECT), IDX (INSN_LDIB_INDIRECT), FULL (ldib_indirect) FAST (ldib_indirect) },
-  { TYPE (INSN_LDIB_INDIRECT_INDEX), IDX (INSN_LDIB_INDIRECT_INDEX), FULL (ldib_indirect_index) FAST (ldib_indirect_index) },
-  { TYPE (INSN_LDIB_DISP), IDX (INSN_LDIB_DISP), FULL (ldib_disp) FAST (ldib_disp) },
-  { TYPE (INSN_LDIB_INDIRECT_DISP), IDX (INSN_LDIB_INDIRECT_DISP), FULL (ldib_indirect_disp) FAST (ldib_indirect_disp) },
-  { TYPE (INSN_LDIB_INDEX_DISP), IDX (INSN_LDIB_INDEX_DISP), FULL (ldib_index_disp) FAST (ldib_index_disp) },
-  { TYPE (INSN_LDIB_INDIRECT_INDEX_DISP), IDX (INSN_LDIB_INDIRECT_INDEX_DISP), FULL (ldib_indirect_index_disp) FAST (ldib_indirect_index_disp) },
-  { TYPE (INSN_LDIS_OFFSET), IDX (INSN_LDIS_OFFSET), FULL (ldis_offset) FAST (ldis_offset) },
-  { TYPE (INSN_LDIS_INDIRECT_OFFSET), IDX (INSN_LDIS_INDIRECT_OFFSET), FULL (ldis_indirect_offset) FAST (ldis_indirect_offset) },
-  { TYPE (INSN_LDIS_INDIRECT), IDX (INSN_LDIS_INDIRECT), FULL (ldis_indirect) FAST (ldis_indirect) },
-  { TYPE (INSN_LDIS_INDIRECT_INDEX), IDX (INSN_LDIS_INDIRECT_INDEX), FULL (ldis_indirect_index) FAST (ldis_indirect_index) },
-  { TYPE (INSN_LDIS_DISP), IDX (INSN_LDIS_DISP), FULL (ldis_disp) FAST (ldis_disp) },
-  { TYPE (INSN_LDIS_INDIRECT_DISP), IDX (INSN_LDIS_INDIRECT_DISP), FULL (ldis_indirect_disp) FAST (ldis_indirect_disp) },
-  { TYPE (INSN_LDIS_INDEX_DISP), IDX (INSN_LDIS_INDEX_DISP), FULL (ldis_index_disp) FAST (ldis_index_disp) },
-  { TYPE (INSN_LDIS_INDIRECT_INDEX_DISP), IDX (INSN_LDIS_INDIRECT_INDEX_DISP), FULL (ldis_indirect_index_disp) FAST (ldis_indirect_index_disp) },
-  { TYPE (INSN_LDL_OFFSET), IDX (INSN_LDL_OFFSET), FULL (ldl_offset) FAST (ldl_offset) },
-  { TYPE (INSN_LDL_INDIRECT_OFFSET), IDX (INSN_LDL_INDIRECT_OFFSET), FULL (ldl_indirect_offset) FAST (ldl_indirect_offset) },
-  { TYPE (INSN_LDL_INDIRECT), IDX (INSN_LDL_INDIRECT), FULL (ldl_indirect) FAST (ldl_indirect) },
-  { TYPE (INSN_LDL_INDIRECT_INDEX), IDX (INSN_LDL_INDIRECT_INDEX), FULL (ldl_indirect_index) FAST (ldl_indirect_index) },
-  { TYPE (INSN_LDL_DISP), IDX (INSN_LDL_DISP), FULL (ldl_disp) FAST (ldl_disp) },
-  { TYPE (INSN_LDL_INDIRECT_DISP), IDX (INSN_LDL_INDIRECT_DISP), FULL (ldl_indirect_disp) FAST (ldl_indirect_disp) },
-  { TYPE (INSN_LDL_INDEX_DISP), IDX (INSN_LDL_INDEX_DISP), FULL (ldl_index_disp) FAST (ldl_index_disp) },
-  { TYPE (INSN_LDL_INDIRECT_INDEX_DISP), IDX (INSN_LDL_INDIRECT_INDEX_DISP), FULL (ldl_indirect_index_disp) FAST (ldl_indirect_index_disp) },
-  { TYPE (INSN_LDT_OFFSET), IDX (INSN_LDT_OFFSET), FULL (ldt_offset) FAST (ldt_offset) },
-  { TYPE (INSN_LDT_INDIRECT_OFFSET), IDX (INSN_LDT_INDIRECT_OFFSET), FULL (ldt_indirect_offset) FAST (ldt_indirect_offset) },
-  { TYPE (INSN_LDT_INDIRECT), IDX (INSN_LDT_INDIRECT), FULL (ldt_indirect) FAST (ldt_indirect) },
-  { TYPE (INSN_LDT_INDIRECT_INDEX), IDX (INSN_LDT_INDIRECT_INDEX), FULL (ldt_indirect_index) FAST (ldt_indirect_index) },
-  { TYPE (INSN_LDT_DISP), IDX (INSN_LDT_DISP), FULL (ldt_disp) FAST (ldt_disp) },
-  { TYPE (INSN_LDT_INDIRECT_DISP), IDX (INSN_LDT_INDIRECT_DISP), FULL (ldt_indirect_disp) FAST (ldt_indirect_disp) },
-  { TYPE (INSN_LDT_INDEX_DISP), IDX (INSN_LDT_INDEX_DISP), FULL (ldt_index_disp) FAST (ldt_index_disp) },
-  { TYPE (INSN_LDT_INDIRECT_INDEX_DISP), IDX (INSN_LDT_INDIRECT_INDEX_DISP), FULL (ldt_indirect_index_disp) FAST (ldt_indirect_index_disp) },
-  { TYPE (INSN_LDQ_OFFSET), IDX (INSN_LDQ_OFFSET), FULL (ldq_offset) FAST (ldq_offset) },
-  { TYPE (INSN_LDQ_INDIRECT_OFFSET), IDX (INSN_LDQ_INDIRECT_OFFSET), FULL (ldq_indirect_offset) FAST (ldq_indirect_offset) },
-  { TYPE (INSN_LDQ_INDIRECT), IDX (INSN_LDQ_INDIRECT), FULL (ldq_indirect) FAST (ldq_indirect) },
-  { TYPE (INSN_LDQ_INDIRECT_INDEX), IDX (INSN_LDQ_INDIRECT_INDEX), FULL (ldq_indirect_index) FAST (ldq_indirect_index) },
-  { TYPE (INSN_LDQ_DISP), IDX (INSN_LDQ_DISP), FULL (ldq_disp) FAST (ldq_disp) },
-  { TYPE (INSN_LDQ_INDIRECT_DISP), IDX (INSN_LDQ_INDIRECT_DISP), FULL (ldq_indirect_disp) FAST (ldq_indirect_disp) },
-  { TYPE (INSN_LDQ_INDEX_DISP), IDX (INSN_LDQ_INDEX_DISP), FULL (ldq_index_disp) FAST (ldq_index_disp) },
-  { TYPE (INSN_LDQ_INDIRECT_INDEX_DISP), IDX (INSN_LDQ_INDIRECT_INDEX_DISP), FULL (ldq_indirect_index_disp) FAST (ldq_indirect_index_disp) },
-  { TYPE (INSN_ST_OFFSET), IDX (INSN_ST_OFFSET), FULL (st_offset) FAST (st_offset) },
-  { TYPE (INSN_ST_INDIRECT_OFFSET), IDX (INSN_ST_INDIRECT_OFFSET), FULL (st_indirect_offset) FAST (st_indirect_offset) },
-  { TYPE (INSN_ST_INDIRECT), IDX (INSN_ST_INDIRECT), FULL (st_indirect) FAST (st_indirect) },
-  { TYPE (INSN_ST_INDIRECT_INDEX), IDX (INSN_ST_INDIRECT_INDEX), FULL (st_indirect_index) FAST (st_indirect_index) },
-  { TYPE (INSN_ST_DISP), IDX (INSN_ST_DISP), FULL (st_disp) FAST (st_disp) },
-  { TYPE (INSN_ST_INDIRECT_DISP), IDX (INSN_ST_INDIRECT_DISP), FULL (st_indirect_disp) FAST (st_indirect_disp) },
-  { TYPE (INSN_ST_INDEX_DISP), IDX (INSN_ST_INDEX_DISP), FULL (st_index_disp) FAST (st_index_disp) },
-  { TYPE (INSN_ST_INDIRECT_INDEX_DISP), IDX (INSN_ST_INDIRECT_INDEX_DISP), FULL (st_indirect_index_disp) FAST (st_indirect_index_disp) },
-  { TYPE (INSN_STOB_OFFSET), IDX (INSN_STOB_OFFSET), FULL (stob_offset) FAST (stob_offset) },
-  { TYPE (INSN_STOB_INDIRECT_OFFSET), IDX (INSN_STOB_INDIRECT_OFFSET), FULL (stob_indirect_offset) FAST (stob_indirect_offset) },
-  { TYPE (INSN_STOB_INDIRECT), IDX (INSN_STOB_INDIRECT), FULL (stob_indirect) FAST (stob_indirect) },
-  { TYPE (INSN_STOB_INDIRECT_INDEX), IDX (INSN_STOB_INDIRECT_INDEX), FULL (stob_indirect_index) FAST (stob_indirect_index) },
-  { TYPE (INSN_STOB_DISP), IDX (INSN_STOB_DISP), FULL (stob_disp) FAST (stob_disp) },
-  { TYPE (INSN_STOB_INDIRECT_DISP), IDX (INSN_STOB_INDIRECT_DISP), FULL (stob_indirect_disp) FAST (stob_indirect_disp) },
-  { TYPE (INSN_STOB_INDEX_DISP), IDX (INSN_STOB_INDEX_DISP), FULL (stob_index_disp) FAST (stob_index_disp) },
-  { TYPE (INSN_STOB_INDIRECT_INDEX_DISP), IDX (INSN_STOB_INDIRECT_INDEX_DISP), FULL (stob_indirect_index_disp) FAST (stob_indirect_index_disp) },
-  { TYPE (INSN_STOS_OFFSET), IDX (INSN_STOS_OFFSET), FULL (stos_offset) FAST (stos_offset) },
-  { TYPE (INSN_STOS_INDIRECT_OFFSET), IDX (INSN_STOS_INDIRECT_OFFSET), FULL (stos_indirect_offset) FAST (stos_indirect_offset) },
-  { TYPE (INSN_STOS_INDIRECT), IDX (INSN_STOS_INDIRECT), FULL (stos_indirect) FAST (stos_indirect) },
-  { TYPE (INSN_STOS_INDIRECT_INDEX), IDX (INSN_STOS_INDIRECT_INDEX), FULL (stos_indirect_index) FAST (stos_indirect_index) },
-  { TYPE (INSN_STOS_DISP), IDX (INSN_STOS_DISP), FULL (stos_disp) FAST (stos_disp) },
-  { TYPE (INSN_STOS_INDIRECT_DISP), IDX (INSN_STOS_INDIRECT_DISP), FULL (stos_indirect_disp) FAST (stos_indirect_disp) },
-  { TYPE (INSN_STOS_INDEX_DISP), IDX (INSN_STOS_INDEX_DISP), FULL (stos_index_disp) FAST (stos_index_disp) },
-  { TYPE (INSN_STOS_INDIRECT_INDEX_DISP), IDX (INSN_STOS_INDIRECT_INDEX_DISP), FULL (stos_indirect_index_disp) FAST (stos_indirect_index_disp) },
-  { TYPE (INSN_STL_OFFSET), IDX (INSN_STL_OFFSET), FULL (stl_offset) FAST (stl_offset) },
-  { TYPE (INSN_STL_INDIRECT_OFFSET), IDX (INSN_STL_INDIRECT_OFFSET), FULL (stl_indirect_offset) FAST (stl_indirect_offset) },
-  { TYPE (INSN_STL_INDIRECT), IDX (INSN_STL_INDIRECT), FULL (stl_indirect) FAST (stl_indirect) },
-  { TYPE (INSN_STL_INDIRECT_INDEX), IDX (INSN_STL_INDIRECT_INDEX), FULL (stl_indirect_index) FAST (stl_indirect_index) },
-  { TYPE (INSN_STL_DISP), IDX (INSN_STL_DISP), FULL (stl_disp) FAST (stl_disp) },
-  { TYPE (INSN_STL_INDIRECT_DISP), IDX (INSN_STL_INDIRECT_DISP), FULL (stl_indirect_disp) FAST (stl_indirect_disp) },
-  { TYPE (INSN_STL_INDEX_DISP), IDX (INSN_STL_INDEX_DISP), FULL (stl_index_disp) FAST (stl_index_disp) },
-  { TYPE (INSN_STL_INDIRECT_INDEX_DISP), IDX (INSN_STL_INDIRECT_INDEX_DISP), FULL (stl_indirect_index_disp) FAST (stl_indirect_index_disp) },
-  { TYPE (INSN_STT_OFFSET), IDX (INSN_STT_OFFSET), FULL (stt_offset) FAST (stt_offset) },
-  { TYPE (INSN_STT_INDIRECT_OFFSET), IDX (INSN_STT_INDIRECT_OFFSET), FULL (stt_indirect_offset) FAST (stt_indirect_offset) },
-  { TYPE (INSN_STT_INDIRECT), IDX (INSN_STT_INDIRECT), FULL (stt_indirect) FAST (stt_indirect) },
-  { TYPE (INSN_STT_INDIRECT_INDEX), IDX (INSN_STT_INDIRECT_INDEX), FULL (stt_indirect_index) FAST (stt_indirect_index) },
-  { TYPE (INSN_STT_DISP), IDX (INSN_STT_DISP), FULL (stt_disp) FAST (stt_disp) },
-  { TYPE (INSN_STT_INDIRECT_DISP), IDX (INSN_STT_INDIRECT_DISP), FULL (stt_indirect_disp) FAST (stt_indirect_disp) },
-  { TYPE (INSN_STT_INDEX_DISP), IDX (INSN_STT_INDEX_DISP), FULL (stt_index_disp) FAST (stt_index_disp) },
-  { TYPE (INSN_STT_INDIRECT_INDEX_DISP), IDX (INSN_STT_INDIRECT_INDEX_DISP), FULL (stt_indirect_index_disp) FAST (stt_indirect_index_disp) },
-  { TYPE (INSN_STQ_OFFSET), IDX (INSN_STQ_OFFSET), FULL (stq_offset) FAST (stq_offset) },
-  { TYPE (INSN_STQ_INDIRECT_OFFSET), IDX (INSN_STQ_INDIRECT_OFFSET), FULL (stq_indirect_offset) FAST (stq_indirect_offset) },
-  { TYPE (INSN_STQ_INDIRECT), IDX (INSN_STQ_INDIRECT), FULL (stq_indirect) FAST (stq_indirect) },
-  { TYPE (INSN_STQ_INDIRECT_INDEX), IDX (INSN_STQ_INDIRECT_INDEX), FULL (stq_indirect_index) FAST (stq_indirect_index) },
-  { TYPE (INSN_STQ_DISP), IDX (INSN_STQ_DISP), FULL (stq_disp) FAST (stq_disp) },
-  { TYPE (INSN_STQ_INDIRECT_DISP), IDX (INSN_STQ_INDIRECT_DISP), FULL (stq_indirect_disp) FAST (stq_indirect_disp) },
-  { TYPE (INSN_STQ_INDEX_DISP), IDX (INSN_STQ_INDEX_DISP), FULL (stq_index_disp) FAST (stq_index_disp) },
-  { TYPE (INSN_STQ_INDIRECT_INDEX_DISP), IDX (INSN_STQ_INDIRECT_INDEX_DISP), FULL (stq_indirect_index_disp) FAST (stq_indirect_index_disp) },
-  { TYPE (INSN_CMPOBE_REG), IDX (INSN_CMPOBE_REG), FULL (cmpobe_reg) FAST (cmpobe_reg) },
-  { TYPE (INSN_CMPOBE_LIT), IDX (INSN_CMPOBE_LIT), FULL (cmpobe_lit) FAST (cmpobe_lit) },
-  { TYPE (INSN_CMPOBNE_REG), IDX (INSN_CMPOBNE_REG), FULL (cmpobne_reg) FAST (cmpobne_reg) },
-  { TYPE (INSN_CMPOBNE_LIT), IDX (INSN_CMPOBNE_LIT), FULL (cmpobne_lit) FAST (cmpobne_lit) },
-  { TYPE (INSN_CMPOBL_REG), IDX (INSN_CMPOBL_REG), FULL (cmpobl_reg) FAST (cmpobl_reg) },
-  { TYPE (INSN_CMPOBL_LIT), IDX (INSN_CMPOBL_LIT), FULL (cmpobl_lit) FAST (cmpobl_lit) },
-  { TYPE (INSN_CMPOBLE_REG), IDX (INSN_CMPOBLE_REG), FULL (cmpoble_reg) FAST (cmpoble_reg) },
-  { TYPE (INSN_CMPOBLE_LIT), IDX (INSN_CMPOBLE_LIT), FULL (cmpoble_lit) FAST (cmpoble_lit) },
-  { TYPE (INSN_CMPOBG_REG), IDX (INSN_CMPOBG_REG), FULL (cmpobg_reg) FAST (cmpobg_reg) },
-  { TYPE (INSN_CMPOBG_LIT), IDX (INSN_CMPOBG_LIT), FULL (cmpobg_lit) FAST (cmpobg_lit) },
-  { TYPE (INSN_CMPOBGE_REG), IDX (INSN_CMPOBGE_REG), FULL (cmpobge_reg) FAST (cmpobge_reg) },
-  { TYPE (INSN_CMPOBGE_LIT), IDX (INSN_CMPOBGE_LIT), FULL (cmpobge_lit) FAST (cmpobge_lit) },
-  { TYPE (INSN_CMPIBE_REG), IDX (INSN_CMPIBE_REG), FULL (cmpibe_reg) FAST (cmpibe_reg) },
-  { TYPE (INSN_CMPIBE_LIT), IDX (INSN_CMPIBE_LIT), FULL (cmpibe_lit) FAST (cmpibe_lit) },
-  { TYPE (INSN_CMPIBNE_REG), IDX (INSN_CMPIBNE_REG), FULL (cmpibne_reg) FAST (cmpibne_reg) },
-  { TYPE (INSN_CMPIBNE_LIT), IDX (INSN_CMPIBNE_LIT), FULL (cmpibne_lit) FAST (cmpibne_lit) },
-  { TYPE (INSN_CMPIBL_REG), IDX (INSN_CMPIBL_REG), FULL (cmpibl_reg) FAST (cmpibl_reg) },
-  { TYPE (INSN_CMPIBL_LIT), IDX (INSN_CMPIBL_LIT), FULL (cmpibl_lit) FAST (cmpibl_lit) },
-  { TYPE (INSN_CMPIBLE_REG), IDX (INSN_CMPIBLE_REG), FULL (cmpible_reg) FAST (cmpible_reg) },
-  { TYPE (INSN_CMPIBLE_LIT), IDX (INSN_CMPIBLE_LIT), FULL (cmpible_lit) FAST (cmpible_lit) },
-  { TYPE (INSN_CMPIBG_REG), IDX (INSN_CMPIBG_REG), FULL (cmpibg_reg) FAST (cmpibg_reg) },
-  { TYPE (INSN_CMPIBG_LIT), IDX (INSN_CMPIBG_LIT), FULL (cmpibg_lit) FAST (cmpibg_lit) },
-  { TYPE (INSN_CMPIBGE_REG), IDX (INSN_CMPIBGE_REG), FULL (cmpibge_reg) FAST (cmpibge_reg) },
-  { TYPE (INSN_CMPIBGE_LIT), IDX (INSN_CMPIBGE_LIT), FULL (cmpibge_lit) FAST (cmpibge_lit) },
-  { TYPE (INSN_BBC_REG), IDX (INSN_BBC_REG), FULL (bbc_reg) FAST (bbc_reg) },
-  { TYPE (INSN_BBC_LIT), IDX (INSN_BBC_LIT), FULL (bbc_lit) FAST (bbc_lit) },
-  { TYPE (INSN_BBS_REG), IDX (INSN_BBS_REG), FULL (bbs_reg) FAST (bbs_reg) },
-  { TYPE (INSN_BBS_LIT), IDX (INSN_BBS_LIT), FULL (bbs_lit) FAST (bbs_lit) },
-  { TYPE (INSN_CMPI), IDX (INSN_CMPI), FULL (cmpi) FAST (cmpi) },
-  { TYPE (INSN_CMPI1), IDX (INSN_CMPI1), FULL (cmpi1) FAST (cmpi1) },
-  { TYPE (INSN_CMPI2), IDX (INSN_CMPI2), FULL (cmpi2) FAST (cmpi2) },
-  { TYPE (INSN_CMPI3), IDX (INSN_CMPI3), FULL (cmpi3) FAST (cmpi3) },
-  { TYPE (INSN_CMPO), IDX (INSN_CMPO), FULL (cmpo) FAST (cmpo) },
-  { TYPE (INSN_CMPO1), IDX (INSN_CMPO1), FULL (cmpo1) FAST (cmpo1) },
-  { TYPE (INSN_CMPO2), IDX (INSN_CMPO2), FULL (cmpo2) FAST (cmpo2) },
-  { TYPE (INSN_CMPO3), IDX (INSN_CMPO3), FULL (cmpo3) FAST (cmpo3) },
-  { TYPE (INSN_TESTNO_REG), IDX (INSN_TESTNO_REG), FULL (testno_reg) FAST (testno_reg) },
-  { TYPE (INSN_TESTG_REG), IDX (INSN_TESTG_REG), FULL (testg_reg) FAST (testg_reg) },
-  { TYPE (INSN_TESTE_REG), IDX (INSN_TESTE_REG), FULL (teste_reg) FAST (teste_reg) },
-  { TYPE (INSN_TESTGE_REG), IDX (INSN_TESTGE_REG), FULL (testge_reg) FAST (testge_reg) },
-  { TYPE (INSN_TESTL_REG), IDX (INSN_TESTL_REG), FULL (testl_reg) FAST (testl_reg) },
-  { TYPE (INSN_TESTNE_REG), IDX (INSN_TESTNE_REG), FULL (testne_reg) FAST (testne_reg) },
-  { TYPE (INSN_TESTLE_REG), IDX (INSN_TESTLE_REG), FULL (testle_reg) FAST (testle_reg) },
-  { TYPE (INSN_TESTO_REG), IDX (INSN_TESTO_REG), FULL (testo_reg) FAST (testo_reg) },
-  { TYPE (INSN_BNO), IDX (INSN_BNO), FULL (bno) FAST (bno) },
-  { TYPE (INSN_BG), IDX (INSN_BG), FULL (bg) FAST (bg) },
-  { TYPE (INSN_BE), IDX (INSN_BE), FULL (be) FAST (be) },
-  { TYPE (INSN_BGE), IDX (INSN_BGE), FULL (bge) FAST (bge) },
-  { TYPE (INSN_BL), IDX (INSN_BL), FULL (bl) FAST (bl) },
-  { TYPE (INSN_BNE), IDX (INSN_BNE), FULL (bne) FAST (bne) },
-  { TYPE (INSN_BLE), IDX (INSN_BLE), FULL (ble) FAST (ble) },
-  { TYPE (INSN_BO), IDX (INSN_BO), FULL (bo) FAST (bo) },
-  { TYPE (INSN_B), IDX (INSN_B), FULL (b) FAST (b) },
-  { TYPE (INSN_BX_INDIRECT_OFFSET), IDX (INSN_BX_INDIRECT_OFFSET), FULL (bx_indirect_offset) FAST (bx_indirect_offset) },
-  { TYPE (INSN_BX_INDIRECT), IDX (INSN_BX_INDIRECT), FULL (bx_indirect) FAST (bx_indirect) },
-  { TYPE (INSN_BX_INDIRECT_INDEX), IDX (INSN_BX_INDIRECT_INDEX), FULL (bx_indirect_index) FAST (bx_indirect_index) },
-  { TYPE (INSN_BX_DISP), IDX (INSN_BX_DISP), FULL (bx_disp) FAST (bx_disp) },
-  { TYPE (INSN_BX_INDIRECT_DISP), IDX (INSN_BX_INDIRECT_DISP), FULL (bx_indirect_disp) FAST (bx_indirect_disp) },
-  { TYPE (INSN_CALLX_DISP), IDX (INSN_CALLX_DISP), FULL (callx_disp) FAST (callx_disp) },
-  { TYPE (INSN_CALLX_INDIRECT), IDX (INSN_CALLX_INDIRECT), FULL (callx_indirect) FAST (callx_indirect) },
-  { TYPE (INSN_CALLX_INDIRECT_OFFSET), IDX (INSN_CALLX_INDIRECT_OFFSET), FULL (callx_indirect_offset) FAST (callx_indirect_offset) },
-  { TYPE (INSN_RET), IDX (INSN_RET), FULL (ret) FAST (ret) },
-  { TYPE (INSN_CALLS), IDX (INSN_CALLS), FULL (calls) FAST (calls) },
-  { TYPE (INSN_FMARK), IDX (INSN_FMARK), FULL (fmark) FAST (fmark) },
-  { TYPE (INSN_FLUSHREG), IDX (INSN_FLUSHREG), FULL (flushreg) FAST (flushreg) },
+  { VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_AFTER, I960BASE_INSN_X_AFTER, I960BASE_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_BEFORE, I960BASE_INSN_X_BEFORE, I960BASE_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_CTI_CHAIN, I960BASE_INSN_X_CTI_CHAIN, I960BASE_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_CHAIN, I960BASE_INSN_X_CHAIN, I960BASE_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_BEGIN, I960BASE_INSN_X_BEGIN, I960BASE_SFMT_EMPTY },
+  { I960_INSN_MULO, I960BASE_INSN_MULO, I960BASE_SFMT_MULO },
+  { I960_INSN_MULO1, I960BASE_INSN_MULO1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_MULO2, I960BASE_INSN_MULO2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_MULO3, I960BASE_INSN_MULO3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_REMO, I960BASE_INSN_REMO, I960BASE_SFMT_MULO },
+  { I960_INSN_REMO1, I960BASE_INSN_REMO1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_REMO2, I960BASE_INSN_REMO2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_REMO3, I960BASE_INSN_REMO3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_DIVO, I960BASE_INSN_DIVO, I960BASE_SFMT_MULO },
+  { I960_INSN_DIVO1, I960BASE_INSN_DIVO1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_DIVO2, I960BASE_INSN_DIVO2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_DIVO3, I960BASE_INSN_DIVO3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_REMI, I960BASE_INSN_REMI, I960BASE_SFMT_MULO },
+  { I960_INSN_REMI1, I960BASE_INSN_REMI1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_REMI2, I960BASE_INSN_REMI2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_REMI3, I960BASE_INSN_REMI3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_DIVI, I960BASE_INSN_DIVI, I960BASE_SFMT_MULO },
+  { I960_INSN_DIVI1, I960BASE_INSN_DIVI1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_DIVI2, I960BASE_INSN_DIVI2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_DIVI3, I960BASE_INSN_DIVI3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_ADDO, I960BASE_INSN_ADDO, I960BASE_SFMT_MULO },
+  { I960_INSN_ADDO1, I960BASE_INSN_ADDO1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_ADDO2, I960BASE_INSN_ADDO2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_ADDO3, I960BASE_INSN_ADDO3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_SUBO, I960BASE_INSN_SUBO, I960BASE_SFMT_MULO },
+  { I960_INSN_SUBO1, I960BASE_INSN_SUBO1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_SUBO2, I960BASE_INSN_SUBO2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_SUBO3, I960BASE_INSN_SUBO3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_NOTBIT, I960BASE_INSN_NOTBIT, I960BASE_SFMT_NOTBIT },
+  { I960_INSN_NOTBIT1, I960BASE_INSN_NOTBIT1, I960BASE_SFMT_NOTBIT1 },
+  { I960_INSN_NOTBIT2, I960BASE_INSN_NOTBIT2, I960BASE_SFMT_NOTBIT2 },
+  { I960_INSN_NOTBIT3, I960BASE_INSN_NOTBIT3, I960BASE_SFMT_NOTBIT3 },
+  { I960_INSN_AND, I960BASE_INSN_AND, I960BASE_SFMT_MULO },
+  { I960_INSN_AND1, I960BASE_INSN_AND1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_AND2, I960BASE_INSN_AND2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_AND3, I960BASE_INSN_AND3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_ANDNOT, I960BASE_INSN_ANDNOT, I960BASE_SFMT_MULO },
+  { I960_INSN_ANDNOT1, I960BASE_INSN_ANDNOT1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_ANDNOT2, I960BASE_INSN_ANDNOT2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_ANDNOT3, I960BASE_INSN_ANDNOT3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_SETBIT, I960BASE_INSN_SETBIT, I960BASE_SFMT_NOTBIT },
+  { I960_INSN_SETBIT1, I960BASE_INSN_SETBIT1, I960BASE_SFMT_NOTBIT1 },
+  { I960_INSN_SETBIT2, I960BASE_INSN_SETBIT2, I960BASE_SFMT_NOTBIT2 },
+  { I960_INSN_SETBIT3, I960BASE_INSN_SETBIT3, I960BASE_SFMT_NOTBIT3 },
+  { I960_INSN_NOTAND, I960BASE_INSN_NOTAND, I960BASE_SFMT_MULO },
+  { I960_INSN_NOTAND1, I960BASE_INSN_NOTAND1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_NOTAND2, I960BASE_INSN_NOTAND2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_NOTAND3, I960BASE_INSN_NOTAND3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_XOR, I960BASE_INSN_XOR, I960BASE_SFMT_MULO },
+  { I960_INSN_XOR1, I960BASE_INSN_XOR1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_XOR2, I960BASE_INSN_XOR2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_XOR3, I960BASE_INSN_XOR3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_OR, I960BASE_INSN_OR, I960BASE_SFMT_MULO },
+  { I960_INSN_OR1, I960BASE_INSN_OR1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_OR2, I960BASE_INSN_OR2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_OR3, I960BASE_INSN_OR3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_NOR, I960BASE_INSN_NOR, I960BASE_SFMT_MULO },
+  { I960_INSN_NOR1, I960BASE_INSN_NOR1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_NOR2, I960BASE_INSN_NOR2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_NOR3, I960BASE_INSN_NOR3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_XNOR, I960BASE_INSN_XNOR, I960BASE_SFMT_MULO },
+  { I960_INSN_XNOR1, I960BASE_INSN_XNOR1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_XNOR2, I960BASE_INSN_XNOR2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_XNOR3, I960BASE_INSN_XNOR3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_NOT, I960BASE_INSN_NOT, I960BASE_SFMT_NOT },
+  { I960_INSN_NOT1, I960BASE_INSN_NOT1, I960BASE_SFMT_NOT1 },
+  { I960_INSN_NOT2, I960BASE_INSN_NOT2, I960BASE_SFMT_NOT },
+  { I960_INSN_NOT3, I960BASE_INSN_NOT3, I960BASE_SFMT_NOT1 },
+  { I960_INSN_ORNOT, I960BASE_INSN_ORNOT, I960BASE_SFMT_MULO },
+  { I960_INSN_ORNOT1, I960BASE_INSN_ORNOT1, I960BASE_SFMT_MULO1 },
+  { I960_INSN_ORNOT2, I960BASE_INSN_ORNOT2, I960BASE_SFMT_MULO2 },
+  { I960_INSN_ORNOT3, I960BASE_INSN_ORNOT3, I960BASE_SFMT_MULO3 },
+  { I960_INSN_CLRBIT, I960BASE_INSN_CLRBIT, I960BASE_SFMT_NOTBIT },
+  { I960_INSN_CLRBIT1, I960BASE_INSN_CLRBIT1, I960BASE_SFMT_NOTBIT1 },
+  { I960_INSN_CLRBIT2, I960BASE_INSN_CLRBIT2, I960BASE_SFMT_NOTBIT2 },
+  { I960_INSN_CLRBIT3, I960BASE_INSN_CLRBIT3, I960BASE_SFMT_NOTBIT3 },
+  { I960_INSN_SHLO, I960BASE_INSN_SHLO, I960BASE_SFMT_SHLO },
+  { I960_INSN_SHLO1, I960BASE_INSN_SHLO1, I960BASE_SFMT_SHLO1 },
+  { I960_INSN_SHLO2, I960BASE_INSN_SHLO2, I960BASE_SFMT_SHLO2 },
+  { I960_INSN_SHLO3, I960BASE_INSN_SHLO3, I960BASE_SFMT_SHLO3 },
+  { I960_INSN_SHRO, I960BASE_INSN_SHRO, I960BASE_SFMT_SHLO },
+  { I960_INSN_SHRO1, I960BASE_INSN_SHRO1, I960BASE_SFMT_SHLO1 },
+  { I960_INSN_SHRO2, I960BASE_INSN_SHRO2, I960BASE_SFMT_SHLO2 },
+  { I960_INSN_SHRO3, I960BASE_INSN_SHRO3, I960BASE_SFMT_SHLO3 },
+  { I960_INSN_SHLI, I960BASE_INSN_SHLI, I960BASE_SFMT_SHLO },
+  { I960_INSN_SHLI1, I960BASE_INSN_SHLI1, I960BASE_SFMT_SHLO1 },
+  { I960_INSN_SHLI2, I960BASE_INSN_SHLI2, I960BASE_SFMT_SHLO2 },
+  { I960_INSN_SHLI3, I960BASE_INSN_SHLI3, I960BASE_SFMT_SHLO3 },
+  { I960_INSN_SHRI, I960BASE_INSN_SHRI, I960BASE_SFMT_SHLO },
+  { I960_INSN_SHRI1, I960BASE_INSN_SHRI1, I960BASE_SFMT_SHLO1 },
+  { I960_INSN_SHRI2, I960BASE_INSN_SHRI2, I960BASE_SFMT_SHLO2 },
+  { I960_INSN_SHRI3, I960BASE_INSN_SHRI3, I960BASE_SFMT_SHLO3 },
+  { I960_INSN_EMUL, I960BASE_INSN_EMUL, I960BASE_SFMT_EMUL },
+  { I960_INSN_EMUL1, I960BASE_INSN_EMUL1, I960BASE_SFMT_EMUL1 },
+  { I960_INSN_EMUL2, I960BASE_INSN_EMUL2, I960BASE_SFMT_EMUL2 },
+  { I960_INSN_EMUL3, I960BASE_INSN_EMUL3, I960BASE_SFMT_EMUL3 },
+  { I960_INSN_MOV, I960BASE_INSN_MOV, I960BASE_SFMT_NOT },
+  { I960_INSN_MOV1, I960BASE_INSN_MOV1, I960BASE_SFMT_NOT1 },
+  { I960_INSN_MOVL, I960BASE_INSN_MOVL, I960BASE_SFMT_MOVL },
+  { I960_INSN_MOVL1, I960BASE_INSN_MOVL1, I960BASE_SFMT_MOVL1 },
+  { I960_INSN_MOVT, I960BASE_INSN_MOVT, I960BASE_SFMT_MOVT },
+  { I960_INSN_MOVT1, I960BASE_INSN_MOVT1, I960BASE_SFMT_MOVT1 },
+  { I960_INSN_MOVQ, I960BASE_INSN_MOVQ, I960BASE_SFMT_MOVQ },
+  { I960_INSN_MOVQ1, I960BASE_INSN_MOVQ1, I960BASE_SFMT_MOVQ1 },
+  { I960_INSN_MODPC, I960BASE_INSN_MODPC, I960BASE_SFMT_MODPC },
+  { I960_INSN_MODAC, I960BASE_INSN_MODAC, I960BASE_SFMT_MODPC },
+  { I960_INSN_LDA_OFFSET, I960BASE_INSN_LDA_OFFSET, I960BASE_SFMT_LDA_OFFSET },
+  { I960_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET },
+  { I960_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT },
+  { I960_INSN_LDA_INDIRECT_INDEX, I960BASE_INSN_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_INDIRECT_INDEX },
+  { I960_INSN_LDA_DISP, I960BASE_INSN_LDA_DISP, I960BASE_SFMT_LDA_DISP },
+  { I960_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP },
+  { I960_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDEX_DISP },
+  { I960_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP },
+  { I960_INSN_LD_OFFSET, I960BASE_INSN_LD_OFFSET, I960BASE_SFMT_LD_OFFSET },
+  { I960_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
+  { I960_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
+  { I960_INSN_LD_INDIRECT_INDEX, I960BASE_INSN_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
+  { I960_INSN_LD_DISP, I960BASE_INSN_LD_DISP, I960BASE_SFMT_LD_DISP },
+  { I960_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
+  { I960_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
+  { I960_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_OFFSET, I960BASE_SFMT_LD_OFFSET },
+  { I960_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
+  { I960_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
+  { I960_INSN_LDOB_INDIRECT_INDEX, I960BASE_INSN_LDOB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
+  { I960_INSN_LDOB_DISP, I960BASE_INSN_LDOB_DISP, I960BASE_SFMT_LD_DISP },
+  { I960_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
+  { I960_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
+  { I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_OFFSET, I960BASE_SFMT_LD_OFFSET },
+  { I960_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
+  { I960_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
+  { I960_INSN_LDOS_INDIRECT_INDEX, I960BASE_INSN_LDOS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
+  { I960_INSN_LDOS_DISP, I960BASE_INSN_LDOS_DISP, I960BASE_SFMT_LD_DISP },
+  { I960_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
+  { I960_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
+  { I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_OFFSET, I960BASE_SFMT_LD_OFFSET },
+  { I960_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
+  { I960_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
+  { I960_INSN_LDIB_INDIRECT_INDEX, I960BASE_INSN_LDIB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
+  { I960_INSN_LDIB_DISP, I960BASE_INSN_LDIB_DISP, I960BASE_SFMT_LD_DISP },
+  { I960_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
+  { I960_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
+  { I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_OFFSET, I960BASE_SFMT_LD_OFFSET },
+  { I960_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
+  { I960_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
+  { I960_INSN_LDIS_INDIRECT_INDEX, I960BASE_INSN_LDIS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
+  { I960_INSN_LDIS_DISP, I960BASE_INSN_LDIS_DISP, I960BASE_SFMT_LD_DISP },
+  { I960_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
+  { I960_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
+  { I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDL_OFFSET, I960BASE_INSN_LDL_OFFSET, I960BASE_SFMT_LDL_OFFSET },
+  { I960_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET },
+  { I960_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT },
+  { I960_INSN_LDL_INDIRECT_INDEX, I960BASE_INSN_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_INDIRECT_INDEX },
+  { I960_INSN_LDL_DISP, I960BASE_INSN_LDL_DISP, I960BASE_SFMT_LDL_DISP },
+  { I960_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP },
+  { I960_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDEX_DISP },
+  { I960_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDT_OFFSET, I960BASE_INSN_LDT_OFFSET, I960BASE_SFMT_LDT_OFFSET },
+  { I960_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET },
+  { I960_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT },
+  { I960_INSN_LDT_INDIRECT_INDEX, I960BASE_INSN_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_INDIRECT_INDEX },
+  { I960_INSN_LDT_DISP, I960BASE_INSN_LDT_DISP, I960BASE_SFMT_LDT_DISP },
+  { I960_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP },
+  { I960_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDEX_DISP },
+  { I960_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP },
+  { I960_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_OFFSET, I960BASE_SFMT_LDQ_OFFSET },
+  { I960_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET },
+  { I960_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT },
+  { I960_INSN_LDQ_INDIRECT_INDEX, I960BASE_INSN_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_INDIRECT_INDEX },
+  { I960_INSN_LDQ_DISP, I960BASE_INSN_LDQ_DISP, I960BASE_SFMT_LDQ_DISP },
+  { I960_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP },
+  { I960_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDEX_DISP },
+  { I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP },
+  { I960_INSN_ST_OFFSET, I960BASE_INSN_ST_OFFSET, I960BASE_SFMT_ST_OFFSET },
+  { I960_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET },
+  { I960_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT },
+  { I960_INSN_ST_INDIRECT_INDEX, I960BASE_INSN_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX },
+  { I960_INSN_ST_DISP, I960BASE_INSN_ST_DISP, I960BASE_SFMT_ST_DISP },
+  { I960_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP },
+  { I960_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP },
+  { I960_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP },
+  { I960_INSN_STOB_OFFSET, I960BASE_INSN_STOB_OFFSET, I960BASE_SFMT_ST_OFFSET },
+  { I960_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET },
+  { I960_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT, I960BASE_SFMT_ST_INDIRECT },
+  { I960_INSN_STOB_INDIRECT_INDEX, I960BASE_INSN_STOB_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX },
+  { I960_INSN_STOB_DISP, I960BASE_INSN_STOB_DISP, I960BASE_SFMT_ST_DISP },
+  { I960_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP },
+  { I960_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP },
+  { I960_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP },
+  { I960_INSN_STOS_OFFSET, I960BASE_INSN_STOS_OFFSET, I960BASE_SFMT_ST_OFFSET },
+  { I960_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET },
+  { I960_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT, I960BASE_SFMT_ST_INDIRECT },
+  { I960_INSN_STOS_INDIRECT_INDEX, I960BASE_INSN_STOS_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX },
+  { I960_INSN_STOS_DISP, I960BASE_INSN_STOS_DISP, I960BASE_SFMT_ST_DISP },
+  { I960_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP },
+  { I960_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP },
+  { I960_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP },
+  { I960_INSN_STL_OFFSET, I960BASE_INSN_STL_OFFSET, I960BASE_SFMT_STL_OFFSET },
+  { I960_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET },
+  { I960_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT },
+  { I960_INSN_STL_INDIRECT_INDEX, I960BASE_INSN_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_INDIRECT_INDEX },
+  { I960_INSN_STL_DISP, I960BASE_INSN_STL_DISP, I960BASE_SFMT_STL_DISP },
+  { I960_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_SFMT_STL_INDIRECT_DISP },
+  { I960_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_SFMT_STL_INDEX_DISP },
+  { I960_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP },
+  { I960_INSN_STT_OFFSET, I960BASE_INSN_STT_OFFSET, I960BASE_SFMT_STT_OFFSET },
+  { I960_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET },
+  { I960_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT },
+  { I960_INSN_STT_INDIRECT_INDEX, I960BASE_INSN_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_INDIRECT_INDEX },
+  { I960_INSN_STT_DISP, I960BASE_INSN_STT_DISP, I960BASE_SFMT_STT_DISP },
+  { I960_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP },
+  { I960_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_SFMT_STT_INDEX_DISP },
+  { I960_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP },
+  { I960_INSN_STQ_OFFSET, I960BASE_INSN_STQ_OFFSET, I960BASE_SFMT_STQ_OFFSET },
+  { I960_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET },
+  { I960_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT },
+  { I960_INSN_STQ_INDIRECT_INDEX, I960BASE_INSN_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_INDIRECT_INDEX },
+  { I960_INSN_STQ_DISP, I960BASE_INSN_STQ_DISP, I960BASE_SFMT_STQ_DISP },
+  { I960_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP },
+  { I960_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDEX_DISP },
+  { I960_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP },
+  { I960_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBE_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPOBNE_LIT, I960BASE_INSN_CMPOBNE_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_REG, I960BASE_SFMT_CMPOBL_REG },
+  { I960_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBL_LIT, I960BASE_SFMT_CMPOBL_LIT },
+  { I960_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_REG, I960BASE_SFMT_CMPOBL_REG },
+  { I960_INSN_CMPOBLE_LIT, I960BASE_INSN_CMPOBLE_LIT, I960BASE_SFMT_CMPOBL_LIT },
+  { I960_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_REG, I960BASE_SFMT_CMPOBL_REG },
+  { I960_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBG_LIT, I960BASE_SFMT_CMPOBL_LIT },
+  { I960_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_REG, I960BASE_SFMT_CMPOBL_REG },
+  { I960_INSN_CMPOBGE_LIT, I960BASE_INSN_CMPOBGE_LIT, I960BASE_SFMT_CMPOBL_LIT },
+  { I960_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBE_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPIBNE_LIT, I960BASE_INSN_CMPIBNE_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBL_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPIBLE_LIT, I960BASE_INSN_CMPIBLE_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBG_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_REG, I960BASE_SFMT_CMPOBE_REG },
+  { I960_INSN_CMPIBGE_LIT, I960BASE_INSN_CMPIBGE_LIT, I960BASE_SFMT_CMPOBE_LIT },
+  { I960_INSN_BBC_REG, I960BASE_INSN_BBC_REG, I960BASE_SFMT_BBC_REG },
+  { I960_INSN_BBC_LIT, I960BASE_INSN_BBC_LIT, I960BASE_SFMT_BBC_LIT },
+  { I960_INSN_BBS_REG, I960BASE_INSN_BBS_REG, I960BASE_SFMT_BBC_REG },
+  { I960_INSN_BBS_LIT, I960BASE_INSN_BBS_LIT, I960BASE_SFMT_BBC_LIT },
+  { I960_INSN_CMPI, I960BASE_INSN_CMPI, I960BASE_SFMT_CMPI },
+  { I960_INSN_CMPI1, I960BASE_INSN_CMPI1, I960BASE_SFMT_CMPI1 },
+  { I960_INSN_CMPI2, I960BASE_INSN_CMPI2, I960BASE_SFMT_CMPI2 },
+  { I960_INSN_CMPI3, I960BASE_INSN_CMPI3, I960BASE_SFMT_CMPI3 },
+  { I960_INSN_CMPO, I960BASE_INSN_CMPO, I960BASE_SFMT_CMPO },
+  { I960_INSN_CMPO1, I960BASE_INSN_CMPO1, I960BASE_SFMT_CMPO1 },
+  { I960_INSN_CMPO2, I960BASE_INSN_CMPO2, I960BASE_SFMT_CMPO2 },
+  { I960_INSN_CMPO3, I960BASE_INSN_CMPO3, I960BASE_SFMT_CMPO3 },
+  { I960_INSN_TESTNO_REG, I960BASE_INSN_TESTNO_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTG_REG, I960BASE_INSN_TESTG_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTE_REG, I960BASE_INSN_TESTE_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTGE_REG, I960BASE_INSN_TESTGE_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTL_REG, I960BASE_INSN_TESTL_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTNE_REG, I960BASE_INSN_TESTNE_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTLE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_TESTO_REG, I960BASE_INSN_TESTO_REG, I960BASE_SFMT_TESTNO_REG },
+  { I960_INSN_BNO, I960BASE_INSN_BNO, I960BASE_SFMT_BNO },
+  { I960_INSN_BG, I960BASE_INSN_BG, I960BASE_SFMT_BNO },
+  { I960_INSN_BE, I960BASE_INSN_BE, I960BASE_SFMT_BNO },
+  { I960_INSN_BGE, I960BASE_INSN_BGE, I960BASE_SFMT_BNO },
+  { I960_INSN_BL, I960BASE_INSN_BL, I960BASE_SFMT_BNO },
+  { I960_INSN_BNE, I960BASE_INSN_BNE, I960BASE_SFMT_BNO },
+  { I960_INSN_BLE, I960BASE_INSN_BLE, I960BASE_SFMT_BNO },
+  { I960_INSN_BO, I960BASE_INSN_BO, I960BASE_SFMT_BNO },
+  { I960_INSN_B, I960BASE_INSN_B, I960BASE_SFMT_B },
+  { I960_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_SFMT_BX_INDIRECT_OFFSET },
+  { I960_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT },
+  { I960_INSN_BX_INDIRECT_INDEX, I960BASE_INSN_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_INDIRECT_INDEX },
+  { I960_INSN_BX_DISP, I960BASE_INSN_BX_DISP, I960BASE_SFMT_BX_DISP },
+  { I960_INSN_BX_INDIRECT_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_SFMT_BX_INDIRECT_DISP },
+  { I960_INSN_CALLX_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_SFMT_CALLX_DISP },
+  { I960_INSN_CALLX_INDIRECT, I960BASE_INSN_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT },
+  { I960_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_CALLX_INDIRECT_OFFSET },
+  { I960_INSN_RET, I960BASE_INSN_RET, I960BASE_SFMT_RET },
+  { I960_INSN_CALLS, I960BASE_INSN_CALLS, I960BASE_SFMT_CALLS },
+  { I960_INSN_FMARK, I960BASE_INSN_FMARK, I960BASE_SFMT_FMARK },
+  { I960_INSN_FLUSHREG, I960BASE_INSN_FLUSHREG, I960BASE_SFMT_FLUSHREG },
 };
 
-static const struct insn_sem i960base_insn_sem_invalid =
-{
-  VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid)
+static const struct insn_sem i960base_insn_sem_invalid = {
+  VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY
 };
 
-#undef FMT
-#undef FULL
-#undef FAST
-#undef IDX
-#undef TYPE
-
 /* Initialize an IDESC from the compile-time computable parts.  */
 
 static INLINE void
@@ -381,6 +351,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
   const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
 
   id->num = t->index;
+  id->sfmt = t->sfmt;
   if ((int) t->type <= 0)
     id->idata = & cgen_virtual_insn_table[- (int) t->type];
   else
@@ -388,12 +359,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
   id->attrs = CGEN_INSN_ATTRS (id->idata);
   /* Oh my god, a magic number.  */
   id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-#if ! WITH_SEM_SWITCH_FULL
-  id->sem_full = t->sem_full;
-#endif
-#if WITH_FAST && ! WITH_SEM_SWITCH_FAST
-  id->sem_fast = t->sem_fast;
-#endif
+
 #if WITH_PROFILE_MODEL_P
   id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
   {
@@ -401,6 +367,8 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
     SIM_ASSERT (t->index == id->timing->num);
   }
 #endif
+
+  /* Semantic pointers are initialized elsewhere.  */
 }
 
 /* Initialize the instruction descriptor table.  */
@@ -448,32 +416,32 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
       unsigned int val = (((insn >> 24) & (255 << 0)));
       switch (val)
       {
-      case 8 : itype = I960BASE_INSN_B; goto extract_fmt_b;
-      case 10 : itype = I960BASE_INSN_RET; goto extract_fmt_ret;
-      case 16 : itype = I960BASE_INSN_BNO; goto extract_fmt_bno;
-      case 17 : itype = I960BASE_INSN_BG; goto extract_fmt_bno;
-      case 18 : itype = I960BASE_INSN_BE; goto extract_fmt_bno;
-      case 19 : itype = I960BASE_INSN_BGE; goto extract_fmt_bno;
-      case 20 : itype = I960BASE_INSN_BL; goto extract_fmt_bno;
-      case 21 : itype = I960BASE_INSN_BNE; goto extract_fmt_bno;
-      case 22 : itype = I960BASE_INSN_BLE; goto extract_fmt_bno;
-      case 23 : itype = I960BASE_INSN_BO; goto extract_fmt_bno;
-      case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_fmt_testno_reg;
-      case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_fmt_testno_reg;
-      case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_fmt_testno_reg;
-      case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_fmt_testno_reg;
-      case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_fmt_testno_reg;
-      case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_fmt_testno_reg;
-      case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_fmt_testno_reg;
-      case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_fmt_testno_reg;
+      case 8 : itype = I960BASE_INSN_B; goto extract_sfmt_b;
+      case 10 : itype = I960BASE_INSN_RET; goto extract_sfmt_ret;
+      case 16 : itype = I960BASE_INSN_BNO; goto extract_sfmt_bno;
+      case 17 : itype = I960BASE_INSN_BG; goto extract_sfmt_bno;
+      case 18 : itype = I960BASE_INSN_BE; goto extract_sfmt_bno;
+      case 19 : itype = I960BASE_INSN_BGE; goto extract_sfmt_bno;
+      case 20 : itype = I960BASE_INSN_BL; goto extract_sfmt_bno;
+      case 21 : itype = I960BASE_INSN_BNE; goto extract_sfmt_bno;
+      case 22 : itype = I960BASE_INSN_BLE; goto extract_sfmt_bno;
+      case 23 : itype = I960BASE_INSN_BO; goto extract_sfmt_bno;
+      case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_sfmt_testno_reg;
+      case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_sfmt_testno_reg;
+      case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_sfmt_testno_reg;
+      case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_sfmt_testno_reg;
+      case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_sfmt_testno_reg;
+      case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_sfmt_testno_reg;
+      case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_sfmt_testno_reg;
+      case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_sfmt_testno_reg;
       case 48 :
         {
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_fmt_bbc_reg;
-          case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_fmt_bbc_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_sfmt_bbc_reg;
+          case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_sfmt_bbc_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 49 :
@@ -481,9 +449,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_fmt_cmpobl_reg;
-          case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_fmt_cmpobl_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_sfmt_cmpobl_reg;
+          case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_sfmt_cmpobl_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 50 :
@@ -491,9 +459,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 51 :
@@ -501,9 +469,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_fmt_cmpobl_reg;
-          case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_fmt_cmpobl_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_sfmt_cmpobl_reg;
+          case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_sfmt_cmpobl_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 52 :
@@ -511,9 +479,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_fmt_cmpobl_reg;
-          case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_fmt_cmpobl_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_sfmt_cmpobl_reg;
+          case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_sfmt_cmpobl_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 53 :
@@ -521,9 +489,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 54 :
@@ -531,9 +499,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_fmt_cmpobl_reg;
-          case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_fmt_cmpobl_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_sfmt_cmpobl_reg;
+          case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_sfmt_cmpobl_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 55 :
@@ -541,9 +509,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_fmt_bbc_reg;
-          case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_fmt_bbc_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_sfmt_bbc_reg;
+          case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_sfmt_bbc_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 57 :
@@ -551,9 +519,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 58 :
@@ -561,9 +529,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 59 :
@@ -571,9 +539,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 60 :
@@ -581,9 +549,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 61 :
@@ -591,9 +559,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 62 :
@@ -601,9 +569,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_fmt_cmpobe_reg;
-          case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_fmt_cmpobe_lit;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_sfmt_cmpobe_reg;
+          case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_sfmt_cmpobe_lit;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 88 :
@@ -616,14 +584,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_fmt_notbit;
-              case 2 : itype = I960BASE_INSN_AND; goto extract_fmt_mulo;
-              case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_fmt_mulo;
-              case 6 : itype = I960BASE_INSN_SETBIT; goto extract_fmt_notbit;
-              case 8 : itype = I960BASE_INSN_NOTAND; goto extract_fmt_mulo;
-              case 12 : itype = I960BASE_INSN_XOR; goto extract_fmt_mulo;
-              case 14 : itype = I960BASE_INSN_OR; goto extract_fmt_mulo;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_sfmt_notbit;
+              case 2 : itype = I960BASE_INSN_AND; goto extract_sfmt_mulo;
+              case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_sfmt_mulo;
+              case 6 : itype = I960BASE_INSN_SETBIT; goto extract_sfmt_notbit;
+              case 8 : itype = I960BASE_INSN_NOTAND; goto extract_sfmt_mulo;
+              case 12 : itype = I960BASE_INSN_XOR; goto extract_sfmt_mulo;
+              case 14 : itype = I960BASE_INSN_OR; goto extract_sfmt_mulo;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 1 :
@@ -631,12 +599,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOR; goto extract_fmt_mulo;
-              case 2 : itype = I960BASE_INSN_XNOR; goto extract_fmt_mulo;
-              case 4 : itype = I960BASE_INSN_NOT; goto extract_fmt_not;
-              case 6 : itype = I960BASE_INSN_ORNOT; goto extract_fmt_mulo;
-              case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_fmt_notbit;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOR; goto extract_sfmt_mulo;
+              case 2 : itype = I960BASE_INSN_XNOR; goto extract_sfmt_mulo;
+              case 4 : itype = I960BASE_INSN_NOT; goto extract_sfmt_not;
+              case 6 : itype = I960BASE_INSN_ORNOT; goto extract_sfmt_mulo;
+              case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_sfmt_notbit;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 2 :
@@ -644,14 +612,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_fmt_notbit1;
-              case 2 : itype = I960BASE_INSN_AND1; goto extract_fmt_mulo1;
-              case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_fmt_mulo1;
-              case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_fmt_notbit1;
-              case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_fmt_mulo1;
-              case 12 : itype = I960BASE_INSN_XOR1; goto extract_fmt_mulo1;
-              case 14 : itype = I960BASE_INSN_OR1; goto extract_fmt_mulo1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_sfmt_notbit1;
+              case 2 : itype = I960BASE_INSN_AND1; goto extract_sfmt_mulo1;
+              case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_sfmt_mulo1;
+              case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_sfmt_notbit1;
+              case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_sfmt_mulo1;
+              case 12 : itype = I960BASE_INSN_XOR1; goto extract_sfmt_mulo1;
+              case 14 : itype = I960BASE_INSN_OR1; goto extract_sfmt_mulo1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 3 :
@@ -659,12 +627,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOR1; goto extract_fmt_mulo1;
-              case 2 : itype = I960BASE_INSN_XNOR1; goto extract_fmt_mulo1;
-              case 4 : itype = I960BASE_INSN_NOT1; goto extract_fmt_not1;
-              case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_fmt_mulo1;
-              case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_fmt_notbit1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOR1; goto extract_sfmt_mulo1;
+              case 2 : itype = I960BASE_INSN_XNOR1; goto extract_sfmt_mulo1;
+              case 4 : itype = I960BASE_INSN_NOT1; goto extract_sfmt_not1;
+              case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_sfmt_mulo1;
+              case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_sfmt_notbit1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 4 :
@@ -672,14 +640,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_fmt_notbit2;
-              case 2 : itype = I960BASE_INSN_AND2; goto extract_fmt_mulo2;
-              case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_fmt_mulo2;
-              case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_fmt_notbit2;
-              case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_fmt_mulo2;
-              case 12 : itype = I960BASE_INSN_XOR2; goto extract_fmt_mulo2;
-              case 14 : itype = I960BASE_INSN_OR2; goto extract_fmt_mulo2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_sfmt_notbit2;
+              case 2 : itype = I960BASE_INSN_AND2; goto extract_sfmt_mulo2;
+              case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_sfmt_mulo2;
+              case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_sfmt_notbit2;
+              case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_sfmt_mulo2;
+              case 12 : itype = I960BASE_INSN_XOR2; goto extract_sfmt_mulo2;
+              case 14 : itype = I960BASE_INSN_OR2; goto extract_sfmt_mulo2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 5 :
@@ -687,12 +655,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOR2; goto extract_fmt_mulo2;
-              case 2 : itype = I960BASE_INSN_XNOR2; goto extract_fmt_mulo2;
-              case 4 : itype = I960BASE_INSN_NOT2; goto extract_fmt_not2;
-              case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_fmt_mulo2;
-              case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_fmt_notbit2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOR2; goto extract_sfmt_mulo2;
+              case 2 : itype = I960BASE_INSN_XNOR2; goto extract_sfmt_mulo2;
+              case 4 : itype = I960BASE_INSN_NOT2; goto extract_sfmt_not;
+              case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_sfmt_mulo2;
+              case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_sfmt_notbit2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 6 :
@@ -700,14 +668,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_fmt_notbit3;
-              case 2 : itype = I960BASE_INSN_AND3; goto extract_fmt_mulo3;
-              case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_fmt_mulo3;
-              case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_fmt_notbit3;
-              case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_fmt_mulo3;
-              case 12 : itype = I960BASE_INSN_XOR3; goto extract_fmt_mulo3;
-              case 14 : itype = I960BASE_INSN_OR3; goto extract_fmt_mulo3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_sfmt_notbit3;
+              case 2 : itype = I960BASE_INSN_AND3; goto extract_sfmt_mulo3;
+              case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_sfmt_mulo3;
+              case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_sfmt_notbit3;
+              case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_sfmt_mulo3;
+              case 12 : itype = I960BASE_INSN_XOR3; goto extract_sfmt_mulo3;
+              case 14 : itype = I960BASE_INSN_OR3; goto extract_sfmt_mulo3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 7 :
@@ -715,15 +683,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_NOR3; goto extract_fmt_mulo3;
-              case 2 : itype = I960BASE_INSN_XNOR3; goto extract_fmt_mulo3;
-              case 4 : itype = I960BASE_INSN_NOT3; goto extract_fmt_not3;
-              case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_fmt_mulo3;
-              case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_fmt_notbit3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_NOR3; goto extract_sfmt_mulo3;
+              case 2 : itype = I960BASE_INSN_XNOR3; goto extract_sfmt_mulo3;
+              case 4 : itype = I960BASE_INSN_NOT3; goto extract_sfmt_not1;
+              case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_sfmt_mulo3;
+              case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_sfmt_notbit3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 89 :
@@ -736,9 +704,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_ADDO; goto extract_fmt_mulo;
-              case 4 : itype = I960BASE_INSN_SUBO; goto extract_fmt_mulo;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_ADDO; goto extract_sfmt_mulo;
+              case 4 : itype = I960BASE_INSN_SUBO; goto extract_sfmt_mulo;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 1 :
@@ -746,11 +714,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_SHRO; goto extract_fmt_shlo;
-              case 6 : itype = I960BASE_INSN_SHRI; goto extract_fmt_shlo;
-              case 8 : itype = I960BASE_INSN_SHLO; goto extract_fmt_shlo;
-              case 12 : itype = I960BASE_INSN_SHLI; goto extract_fmt_shlo;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_SHRO; goto extract_sfmt_shlo;
+              case 6 : itype = I960BASE_INSN_SHRI; goto extract_sfmt_shlo;
+              case 8 : itype = I960BASE_INSN_SHLO; goto extract_sfmt_shlo;
+              case 12 : itype = I960BASE_INSN_SHLI; goto extract_sfmt_shlo;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 2 :
@@ -758,9 +726,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_ADDO1; goto extract_fmt_mulo1;
-              case 4 : itype = I960BASE_INSN_SUBO1; goto extract_fmt_mulo1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_ADDO1; goto extract_sfmt_mulo1;
+              case 4 : itype = I960BASE_INSN_SUBO1; goto extract_sfmt_mulo1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 3 :
@@ -768,11 +736,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_SHRO1; goto extract_fmt_shlo1;
-              case 6 : itype = I960BASE_INSN_SHRI1; goto extract_fmt_shlo1;
-              case 8 : itype = I960BASE_INSN_SHLO1; goto extract_fmt_shlo1;
-              case 12 : itype = I960BASE_INSN_SHLI1; goto extract_fmt_shlo1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_SHRO1; goto extract_sfmt_shlo1;
+              case 6 : itype = I960BASE_INSN_SHRI1; goto extract_sfmt_shlo1;
+              case 8 : itype = I960BASE_INSN_SHLO1; goto extract_sfmt_shlo1;
+              case 12 : itype = I960BASE_INSN_SHLI1; goto extract_sfmt_shlo1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 4 :
@@ -780,9 +748,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_ADDO2; goto extract_fmt_mulo2;
-              case 4 : itype = I960BASE_INSN_SUBO2; goto extract_fmt_mulo2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_ADDO2; goto extract_sfmt_mulo2;
+              case 4 : itype = I960BASE_INSN_SUBO2; goto extract_sfmt_mulo2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 5 :
@@ -790,11 +758,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_SHRO2; goto extract_fmt_shlo2;
-              case 6 : itype = I960BASE_INSN_SHRI2; goto extract_fmt_shlo2;
-              case 8 : itype = I960BASE_INSN_SHLO2; goto extract_fmt_shlo2;
-              case 12 : itype = I960BASE_INSN_SHLI2; goto extract_fmt_shlo2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_SHRO2; goto extract_sfmt_shlo2;
+              case 6 : itype = I960BASE_INSN_SHRI2; goto extract_sfmt_shlo2;
+              case 8 : itype = I960BASE_INSN_SHLO2; goto extract_sfmt_shlo2;
+              case 12 : itype = I960BASE_INSN_SHLI2; goto extract_sfmt_shlo2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 6 :
@@ -802,9 +770,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_ADDO3; goto extract_fmt_mulo3;
-              case 4 : itype = I960BASE_INSN_SUBO3; goto extract_fmt_mulo3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_ADDO3; goto extract_sfmt_mulo3;
+              case 4 : itype = I960BASE_INSN_SUBO3; goto extract_sfmt_mulo3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 7 :
@@ -812,14 +780,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_SHRO3; goto extract_fmt_shlo3;
-              case 6 : itype = I960BASE_INSN_SHRI3; goto extract_fmt_shlo3;
-              case 8 : itype = I960BASE_INSN_SHLO3; goto extract_fmt_shlo3;
-              case 12 : itype = I960BASE_INSN_SHLI3; goto extract_fmt_shlo3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_SHRO3; goto extract_sfmt_shlo3;
+              case 6 : itype = I960BASE_INSN_SHRI3; goto extract_sfmt_shlo3;
+              case 8 : itype = I960BASE_INSN_SHLO3; goto extract_sfmt_shlo3;
+              case 12 : itype = I960BASE_INSN_SHLI3; goto extract_sfmt_shlo3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 90 :
@@ -832,9 +800,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_CMPO; goto extract_fmt_cmpo;
-              case 2 : itype = I960BASE_INSN_CMPI; goto extract_fmt_cmpi;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_CMPO; goto extract_sfmt_cmpo;
+              case 2 : itype = I960BASE_INSN_CMPI; goto extract_sfmt_cmpi;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 10 :
@@ -842,9 +810,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_CMPO1; goto extract_fmt_cmpo1;
-              case 2 : itype = I960BASE_INSN_CMPI1; goto extract_fmt_cmpi1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_CMPO1; goto extract_sfmt_cmpo1;
+              case 2 : itype = I960BASE_INSN_CMPI1; goto extract_sfmt_cmpi1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 12 :
@@ -852,9 +820,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_CMPO2; goto extract_fmt_cmpo2;
-              case 2 : itype = I960BASE_INSN_CMPI2; goto extract_fmt_cmpi2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_CMPO2; goto extract_sfmt_cmpo2;
+              case 2 : itype = I960BASE_INSN_CMPI2; goto extract_sfmt_cmpi2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 14 :
@@ -862,12 +830,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_CMPO3; goto extract_fmt_cmpo3;
-              case 2 : itype = I960BASE_INSN_CMPI3; goto extract_fmt_cmpi3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_CMPO3; goto extract_sfmt_cmpo3;
+              case 2 : itype = I960BASE_INSN_CMPI3; goto extract_sfmt_cmpi3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 92 :
@@ -875,9 +843,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 5 : itype = I960BASE_INSN_MOV; goto extract_fmt_not2;
-          case 7 : itype = I960BASE_INSN_MOV1; goto extract_fmt_not3;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 5 : itype = I960BASE_INSN_MOV; goto extract_sfmt_not;
+          case 7 : itype = I960BASE_INSN_MOV1; goto extract_sfmt_not1;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 93 :
@@ -885,9 +853,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 5 : itype = I960BASE_INSN_MOVL; goto extract_fmt_movl;
-          case 7 : itype = I960BASE_INSN_MOVL1; goto extract_fmt_movl1;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 5 : itype = I960BASE_INSN_MOVL; goto extract_sfmt_movl;
+          case 7 : itype = I960BASE_INSN_MOVL1; goto extract_sfmt_movl1;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 94 :
@@ -895,9 +863,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 5 : itype = I960BASE_INSN_MOVT; goto extract_fmt_movt;
-          case 7 : itype = I960BASE_INSN_MOVT1; goto extract_fmt_movt1;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 5 : itype = I960BASE_INSN_MOVT; goto extract_sfmt_movt;
+          case 7 : itype = I960BASE_INSN_MOVT1; goto extract_sfmt_movt1;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 95 :
@@ -905,30 +873,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 5 : itype = I960BASE_INSN_MOVQ; goto extract_fmt_movq;
-          case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_fmt_movq1;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 5 : itype = I960BASE_INSN_MOVQ; goto extract_sfmt_movq;
+          case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_sfmt_movq1;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 100 : itype = I960BASE_INSN_MODAC; goto extract_fmt_modpc;
-      case 101 : itype = I960BASE_INSN_MODPC; goto extract_fmt_modpc;
+      case 100 : itype = I960BASE_INSN_MODAC; goto extract_sfmt_modpc;
+      case 101 : itype = I960BASE_INSN_MODPC; goto extract_sfmt_modpc;
       case 102 :
         {
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 12 : itype = I960BASE_INSN_CALLS; goto extract_fmt_calls;
+          case 12 : itype = I960BASE_INSN_CALLS; goto extract_sfmt_calls;
           case 15 :
             {
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 8 : itype = I960BASE_INSN_FMARK; goto extract_fmt_fmark;
-              case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_fmt_flushreg;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 8 : itype = I960BASE_INSN_FMARK; goto extract_sfmt_fmark;
+              case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_sfmt_flushreg;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 103 :
@@ -936,11 +904,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_EMUL; goto extract_fmt_emul;
-          case 2 : itype = I960BASE_INSN_EMUL1; goto extract_fmt_emul1;
-          case 4 : itype = I960BASE_INSN_EMUL2; goto extract_fmt_emul2;
-          case 6 : itype = I960BASE_INSN_EMUL3; goto extract_fmt_emul3;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = I960BASE_INSN_EMUL; goto extract_sfmt_emul;
+          case 2 : itype = I960BASE_INSN_EMUL1; goto extract_sfmt_emul1;
+          case 4 : itype = I960BASE_INSN_EMUL2; goto extract_sfmt_emul2;
+          case 6 : itype = I960BASE_INSN_EMUL3; goto extract_sfmt_emul3;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 112 :
@@ -948,51 +916,51 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = I960BASE_INSN_MULO; goto extract_fmt_mulo;
+          case 0 : itype = I960BASE_INSN_MULO; goto extract_sfmt_mulo;
           case 1 :
             {
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMO; goto extract_fmt_mulo;
-              case 6 : itype = I960BASE_INSN_DIVO; goto extract_fmt_mulo;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMO; goto extract_sfmt_mulo;
+              case 6 : itype = I960BASE_INSN_DIVO; goto extract_sfmt_mulo;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          case 2 : itype = I960BASE_INSN_MULO1; goto extract_fmt_mulo1;
+          case 2 : itype = I960BASE_INSN_MULO1; goto extract_sfmt_mulo1;
           case 3 :
             {
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMO1; goto extract_fmt_mulo1;
-              case 6 : itype = I960BASE_INSN_DIVO1; goto extract_fmt_mulo1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMO1; goto extract_sfmt_mulo1;
+              case 6 : itype = I960BASE_INSN_DIVO1; goto extract_sfmt_mulo1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          case 4 : itype = I960BASE_INSN_MULO2; goto extract_fmt_mulo2;
+          case 4 : itype = I960BASE_INSN_MULO2; goto extract_sfmt_mulo2;
           case 5 :
             {
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMO2; goto extract_fmt_mulo2;
-              case 6 : itype = I960BASE_INSN_DIVO2; goto extract_fmt_mulo2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMO2; goto extract_sfmt_mulo2;
+              case 6 : itype = I960BASE_INSN_DIVO2; goto extract_sfmt_mulo2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          case 6 : itype = I960BASE_INSN_MULO3; goto extract_fmt_mulo3;
+          case 6 : itype = I960BASE_INSN_MULO3; goto extract_sfmt_mulo3;
           case 7 :
             {
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMO3; goto extract_fmt_mulo3;
-              case 6 : itype = I960BASE_INSN_DIVO3; goto extract_fmt_mulo3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMO3; goto extract_sfmt_mulo3;
+              case 6 : itype = I960BASE_INSN_DIVO3; goto extract_sfmt_mulo3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 116 :
@@ -1005,9 +973,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMI; goto extract_fmt_mulo;
-              case 6 : itype = I960BASE_INSN_DIVI; goto extract_fmt_mulo;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMI; goto extract_sfmt_mulo;
+              case 6 : itype = I960BASE_INSN_DIVI; goto extract_sfmt_mulo;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 3 :
@@ -1015,9 +983,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMI1; goto extract_fmt_mulo1;
-              case 6 : itype = I960BASE_INSN_DIVI1; goto extract_fmt_mulo1;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMI1; goto extract_sfmt_mulo1;
+              case 6 : itype = I960BASE_INSN_DIVI1; goto extract_sfmt_mulo1;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 5 :
@@ -1025,9 +993,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMI2; goto extract_fmt_mulo2;
-              case 6 : itype = I960BASE_INSN_DIVI2; goto extract_fmt_mulo2;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMI2; goto extract_sfmt_mulo2;
+              case 6 : itype = I960BASE_INSN_DIVI2; goto extract_sfmt_mulo2;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 7 :
@@ -1035,12 +1003,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
               unsigned int val = (((insn >> 6) & (15 << 0)));
               switch (val)
               {
-              case 0 : itype = I960BASE_INSN_REMI3; goto extract_fmt_mulo3;
-              case 6 : itype = I960BASE_INSN_DIVI3; goto extract_fmt_mulo3;
-              default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+              case 0 : itype = I960BASE_INSN_REMI3; goto extract_sfmt_mulo3;
+              case 6 : itype = I960BASE_INSN_DIVI3; goto extract_sfmt_mulo3;
+              default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 128 :
@@ -1051,18 +1019,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_fmt_ldob_offset;
-          case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_fmt_ldob_indirect;
-          case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_fmt_ldob_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_sfmt_ld_offset;
+          case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_sfmt_ld_indirect;
+          case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_fmt_ldob_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_fmt_ldob_disp;
-          case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_fmt_ldob_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_fmt_ldob_index_disp;
-          case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_fmt_ldob_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_sfmt_ld_disp;
+          case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_sfmt_ld_index_disp;
+          case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 130 :
@@ -1073,18 +1041,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_fmt_stob_offset;
-          case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_fmt_stob_indirect;
-          case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_fmt_stob_indirect_index;
+          case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_sfmt_st_offset;
+          case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_sfmt_st_indirect;
+          case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_fmt_stob_indirect_offset;
-          case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_fmt_stob_disp;
-          case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_fmt_stob_indirect_disp;
-          case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_fmt_stob_index_disp;
-          case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_fmt_stob_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset;
+          case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_sfmt_st_disp;
+          case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp;
+          case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_sfmt_st_index_disp;
+          case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 132 :
@@ -1092,15 +1060,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_fmt_bx_indirect;
-          case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_fmt_bx_indirect_index;
+          case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_sfmt_bx_indirect;
+          case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_sfmt_bx_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_fmt_bx_indirect_offset;
-          case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_fmt_bx_disp;
-          case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_fmt_bx_indirect_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_sfmt_bx_indirect_offset;
+          case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_sfmt_bx_disp;
+          case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_sfmt_bx_indirect_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 134 :
@@ -1108,13 +1076,13 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 10) & (15 << 0)));
           switch (val)
           {
-          case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_fmt_callx_indirect;
+          case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_sfmt_callx_indirect;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_fmt_callx_indirect_offset;
-          case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_fmt_callx_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_sfmt_callx_indirect_offset;
+          case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_sfmt_callx_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 136 :
@@ -1125,18 +1093,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_fmt_ldos_offset;
-          case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_fmt_ldos_indirect;
-          case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_fmt_ldos_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_sfmt_ld_offset;
+          case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_sfmt_ld_indirect;
+          case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_fmt_ldos_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_fmt_ldos_disp;
-          case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_fmt_ldos_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_fmt_ldos_index_disp;
-          case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_fmt_ldos_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_sfmt_ld_disp;
+          case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_sfmt_ld_index_disp;
+          case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 138 :
@@ -1147,18 +1115,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_fmt_stos_offset;
-          case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_fmt_stos_indirect;
-          case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_fmt_stos_indirect_index;
+          case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_sfmt_st_offset;
+          case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_sfmt_st_indirect;
+          case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_fmt_stos_indirect_offset;
-          case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_fmt_stos_disp;
-          case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_fmt_stos_indirect_disp;
-          case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_fmt_stos_index_disp;
-          case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_fmt_stos_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset;
+          case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_sfmt_st_disp;
+          case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp;
+          case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_sfmt_st_index_disp;
+          case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 140 :
@@ -1169,18 +1137,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_fmt_lda_offset;
-          case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_fmt_lda_indirect;
-          case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_fmt_lda_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_sfmt_lda_offset;
+          case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_sfmt_lda_indirect;
+          case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_sfmt_lda_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_fmt_lda_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_fmt_lda_disp;
-          case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_fmt_lda_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_fmt_lda_index_disp;
-          case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_fmt_lda_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_sfmt_lda_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_sfmt_lda_disp;
+          case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_sfmt_lda_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_sfmt_lda_index_disp;
+          case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_sfmt_lda_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 144 :
@@ -1191,18 +1159,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_fmt_ld_offset;
-          case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_fmt_ld_indirect;
-          case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_fmt_ld_indirect_index;
+          case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_sfmt_ld_offset;
+          case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_sfmt_ld_indirect;
+          case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_fmt_ld_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_fmt_ld_disp;
-          case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_fmt_ld_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_fmt_ld_index_disp;
-          case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_fmt_ld_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_sfmt_ld_disp;
+          case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_sfmt_ld_index_disp;
+          case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 146 :
@@ -1213,18 +1181,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_fmt_st_offset;
-          case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_fmt_st_indirect;
-          case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_fmt_st_indirect_index;
+          case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_sfmt_st_offset;
+          case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_sfmt_st_indirect;
+          case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_fmt_st_indirect_offset;
-          case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_fmt_st_disp;
-          case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_fmt_st_indirect_disp;
-          case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_fmt_st_index_disp;
-          case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_fmt_st_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset;
+          case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_sfmt_st_disp;
+          case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp;
+          case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_sfmt_st_index_disp;
+          case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 152 :
@@ -1235,18 +1203,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_fmt_ldl_offset;
-          case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_fmt_ldl_indirect;
-          case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_fmt_ldl_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_sfmt_ldl_offset;
+          case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_sfmt_ldl_indirect;
+          case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_sfmt_ldl_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_fmt_ldl_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_fmt_ldl_disp;
-          case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_fmt_ldl_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_fmt_ldl_index_disp;
-          case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_fmt_ldl_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_sfmt_ldl_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_sfmt_ldl_disp;
+          case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_sfmt_ldl_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_sfmt_ldl_index_disp;
+          case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_sfmt_ldl_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 154 :
@@ -1257,18 +1225,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_fmt_stl_offset;
-          case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_fmt_stl_indirect;
-          case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_fmt_stl_indirect_index;
+          case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_sfmt_stl_offset;
+          case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_sfmt_stl_indirect;
+          case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_sfmt_stl_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_fmt_stl_indirect_offset;
-          case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_fmt_stl_disp;
-          case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_fmt_stl_indirect_disp;
-          case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_fmt_stl_index_disp;
-          case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_fmt_stl_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_sfmt_stl_indirect_offset;
+          case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_sfmt_stl_disp;
+          case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_sfmt_stl_indirect_disp;
+          case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_sfmt_stl_index_disp;
+          case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_sfmt_stl_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 160 :
@@ -1279,18 +1247,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_fmt_ldt_offset;
-          case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_fmt_ldt_indirect;
-          case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_fmt_ldt_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_sfmt_ldt_offset;
+          case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_sfmt_ldt_indirect;
+          case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_sfmt_ldt_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_fmt_ldt_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_fmt_ldt_disp;
-          case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_fmt_ldt_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_fmt_ldt_index_disp;
-          case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_fmt_ldt_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_sfmt_ldt_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_sfmt_ldt_disp;
+          case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_sfmt_ldt_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_sfmt_ldt_index_disp;
+          case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_sfmt_ldt_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 162 :
@@ -1301,18 +1269,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_fmt_stt_offset;
-          case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_fmt_stt_indirect;
-          case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_fmt_stt_indirect_index;
+          case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_sfmt_stt_offset;
+          case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_sfmt_stt_indirect;
+          case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_sfmt_stt_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_fmt_stt_indirect_offset;
-          case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_fmt_stt_disp;
-          case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_fmt_stt_indirect_disp;
-          case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_fmt_stt_index_disp;
-          case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_fmt_stt_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_sfmt_stt_indirect_offset;
+          case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_sfmt_stt_disp;
+          case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_sfmt_stt_indirect_disp;
+          case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_sfmt_stt_index_disp;
+          case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_sfmt_stt_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 176 :
@@ -1323,18 +1291,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_fmt_ldq_offset;
-          case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_fmt_ldq_indirect;
-          case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_fmt_ldq_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_sfmt_ldq_offset;
+          case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_sfmt_ldq_indirect;
+          case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_sfmt_ldq_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_fmt_ldq_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_fmt_ldq_disp;
-          case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_fmt_ldq_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_fmt_ldq_index_disp;
-          case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_fmt_ldq_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_sfmt_ldq_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_sfmt_ldq_disp;
+          case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_sfmt_ldq_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_sfmt_ldq_index_disp;
+          case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_sfmt_ldq_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 178 :
@@ -1345,18 +1313,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_fmt_stq_offset;
-          case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_fmt_stq_indirect;
-          case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_fmt_stq_indirect_index;
+          case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_sfmt_stq_offset;
+          case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_sfmt_stq_indirect;
+          case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_sfmt_stq_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_fmt_stq_indirect_offset;
-          case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_fmt_stq_disp;
-          case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_fmt_stq_indirect_disp;
-          case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_fmt_stq_index_disp;
-          case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_fmt_stq_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_sfmt_stq_indirect_offset;
+          case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_sfmt_stq_disp;
+          case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_sfmt_stq_indirect_disp;
+          case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_sfmt_stq_index_disp;
+          case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_sfmt_stq_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 192 :
@@ -1367,18 +1335,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_fmt_ldib_offset;
-          case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_fmt_ldib_indirect;
-          case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_fmt_ldib_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_sfmt_ld_offset;
+          case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_sfmt_ld_indirect;
+          case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_fmt_ldib_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_fmt_ldib_disp;
-          case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_fmt_ldib_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_fmt_ldib_index_disp;
-          case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_fmt_ldib_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_sfmt_ld_disp;
+          case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_sfmt_ld_index_disp;
+          case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 200 :
@@ -1389,57 +1357,59 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
           case 0 : /* fall through */
           case 1 : /* fall through */
           case 2 : /* fall through */
-          case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_fmt_ldis_offset;
-          case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_fmt_ldis_indirect;
-          case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_fmt_ldis_indirect_index;
+          case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_sfmt_ld_offset;
+          case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_sfmt_ld_indirect;
+          case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
           case 8 : /* fall through */
           case 9 : /* fall through */
           case 10 : /* fall through */
-          case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_fmt_ldis_indirect_offset;
-          case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_fmt_ldis_disp;
-          case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_fmt_ldis_indirect_disp;
-          case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_fmt_ldis_index_disp;
-          case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_fmt_ldis_indirect_index_disp;
-          default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+          case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
+          case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_sfmt_ld_disp;
+          case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
+          case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_sfmt_ld_index_disp;
+          case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
+          default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty;
+      default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
       }
     }
   }
 
   /* The instruction has been decoded, now extract the fields.  */
 
- extract_fmt_empty:
+ extract_sfmt_empty:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
 #define FLD(f) abuf->fields.fmt_empty.f
-  EXTRACT_IFMT_EMPTY_VARS /* */
 
-  EXTRACT_IFMT_EMPTY_CODE
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_mulo:
+ extract_sfmt_mulo:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mulo.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1454,20 +1424,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mulo1:
+ extract_sfmt_mulo1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mulo1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO1_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1481,20 +1455,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mulo2:
+ extract_sfmt_mulo2:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mulo2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src2) = f_src2;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1508,20 +1486,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mulo3:
+ extract_sfmt_mulo3:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mulo3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_src2) = f_src2;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1534,20 +1516,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_notbit:
+ extract_sfmt_notbit:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_notbit.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1562,20 +1548,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_notbit1:
+ extract_sfmt_notbit1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_notbit1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO1_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1589,20 +1579,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_notbit2:
+ extract_sfmt_notbit2:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_notbit2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src2) = f_src2;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1616,71 +1610,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_notbit3:
+ extract_sfmt_notbit3:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_notbit3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_src2) = f_src2;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_not:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_not.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
-
-  EXTRACT_IFMT_MULO_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_src1) = & CPU (h_gr)[f_src1];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_src1) = f_src1;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_not1:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_not1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
-
-  EXTRACT_IFMT_MULO1_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_src1) = f_src1;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1693,19 +1640,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_not2:
+ extract_sfmt_not:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_not2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not2", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1719,19 +1668,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_not3:
+ extract_sfmt_not1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_not3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not3", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1744,20 +1695,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_shlo:
+ extract_sfmt_shlo:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_shlo.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1772,20 +1727,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_shlo1:
+ extract_sfmt_shlo1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_shlo1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO1_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1799,20 +1758,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_shlo2:
+ extract_sfmt_shlo2:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_shlo2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src2) = f_src2;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1826,20 +1789,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_shlo3:
+ extract_sfmt_shlo3:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_shlo3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_src2) = f_src2;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1852,21 +1819,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_emul:
+ extract_sfmt_emul:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_emul.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1882,21 +1853,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_emul1:
+ extract_sfmt_emul1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_emul1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO1_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_src1) = f_src1;
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1911,21 +1886,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_emul2:
+ extract_sfmt_emul2:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_emul2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_src2) = f_src2;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1940,21 +1919,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_emul3:
+ extract_sfmt_emul3:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_emul3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_srcdst;
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_src1) = f_src1;
   FLD (f_src2) = f_src2;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1968,21 +1951,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movl:
+ extract_sfmt_movl:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movl.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_movq.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_srcdst) = f_srcdst;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1998,20 +1983,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movl1:
+ extract_sfmt_movl1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movl1.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_src1) = f_src1;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2025,21 +2012,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movt:
+ extract_sfmt_movt:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movt.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_movq.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_srcdst) = f_srcdst;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2057,20 +2046,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movt1:
+ extract_sfmt_movt1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movt1.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_movq.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_src1) = f_src1;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2085,21 +2076,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movq:
+ extract_sfmt_movq:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movq.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_movq.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_srcdst) = f_srcdst;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2119,20 +2112,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movq1:
+ extract_sfmt_movq1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movq1.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_movq.f
+    UINT f_srcdst;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_src1) = f_src1;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2148,19 +2143,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_modpc:
+ extract_sfmt_modpc:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_modpc.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_srcdst;
+    UINT f_src2;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src2) = & CPU (h_gr)[f_src2];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2174,887 +2171,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_lda_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_indirect_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_indirect:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_indirect_index:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_indirect_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_lda_indirect_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_indirect_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_indirect:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_indirect_index:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_indirect_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ld_indirect_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_indirect_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_indirect:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_indirect_index:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_indirect_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldob_indirect_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_indirect_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_indirect:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_indirect_index:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_indirect_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldos_indirect_index_disp:
+ extract_sfmt_lda_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (out_dst) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_ldib_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3067,20 +2198,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_indirect_offset:
+ extract_sfmt_lda_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3094,19 +2229,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_indirect:
+ extract_sfmt_lda_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3120,21 +2257,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_indirect_index:
+ extract_sfmt_lda_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_scale) = f_scale;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3149,19 +2292,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_disp:
+ extract_sfmt_lda_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3174,20 +2322,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_indirect_disp:
+ extract_sfmt_lda_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3201,21 +2356,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_index_disp:
+ extract_sfmt_lda_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3229,14 +2393,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldib_indirect_index_disp:
+ extract_sfmt_lda_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
@@ -3244,7 +2419,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3259,19 +2434,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_offset:
+ extract_sfmt_ld_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3284,20 +2461,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_indirect_offset:
+ extract_sfmt_ld_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3311,19 +2492,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_indirect:
+ extract_sfmt_ld_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3337,21 +2520,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_indirect_index:
+ extract_sfmt_ld_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_scale) = f_scale;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3366,19 +2555,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_disp:
+ extract_sfmt_ld_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3391,20 +2585,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_indirect_disp:
+ extract_sfmt_ld_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3418,21 +2619,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_index_disp:
+ extract_sfmt_ld_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3446,14 +2656,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldis_indirect_index_disp:
+ extract_sfmt_ld_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
@@ -3461,7 +2682,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3476,20 +2697,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_offset:
+ extract_sfmt_ldl_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3503,21 +2726,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_indirect_offset:
+ extract_sfmt_ldl_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3532,20 +2759,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_indirect:
+ extract_sfmt_ldl_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3560,14 +2789,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_indirect_index:
+ extract_sfmt_ldl_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -3575,7 +2810,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3591,20 +2826,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_disp:
+ extract_sfmt_ldl_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3618,21 +2858,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_indirect_disp:
+ extract_sfmt_ldl_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3647,14 +2894,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_index_disp:
+ extract_sfmt_ldl_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -3662,7 +2918,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3677,14 +2933,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldl_indirect_index_disp:
+ extract_sfmt_ldl_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -3693,7 +2960,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3709,20 +2976,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_offset:
+ extract_sfmt_ldt_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3737,21 +3006,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_indirect_offset:
+ extract_sfmt_ldt_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3767,20 +3040,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_indirect:
+ extract_sfmt_ldt_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3796,14 +3071,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_indirect_index:
+ extract_sfmt_ldt_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -3811,7 +3092,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3828,20 +3109,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_disp:
+ extract_sfmt_ldt_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3856,21 +3142,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_indirect_disp:
+ extract_sfmt_ldt_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3886,14 +3179,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_index_disp:
+ extract_sfmt_ldt_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -3901,7 +3203,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3917,14 +3219,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldt_indirect_index_disp:
+ extract_sfmt_ldt_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -3933,7 +3246,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3950,20 +3263,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_offset:
+ extract_sfmt_ldq_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3979,21 +3294,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_indirect_offset:
+ extract_sfmt_ldq_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4010,20 +3329,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_indirect:
+ extract_sfmt_ldq_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4040,14 +3361,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_indirect_index:
+ extract_sfmt_ldq_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -4055,7 +3382,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4073,20 +3400,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_disp:
+ extract_sfmt_ldq_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4102,21 +3434,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_indirect_disp:
+ extract_sfmt_ldq_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4133,14 +3472,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_index_disp:
+ extract_sfmt_ldq_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -4148,7 +3496,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4165,14 +3513,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldq_indirect_index_disp:
+ extract_sfmt_ldq_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -4181,7 +3540,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_dst) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4199,19 +3558,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_offset:
+ extract_sfmt_st_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4224,20 +3585,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_indirect_offset:
+ extract_sfmt_st_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_indirect_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4251,19 +3616,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_indirect:
+ extract_sfmt_st_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_indirect.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4277,21 +3644,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_indirect_index:
+ extract_sfmt_st_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_indirect_index.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_scale) = f_scale;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4306,19 +3679,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_disp:
+ extract_sfmt_st_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4331,20 +3709,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_indirect_disp:
+ extract_sfmt_st_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_indirect_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4358,21 +3743,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_index_disp:
+ extract_sfmt_st_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4386,14 +3780,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st_indirect_index_disp:
+ extract_sfmt_st_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
@@ -4401,7 +3806,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4416,454 +3821,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stob_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_ST_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_indirect_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_ST_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_indirect:
+ extract_sfmt_stl_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_indirect.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_indirect_index:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_indirect_index.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_indirect_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_index) = f_index;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stob_indirect_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_ST_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_indirect_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_ST_OFFSET_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_offset) = f_offset;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_indirect:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_indirect.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_indirect_index:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_indirect_index.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_INDIRECT_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_indirect_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_index) = f_index;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stos_indirect_index_disp:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
-
-  EXTRACT_IFMT_ST_DISP_CODE
-
-  /* Record the fields for the semantic handler.  */
-  FLD (f_optdisp) = f_optdisp;
-  FLD (f_scale) = f_scale;
-  FLD (i_abase) = & CPU (h_gr)[f_abase];
-  FLD (i_index) = & CPU (h_gr)[f_index];
-  FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
-  /* Record the fields for profiling.  */
-  if (PROFILE_MODEL_P (current_cpu))
-    {
-      FLD (in_abase) = f_abase;
-      FLD (in_index) = f_index;
-      FLD (in_st_src) = f_srcdst;
-    }
-#endif
-#undef FLD
-    return idesc;
-  }
-
- extract_fmt_stl_offset:
-  {
-    const IDESC *idesc = &i960base_insn_data[itype];
-    CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
-
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4877,21 +3850,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_indirect_offset:
+ extract_sfmt_stl_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4906,20 +3883,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_indirect:
+ extract_sfmt_stl_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_indirect.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4934,14 +3913,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_indirect_index:
+ extract_sfmt_stl_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_indirect_index.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -4949,7 +3934,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4965,20 +3950,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_disp:
+ extract_sfmt_stl_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -4992,21 +3982,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_indirect_disp:
+ extract_sfmt_stl_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5021,14 +4018,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_index_disp:
+ extract_sfmt_stl_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5036,7 +4042,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5051,14 +4057,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stl_indirect_index_disp:
+ extract_sfmt_stl_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5067,7 +4084,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5083,20 +4100,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_offset:
+ extract_sfmt_stt_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5111,21 +4130,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_indirect_offset:
+ extract_sfmt_stt_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5141,20 +4164,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_indirect:
+ extract_sfmt_stt_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_indirect.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5170,14 +4195,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_indirect_index:
+ extract_sfmt_stt_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_indirect_index.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5185,7 +4216,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5202,20 +4233,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_disp:
+ extract_sfmt_stt_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5230,21 +4266,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_indirect_disp:
+ extract_sfmt_stt_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5260,14 +4303,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_index_disp:
+ extract_sfmt_stt_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5275,7 +4327,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5291,14 +4343,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stt_indirect_index_disp:
+ extract_sfmt_stt_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5307,7 +4370,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5324,20 +4387,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_offset:
+ extract_sfmt_stq_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5353,21 +4418,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_indirect_offset:
+ extract_sfmt_stq_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f
-  EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_ST_OFFSET_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5384,20 +4453,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_indirect:
+ extract_sfmt_stq_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_indirect.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_srcdst;
+    UINT f_abase;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5414,14 +4485,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_indirect_index:
+ extract_sfmt_stq_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_indirect_index.f
-  EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_ST_INDIRECT_CODE
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5429,7 +4506,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5447,20 +4524,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_disp:
+ extract_sfmt_stq_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5476,21 +4558,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_indirect_disp:
+ extract_sfmt_stq_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5507,14 +4596,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_index_disp:
+ extract_sfmt_stq_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5522,7 +4620,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (f_scale) = f_scale;
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5539,14 +4637,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stq_indirect_index_disp:
+ extract_sfmt_stq_indirect_index_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f
-  EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_srcdst;
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_ST_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_srcdst) = f_srcdst;
@@ -5555,7 +4664,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
   FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5573,21 +4682,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpobe_reg:
+ extract_sfmt_cmpobe_reg:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
-  EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
+    UINT f_br_src1;
+    UINT f_br_src2;
+    SI f_br_disp;
 
-  EXTRACT_IFMT_CMPOBE_REG_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_br_disp) = f_br_disp;
   FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
   FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5601,21 +4713,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpobe_lit:
+ extract_sfmt_cmpobe_lit:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
-  EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
+    UINT f_br_src1;
+    UINT f_br_src2;
+    SI f_br_disp;
 
-  EXTRACT_IFMT_CMPOBE_LIT_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_br_src1) = f_br_src1;
   FLD (i_br_disp) = f_br_disp;
   FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5628,21 +4743,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpobl_reg:
+ extract_sfmt_cmpobl_reg:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
-  EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
+    UINT f_br_src1;
+    UINT f_br_src2;
+    SI f_br_disp;
 
-  EXTRACT_IFMT_CMPOBE_REG_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_br_disp) = f_br_disp;
   FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
   FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5656,21 +4774,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpobl_lit:
+ extract_sfmt_cmpobl_lit:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
-  EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
+    UINT f_br_src1;
+    UINT f_br_src2;
+    SI f_br_disp;
 
-  EXTRACT_IFMT_CMPOBE_LIT_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_br_src1) = f_br_src1;
   FLD (i_br_disp) = f_br_disp;
   FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5683,21 +4804,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bbc_reg:
+ extract_sfmt_bbc_reg:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
-  EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
+    UINT f_br_src1;
+    UINT f_br_src2;
+    SI f_br_disp;
 
-  EXTRACT_IFMT_CMPOBE_REG_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_br_disp) = f_br_disp;
   FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
   FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5711,21 +4835,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bbc_lit:
+ extract_sfmt_bbc_lit:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
-  EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
+    UINT f_br_src1;
+    UINT f_br_src2;
+    SI f_br_disp;
 
-  EXTRACT_IFMT_CMPOBE_LIT_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
+    f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_br_src1) = f_br_src1;
   FLD (i_br_disp) = f_br_disp;
   FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5738,19 +4865,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpi:
+ extract_sfmt_cmpi:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpi.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_src2) = & CPU (h_gr)[f_src2];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5764,19 +4893,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpi1:
+ extract_sfmt_cmpi1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpi1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO1_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (i_src2) = & CPU (h_gr)[f_src2];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5789,19 +4920,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpi2:
+ extract_sfmt_cmpi2:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpi2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src2) = f_src2;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5814,19 +4947,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpi3:
+ extract_sfmt_cmpi3:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpi3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_src2) = f_src2;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5838,19 +4973,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpo:
+ extract_sfmt_cmpo:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpo.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
   FLD (i_src2) = & CPU (h_gr)[f_src2];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5864,19 +5001,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpo1:
+ extract_sfmt_cmpo1:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpo1.f
-  EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul1.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO1_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (i_src2) = & CPU (h_gr)[f_src2];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5889,19 +5028,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpo2:
+ extract_sfmt_cmpo2:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpo2.f
-  EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO2_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src2) = f_src2;
   FLD (i_src1) = & CPU (h_gr)[f_src1];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5914,19 +5055,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpo3:
+ extract_sfmt_cmpo3:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpo3.f
-  EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul3.f
+    UINT f_src2;
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO3_CODE
+    f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_src1) = f_src1;
   FLD (f_src2) = f_src2;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5938,18 +5081,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_testno_reg:
+ extract_sfmt_testno_reg:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_testno_reg.f
-  EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
+    UINT f_br_src1;
 
-  EXTRACT_IFMT_CMPOBE_REG_CODE
+    f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5962,19 +5105,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bno:
+ extract_sfmt_bno:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
-  EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */
+#define FLD(f) abuf->fields.sfmt_bno.f
+    SI f_ctrl_disp;
 
-  EXTRACT_IFMT_BNO_CODE
+    f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_ctrl_disp) = f_ctrl_disp;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -5986,19 +5128,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_b:
+ extract_sfmt_b:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_b.f
-  EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */
+#define FLD(f) abuf->fields.sfmt_bno.f
+    SI f_ctrl_disp;
 
-  EXTRACT_IFMT_BNO_CODE
+    f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_ctrl_disp) = f_ctrl_disp;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6010,20 +5151,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bx_indirect_offset:
+ extract_sfmt_bx_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6036,19 +5178,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bx_indirect:
+ extract_sfmt_bx_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_abase) = & CPU (h_gr)[f_abase];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6061,21 +5202,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bx_indirect_index:
+ extract_sfmt_bx_indirect_index:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_abase;
+    UINT f_scale;
+    UINT f_index;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
+    f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_scale) = f_scale;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
   FLD (i_index) = & CPU (h_gr)[f_index];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6089,19 +5233,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bx_disp:
+ extract_sfmt_bx_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6113,20 +5259,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bx_indirect_disp:
+ extract_sfmt_bx_indirect_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
+    UINT f_optdisp;
+    UINT f_abase;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6139,19 +5289,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_callx_disp:
+ extract_sfmt_callx_disp:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f
-  EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
+    UINT f_optdisp;
+    /* Contents of trailing part of insn.  */
+    UINT word_1;
 
-  EXTRACT_IFMT_LDA_DISP_CODE
+  word_1 = GETIMEMUSI (current_cpu, pc + 4);
+    f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_optdisp) = f_optdisp;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6197,19 +5349,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_callx_indirect:
+ extract_sfmt_callx_indirect:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f
-  EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
+    UINT f_abase;
 
-  EXTRACT_IFMT_LDA_INDIRECT_CODE
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_abase) = & CPU (h_gr)[f_abase];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6256,20 +5407,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_callx_indirect_offset:
+ extract_sfmt_callx_indirect_offset:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f
-  EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
+    UINT f_abase;
+    UINT f_offset;
 
-  EXTRACT_IFMT_LDA_OFFSET_CODE
+    f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
+    f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_offset) = f_offset;
   FLD (i_abase) = & CPU (h_gr)[f_abase];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6316,18 +5468,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ret:
+ extract_sfmt_ret:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
-  EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
 
-  EXTRACT_IFMT_BNO_CODE
 
   /* Record the fields for the semantic handler.  */
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ret", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6359,19 +5508,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_calls:
+ extract_sfmt_calls:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_calls.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.sfmt_emul2.f
+    UINT f_src1;
 
-  EXTRACT_IFMT_MULO_CODE
+    f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_src1) = & CPU (h_gr)[f_src1];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6384,18 +5532,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_fmark:
+ extract_sfmt_fmark:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.fmt_empty.f
 
-  EXTRACT_IFMT_MULO_CODE
 
   /* Record the fields for the semantic handler.  */
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_fmark", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmark", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -6407,17 +5552,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_flushreg:
+ extract_sfmt_flushreg:
   {
     const IDESC *idesc = &i960base_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_flushreg.f
-  EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */
+#define FLD(f) abuf->fields.fmt_empty.f
 
-  EXTRACT_IFMT_MULO_CODE
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_flushreg", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flushreg", (char *) 0));
 
 #undef FLD
     return idesc;
diff --git a/sim/i960/decode.h b/sim/i960/decode.h
index 80fbde6..e88e027 100644
--- a/sim/i960/decode.h
+++ b/sim/i960/decode.h
@@ -29,6 +29,8 @@ extern const IDESC *i960base_decode (SIM_CPU *, IADDR,
                                   CGEN_INSN_INT,
                                   ARGBUF *);
 extern void i960base_init_idesc_table (SIM_CPU *);
+extern void i960base_sem_init_idesc_table (SIM_CPU *);
+extern void i960base_semf_init_idesc_table (SIM_CPU *);
 
 /* Enum declaration for instructions in cpu family i960base.  */
 typedef enum i960base_insn_type {
@@ -109,326 +111,41 @@ typedef enum i960base_insn_type {
  , I960BASE_INSN_FLUSHREG, I960BASE_INSN_MAX
 } I960BASE_INSN_TYPE;
 
-#if ! WITH_SEM_SWITCH_FULL
-#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (i960base,_sem_,fn);
-#else
-#define SEMFULL(fn)
-#endif
-
-#if ! WITH_SEM_SWITCH_FAST
-#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (i960base,_semf_,fn);
-#else
-#define SEMFAST(fn)
-#endif
-
-#define SEM(fn) SEMFULL (fn) SEMFAST (fn)
-
-/* The function version of the before/after handlers is always needed,
-   so we always want the SEMFULL declaration of them.  */
-extern SEMANTIC_FN CONCAT3 (i960base,_sem_,x_before);
-extern SEMANTIC_FN CONCAT3 (i960base,_sem_,x_after);
-
-SEM (x_invalid)
-SEM (x_after)
-SEM (x_before)
-SEM (x_cti_chain)
-SEM (x_chain)
-SEM (x_begin)
-SEM (mulo)
-SEM (mulo1)
-SEM (mulo2)
-SEM (mulo3)
-SEM (remo)
-SEM (remo1)
-SEM (remo2)
-SEM (remo3)
-SEM (divo)
-SEM (divo1)
-SEM (divo2)
-SEM (divo3)
-SEM (remi)
-SEM (remi1)
-SEM (remi2)
-SEM (remi3)
-SEM (divi)
-SEM (divi1)
-SEM (divi2)
-SEM (divi3)
-SEM (addo)
-SEM (addo1)
-SEM (addo2)
-SEM (addo3)
-SEM (subo)
-SEM (subo1)
-SEM (subo2)
-SEM (subo3)
-SEM (notbit)
-SEM (notbit1)
-SEM (notbit2)
-SEM (notbit3)
-SEM (and)
-SEM (and1)
-SEM (and2)
-SEM (and3)
-SEM (andnot)
-SEM (andnot1)
-SEM (andnot2)
-SEM (andnot3)
-SEM (setbit)
-SEM (setbit1)
-SEM (setbit2)
-SEM (setbit3)
-SEM (notand)
-SEM (notand1)
-SEM (notand2)
-SEM (notand3)
-SEM (xor)
-SEM (xor1)
-SEM (xor2)
-SEM (xor3)
-SEM (or)
-SEM (or1)
-SEM (or2)
-SEM (or3)
-SEM (nor)
-SEM (nor1)
-SEM (nor2)
-SEM (nor3)
-SEM (xnor)
-SEM (xnor1)
-SEM (xnor2)
-SEM (xnor3)
-SEM (not)
-SEM (not1)
-SEM (not2)
-SEM (not3)
-SEM (ornot)
-SEM (ornot1)
-SEM (ornot2)
-SEM (ornot3)
-SEM (clrbit)
-SEM (clrbit1)
-SEM (clrbit2)
-SEM (clrbit3)
-SEM (shlo)
-SEM (shlo1)
-SEM (shlo2)
-SEM (shlo3)
-SEM (shro)
-SEM (shro1)
-SEM (shro2)
-SEM (shro3)
-SEM (shli)
-SEM (shli1)
-SEM (shli2)
-SEM (shli3)
-SEM (shri)
-SEM (shri1)
-SEM (shri2)
-SEM (shri3)
-SEM (emul)
-SEM (emul1)
-SEM (emul2)
-SEM (emul3)
-SEM (mov)
-SEM (mov1)
-SEM (movl)
-SEM (movl1)
-SEM (movt)
-SEM (movt1)
-SEM (movq)
-SEM (movq1)
-SEM (modpc)
-SEM (modac)
-SEM (lda_offset)
-SEM (lda_indirect_offset)
-SEM (lda_indirect)
-SEM (lda_indirect_index)
-SEM (lda_disp)
-SEM (lda_indirect_disp)
-SEM (lda_index_disp)
-SEM (lda_indirect_index_disp)
-SEM (ld_offset)
-SEM (ld_indirect_offset)
-SEM (ld_indirect)
-SEM (ld_indirect_index)
-SEM (ld_disp)
-SEM (ld_indirect_disp)
-SEM (ld_index_disp)
-SEM (ld_indirect_index_disp)
-SEM (ldob_offset)
-SEM (ldob_indirect_offset)
-SEM (ldob_indirect)
-SEM (ldob_indirect_index)
-SEM (ldob_disp)
-SEM (ldob_indirect_disp)
-SEM (ldob_index_disp)
-SEM (ldob_indirect_index_disp)
-SEM (ldos_offset)
-SEM (ldos_indirect_offset)
-SEM (ldos_indirect)
-SEM (ldos_indirect_index)
-SEM (ldos_disp)
-SEM (ldos_indirect_disp)
-SEM (ldos_index_disp)
-SEM (ldos_indirect_index_disp)
-SEM (ldib_offset)
-SEM (ldib_indirect_offset)
-SEM (ldib_indirect)
-SEM (ldib_indirect_index)
-SEM (ldib_disp)
-SEM (ldib_indirect_disp)
-SEM (ldib_index_disp)
-SEM (ldib_indirect_index_disp)
-SEM (ldis_offset)
-SEM (ldis_indirect_offset)
-SEM (ldis_indirect)
-SEM (ldis_indirect_index)
-SEM (ldis_disp)
-SEM (ldis_indirect_disp)
-SEM (ldis_index_disp)
-SEM (ldis_indirect_index_disp)
-SEM (ldl_offset)
-SEM (ldl_indirect_offset)
-SEM (ldl_indirect)
-SEM (ldl_indirect_index)
-SEM (ldl_disp)
-SEM (ldl_indirect_disp)
-SEM (ldl_index_disp)
-SEM (ldl_indirect_index_disp)
-SEM (ldt_offset)
-SEM (ldt_indirect_offset)
-SEM (ldt_indirect)
-SEM (ldt_indirect_index)
-SEM (ldt_disp)
-SEM (ldt_indirect_disp)
-SEM (ldt_index_disp)
-SEM (ldt_indirect_index_disp)
-SEM (ldq_offset)
-SEM (ldq_indirect_offset)
-SEM (ldq_indirect)
-SEM (ldq_indirect_index)
-SEM (ldq_disp)
-SEM (ldq_indirect_disp)
-SEM (ldq_index_disp)
-SEM (ldq_indirect_index_disp)
-SEM (st_offset)
-SEM (st_indirect_offset)
-SEM (st_indirect)
-SEM (st_indirect_index)
-SEM (st_disp)
-SEM (st_indirect_disp)
-SEM (st_index_disp)
-SEM (st_indirect_index_disp)
-SEM (stob_offset)
-SEM (stob_indirect_offset)
-SEM (stob_indirect)
-SEM (stob_indirect_index)
-SEM (stob_disp)
-SEM (stob_indirect_disp)
-SEM (stob_index_disp)
-SEM (stob_indirect_index_disp)
-SEM (stos_offset)
-SEM (stos_indirect_offset)
-SEM (stos_indirect)
-SEM (stos_indirect_index)
-SEM (stos_disp)
-SEM (stos_indirect_disp)
-SEM (stos_index_disp)
-SEM (stos_indirect_index_disp)
-SEM (stl_offset)
-SEM (stl_indirect_offset)
-SEM (stl_indirect)
-SEM (stl_indirect_index)
-SEM (stl_disp)
-SEM (stl_indirect_disp)
-SEM (stl_index_disp)
-SEM (stl_indirect_index_disp)
-SEM (stt_offset)
-SEM (stt_indirect_offset)
-SEM (stt_indirect)
-SEM (stt_indirect_index)
-SEM (stt_disp)
-SEM (stt_indirect_disp)
-SEM (stt_index_disp)
-SEM (stt_indirect_index_disp)
-SEM (stq_offset)
-SEM (stq_indirect_offset)
-SEM (stq_indirect)
-SEM (stq_indirect_index)
-SEM (stq_disp)
-SEM (stq_indirect_disp)
-SEM (stq_index_disp)
-SEM (stq_indirect_index_disp)
-SEM (cmpobe_reg)
-SEM (cmpobe_lit)
-SEM (cmpobne_reg)
-SEM (cmpobne_lit)
-SEM (cmpobl_reg)
-SEM (cmpobl_lit)
-SEM (cmpoble_reg)
-SEM (cmpoble_lit)
-SEM (cmpobg_reg)
-SEM (cmpobg_lit)
-SEM (cmpobge_reg)
-SEM (cmpobge_lit)
-SEM (cmpibe_reg)
-SEM (cmpibe_lit)
-SEM (cmpibne_reg)
-SEM (cmpibne_lit)
-SEM (cmpibl_reg)
-SEM (cmpibl_lit)
-SEM (cmpible_reg)
-SEM (cmpible_lit)
-SEM (cmpibg_reg)
-SEM (cmpibg_lit)
-SEM (cmpibge_reg)
-SEM (cmpibge_lit)
-SEM (bbc_reg)
-SEM (bbc_lit)
-SEM (bbs_reg)
-SEM (bbs_lit)
-SEM (cmpi)
-SEM (cmpi1)
-SEM (cmpi2)
-SEM (cmpi3)
-SEM (cmpo)
-SEM (cmpo1)
-SEM (cmpo2)
-SEM (cmpo3)
-SEM (testno_reg)
-SEM (testg_reg)
-SEM (teste_reg)
-SEM (testge_reg)
-SEM (testl_reg)
-SEM (testne_reg)
-SEM (testle_reg)
-SEM (testo_reg)
-SEM (bno)
-SEM (bg)
-SEM (be)
-SEM (bge)
-SEM (bl)
-SEM (bne)
-SEM (ble)
-SEM (bo)
-SEM (b)
-SEM (bx_indirect_offset)
-SEM (bx_indirect)
-SEM (bx_indirect_index)
-SEM (bx_disp)
-SEM (bx_indirect_disp)
-SEM (callx_disp)
-SEM (callx_indirect)
-SEM (callx_indirect_offset)
-SEM (ret)
-SEM (calls)
-SEM (fmark)
-SEM (flushreg)
-
-#undef SEMFULL
-#undef SEMFAST
-#undef SEM
+/* Enum declaration for semantic formats in cpu family i960base.  */
+typedef enum i960base_sfmt_type {
+  I960BASE_SFMT_EMPTY, I960BASE_SFMT_MULO, I960BASE_SFMT_MULO1, I960BASE_SFMT_MULO2
+ , I960BASE_SFMT_MULO3, I960BASE_SFMT_NOTBIT, I960BASE_SFMT_NOTBIT1, I960BASE_SFMT_NOTBIT2
+ , I960BASE_SFMT_NOTBIT3, I960BASE_SFMT_NOT, I960BASE_SFMT_NOT1, I960BASE_SFMT_SHLO
+ , I960BASE_SFMT_SHLO1, I960BASE_SFMT_SHLO2, I960BASE_SFMT_SHLO3, I960BASE_SFMT_EMUL
+ , I960BASE_SFMT_EMUL1, I960BASE_SFMT_EMUL2, I960BASE_SFMT_EMUL3, I960BASE_SFMT_MOVL
+ , I960BASE_SFMT_MOVL1, I960BASE_SFMT_MOVT, I960BASE_SFMT_MOVT1, I960BASE_SFMT_MOVQ
+ , I960BASE_SFMT_MOVQ1, I960BASE_SFMT_MODPC, I960BASE_SFMT_LDA_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET
+ , I960BASE_SFMT_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP
+ , I960BASE_SFMT_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET
+ , I960BASE_SFMT_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_DISP, I960BASE_SFMT_LD_INDIRECT_DISP
+ , I960BASE_SFMT_LD_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET
+ , I960BASE_SFMT_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP
+ , I960BASE_SFMT_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET
+ , I960BASE_SFMT_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP
+ , I960BASE_SFMT_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET
+ , I960BASE_SFMT_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP
+ , I960BASE_SFMT_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET
+ , I960BASE_SFMT_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_DISP, I960BASE_SFMT_ST_INDIRECT_DISP
+ , I960BASE_SFMT_ST_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET
+ , I960BASE_SFMT_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_DISP, I960BASE_SFMT_STL_INDIRECT_DISP
+ , I960BASE_SFMT_STL_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET
+ , I960BASE_SFMT_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP
+ , I960BASE_SFMT_STT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET
+ , I960BASE_SFMT_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP
+ , I960BASE_SFMT_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_CMPOBE_REG, I960BASE_SFMT_CMPOBE_LIT
+ , I960BASE_SFMT_CMPOBL_REG, I960BASE_SFMT_CMPOBL_LIT, I960BASE_SFMT_BBC_REG, I960BASE_SFMT_BBC_LIT
+ , I960BASE_SFMT_CMPI, I960BASE_SFMT_CMPI1, I960BASE_SFMT_CMPI2, I960BASE_SFMT_CMPI3
+ , I960BASE_SFMT_CMPO, I960BASE_SFMT_CMPO1, I960BASE_SFMT_CMPO2, I960BASE_SFMT_CMPO3
+ , I960BASE_SFMT_TESTNO_REG, I960BASE_SFMT_BNO, I960BASE_SFMT_B, I960BASE_SFMT_BX_INDIRECT_OFFSET
+ , I960BASE_SFMT_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_DISP, I960BASE_SFMT_BX_INDIRECT_DISP
+ , I960BASE_SFMT_CALLX_DISP, I960BASE_SFMT_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_RET
+ , I960BASE_SFMT_CALLS, I960BASE_SFMT_FMARK, I960BASE_SFMT_FLUSHREG
+} I960BASE_SFMT_TYPE;
 
 /* Function unit handlers (user written).  */
 
diff --git a/sim/i960/i960-desc.h b/sim/i960/i960-desc.h
index 75b3d63..40ca227 100644
--- a/sim/i960/i960-desc.h
+++ b/sim/i960/i960-desc.h
@@ -35,6 +35,9 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 
 #define CGEN_INSN_LSB0_P 0
 
+/* Minimum size of any insn (in bytes).  */
+#define CGEN_MIN_INSN_SIZE 4
+
 /* Maximum size of any insn (in bytes).  */
 #define CGEN_MAX_INSN_SIZE 8
 
diff --git a/sim/i960/model.c b/sim/i960/model.c
index 8881f3e..600d9ea 100644
--- a/sim/i960/model.c
+++ b/sim/i960/model.c
@@ -37,7 +37,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 static int
 model_i960KA_mulo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -53,7 +53,7 @@ model_i960KA_mulo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_mulo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -69,7 +69,7 @@ model_i960KA_mulo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_mulo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -85,7 +85,7 @@ model_i960KA_mulo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_mulo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -101,7 +101,7 @@ model_i960KA_mulo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -117,7 +117,7 @@ model_i960KA_remo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -133,7 +133,7 @@ model_i960KA_remo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -149,7 +149,7 @@ model_i960KA_remo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -165,7 +165,7 @@ model_i960KA_remo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -181,7 +181,7 @@ model_i960KA_divo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -197,7 +197,7 @@ model_i960KA_divo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -213,7 +213,7 @@ model_i960KA_divo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -229,7 +229,7 @@ model_i960KA_divo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -245,7 +245,7 @@ model_i960KA_remi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remi1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -261,7 +261,7 @@ model_i960KA_remi1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remi2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -277,7 +277,7 @@ model_i960KA_remi2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_remi3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -293,7 +293,7 @@ model_i960KA_remi3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -309,7 +309,7 @@ model_i960KA_divi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divi1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -325,7 +325,7 @@ model_i960KA_divi1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divi2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -341,7 +341,7 @@ model_i960KA_divi2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_divi3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -357,7 +357,7 @@ model_i960KA_divi3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_addo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -373,7 +373,7 @@ model_i960KA_addo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_addo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -389,7 +389,7 @@ model_i960KA_addo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_addo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -405,7 +405,7 @@ model_i960KA_addo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_addo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -421,7 +421,7 @@ model_i960KA_addo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_subo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -437,7 +437,7 @@ model_i960KA_subo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_subo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -453,7 +453,7 @@ model_i960KA_subo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_subo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -469,7 +469,7 @@ model_i960KA_subo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_subo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -485,7 +485,7 @@ model_i960KA_subo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notbit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -501,7 +501,7 @@ model_i960KA_notbit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notbit1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -517,7 +517,7 @@ model_i960KA_notbit1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notbit2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -533,7 +533,7 @@ model_i960KA_notbit2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notbit3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -549,7 +549,7 @@ model_i960KA_notbit3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_and (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -565,7 +565,7 @@ model_i960KA_and (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_and1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -581,7 +581,7 @@ model_i960KA_and1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_and2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -597,7 +597,7 @@ model_i960KA_and2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_and3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -613,7 +613,7 @@ model_i960KA_and3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_andnot (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -629,7 +629,7 @@ model_i960KA_andnot (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_andnot1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -645,7 +645,7 @@ model_i960KA_andnot1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_andnot2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -661,7 +661,7 @@ model_i960KA_andnot2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_andnot3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -677,7 +677,7 @@ model_i960KA_andnot3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_setbit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -693,7 +693,7 @@ model_i960KA_setbit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_setbit1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -709,7 +709,7 @@ model_i960KA_setbit1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_setbit2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -725,7 +725,7 @@ model_i960KA_setbit2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_setbit3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -741,7 +741,7 @@ model_i960KA_setbit3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notand (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -757,7 +757,7 @@ model_i960KA_notand (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notand1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -773,7 +773,7 @@ model_i960KA_notand1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notand2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -789,7 +789,7 @@ model_i960KA_notand2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_notand3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -805,7 +805,7 @@ model_i960KA_notand3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -821,7 +821,7 @@ model_i960KA_xor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xor1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -837,7 +837,7 @@ model_i960KA_xor1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xor2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -853,7 +853,7 @@ model_i960KA_xor2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -869,7 +869,7 @@ model_i960KA_xor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_or (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -885,7 +885,7 @@ model_i960KA_or (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_or1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -901,7 +901,7 @@ model_i960KA_or1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_or2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -917,7 +917,7 @@ model_i960KA_or2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_or3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -933,7 +933,7 @@ model_i960KA_or3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_nor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -949,7 +949,7 @@ model_i960KA_nor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_nor1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -965,7 +965,7 @@ model_i960KA_nor1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_nor2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -981,7 +981,7 @@ model_i960KA_nor2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_nor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -997,7 +997,7 @@ model_i960KA_nor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xnor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1013,7 +1013,7 @@ model_i960KA_xnor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xnor1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1029,7 +1029,7 @@ model_i960KA_xnor1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xnor2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1045,7 +1045,7 @@ model_i960KA_xnor2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_xnor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1061,7 +1061,7 @@ model_i960KA_xnor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_not (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1077,7 +1077,7 @@ model_i960KA_not (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_not1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1093,7 +1093,7 @@ model_i960KA_not1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_not2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1109,7 +1109,7 @@ model_i960KA_not2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_not3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1125,7 +1125,7 @@ model_i960KA_not3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ornot (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1141,7 +1141,7 @@ model_i960KA_ornot (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ornot1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1157,7 +1157,7 @@ model_i960KA_ornot1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ornot2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1173,7 +1173,7 @@ model_i960KA_ornot2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ornot3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1189,7 +1189,7 @@ model_i960KA_ornot3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_clrbit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1205,7 +1205,7 @@ model_i960KA_clrbit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1221,7 +1221,7 @@ model_i960KA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1237,7 +1237,7 @@ model_i960KA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1253,7 +1253,7 @@ model_i960KA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shlo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1269,7 +1269,7 @@ model_i960KA_shlo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shlo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1285,7 +1285,7 @@ model_i960KA_shlo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shlo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1301,7 +1301,7 @@ model_i960KA_shlo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shlo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1317,7 +1317,7 @@ model_i960KA_shlo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shro (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1333,7 +1333,7 @@ model_i960KA_shro (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shro1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1349,7 +1349,7 @@ model_i960KA_shro1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shro2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1365,7 +1365,7 @@ model_i960KA_shro2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shro3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1381,7 +1381,7 @@ model_i960KA_shro3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shli (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1397,7 +1397,7 @@ model_i960KA_shli (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shli1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1413,7 +1413,7 @@ model_i960KA_shli1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shli2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1429,7 +1429,7 @@ model_i960KA_shli2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shli3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1445,7 +1445,7 @@ model_i960KA_shli3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shri (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1461,7 +1461,7 @@ model_i960KA_shri (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shri1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1477,7 +1477,7 @@ model_i960KA_shri1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shri2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1493,7 +1493,7 @@ model_i960KA_shri2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_shri3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1509,7 +1509,7 @@ model_i960KA_shri3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_emul (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1525,7 +1525,7 @@ model_i960KA_emul (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_emul1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1541,7 +1541,7 @@ model_i960KA_emul1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_emul2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1557,7 +1557,7 @@ model_i960KA_emul2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_emul3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1573,7 +1573,7 @@ model_i960KA_emul3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_mov (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1589,7 +1589,7 @@ model_i960KA_mov (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_mov1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1605,7 +1605,7 @@ model_i960KA_mov1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_movl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movl.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1621,7 +1621,7 @@ model_i960KA_movl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_movl1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movl1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1637,7 +1637,7 @@ model_i960KA_movl1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_movt (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movt.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1653,7 +1653,7 @@ model_i960KA_movt (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_movt1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movt1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1669,7 +1669,7 @@ model_i960KA_movt1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_movq (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movq.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1685,7 +1685,7 @@ model_i960KA_movq (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_movq1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movq1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1701,7 +1701,7 @@ model_i960KA_movq1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_modpc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1717,7 +1717,7 @@ model_i960KA_modpc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_modac (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1733,7 +1733,7 @@ model_i960KA_modac (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1749,7 +1749,7 @@ model_i960KA_lda_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1765,7 +1765,7 @@ model_i960KA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1781,7 +1781,7 @@ model_i960KA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1797,7 +1797,7 @@ model_i960KA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1813,7 +1813,7 @@ model_i960KA_lda_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1829,7 +1829,7 @@ model_i960KA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1845,7 +1845,7 @@ model_i960KA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1861,7 +1861,7 @@ model_i960KA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1877,7 +1877,7 @@ model_i960KA_ld_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1893,7 +1893,7 @@ model_i960KA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1909,7 +1909,7 @@ model_i960KA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1925,7 +1925,7 @@ model_i960KA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1941,7 +1941,7 @@ model_i960KA_ld_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1957,7 +1957,7 @@ model_i960KA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1973,7 +1973,7 @@ model_i960KA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1989,7 +1989,7 @@ model_i960KA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2005,7 +2005,7 @@ model_i960KA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2021,7 +2021,7 @@ model_i960KA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2037,7 +2037,7 @@ model_i960KA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2053,7 +2053,7 @@ model_i960KA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2069,7 +2069,7 @@ model_i960KA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2085,7 +2085,7 @@ model_i960KA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2101,7 +2101,7 @@ model_i960KA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2117,7 +2117,7 @@ model_i960KA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2133,7 +2133,7 @@ model_i960KA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2149,7 +2149,7 @@ model_i960KA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2165,7 +2165,7 @@ model_i960KA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2181,7 +2181,7 @@ model_i960KA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2197,7 +2197,7 @@ model_i960KA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2213,7 +2213,7 @@ model_i960KA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2229,7 +2229,7 @@ model_i960KA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2245,7 +2245,7 @@ model_i960KA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2261,7 +2261,7 @@ model_i960KA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2277,7 +2277,7 @@ model_i960KA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2293,7 +2293,7 @@ model_i960KA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2309,7 +2309,7 @@ model_i960KA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2325,7 +2325,7 @@ model_i960KA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2341,7 +2341,7 @@ model_i960KA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2357,7 +2357,7 @@ model_i960KA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2373,7 +2373,7 @@ model_i960KA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2389,7 +2389,7 @@ model_i960KA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2405,7 +2405,7 @@ model_i960KA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2421,7 +2421,7 @@ model_i960KA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2437,7 +2437,7 @@ model_i960KA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2453,7 +2453,7 @@ model_i960KA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2469,7 +2469,7 @@ model_i960KA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2485,7 +2485,7 @@ model_i960KA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2501,7 +2501,7 @@ model_i960KA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2517,7 +2517,7 @@ model_i960KA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2533,7 +2533,7 @@ model_i960KA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2549,7 +2549,7 @@ model_i960KA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2565,7 +2565,7 @@ model_i960KA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2581,7 +2581,7 @@ model_i960KA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2597,7 +2597,7 @@ model_i960KA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2613,7 +2613,7 @@ model_i960KA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2629,7 +2629,7 @@ model_i960KA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2645,7 +2645,7 @@ model_i960KA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2661,7 +2661,7 @@ model_i960KA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2677,7 +2677,7 @@ model_i960KA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2693,7 +2693,7 @@ model_i960KA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2709,7 +2709,7 @@ model_i960KA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2725,7 +2725,7 @@ model_i960KA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2741,7 +2741,7 @@ model_i960KA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2757,7 +2757,7 @@ model_i960KA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2773,7 +2773,7 @@ model_i960KA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2789,7 +2789,7 @@ model_i960KA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2805,7 +2805,7 @@ model_i960KA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2821,7 +2821,7 @@ model_i960KA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2837,7 +2837,7 @@ model_i960KA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2853,7 +2853,7 @@ model_i960KA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2869,7 +2869,7 @@ model_i960KA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2885,7 +2885,7 @@ model_i960KA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2901,7 +2901,7 @@ model_i960KA_st_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2917,7 +2917,7 @@ model_i960KA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2933,7 +2933,7 @@ model_i960KA_st_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2949,7 +2949,7 @@ model_i960KA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2965,7 +2965,7 @@ model_i960KA_st_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2981,7 +2981,7 @@ model_i960KA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2997,7 +2997,7 @@ model_i960KA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3013,7 +3013,7 @@ model_i960KA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3029,7 +3029,7 @@ model_i960KA_stob_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3045,7 +3045,7 @@ model_i960KA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3061,7 +3061,7 @@ model_i960KA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3077,7 +3077,7 @@ model_i960KA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3093,7 +3093,7 @@ model_i960KA_stob_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3109,7 +3109,7 @@ model_i960KA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3125,7 +3125,7 @@ model_i960KA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3141,7 +3141,7 @@ model_i960KA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3157,7 +3157,7 @@ model_i960KA_stos_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3173,7 +3173,7 @@ model_i960KA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3189,7 +3189,7 @@ model_i960KA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3205,7 +3205,7 @@ model_i960KA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3221,7 +3221,7 @@ model_i960KA_stos_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3237,7 +3237,7 @@ model_i960KA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3253,7 +3253,7 @@ model_i960KA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3269,7 +3269,7 @@ model_i960KA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3285,7 +3285,7 @@ model_i960KA_stl_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3301,7 +3301,7 @@ model_i960KA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3317,7 +3317,7 @@ model_i960KA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3333,7 +3333,7 @@ model_i960KA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3349,7 +3349,7 @@ model_i960KA_stl_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3365,7 +3365,7 @@ model_i960KA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3381,7 +3381,7 @@ model_i960KA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3397,7 +3397,7 @@ model_i960KA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3413,7 +3413,7 @@ model_i960KA_stt_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3429,7 +3429,7 @@ model_i960KA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3445,7 +3445,7 @@ model_i960KA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3461,7 +3461,7 @@ model_i960KA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3477,7 +3477,7 @@ model_i960KA_stt_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3493,7 +3493,7 @@ model_i960KA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3509,7 +3509,7 @@ model_i960KA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3525,7 +3525,7 @@ model_i960KA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3541,7 +3541,7 @@ model_i960KA_stq_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3557,7 +3557,7 @@ model_i960KA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3573,7 +3573,7 @@ model_i960KA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3589,7 +3589,7 @@ model_i960KA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3605,7 +3605,7 @@ model_i960KA_stq_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3621,7 +3621,7 @@ model_i960KA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3637,7 +3637,7 @@ model_i960KA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3653,7 +3653,7 @@ model_i960KA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3669,7 +3669,7 @@ model_i960KA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3685,7 +3685,7 @@ model_i960KA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3701,7 +3701,7 @@ model_i960KA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3717,7 +3717,7 @@ model_i960KA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3733,7 +3733,7 @@ model_i960KA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3749,7 +3749,7 @@ model_i960KA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3765,7 +3765,7 @@ model_i960KA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3781,7 +3781,7 @@ model_i960KA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3797,7 +3797,7 @@ model_i960KA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3813,7 +3813,7 @@ model_i960KA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3829,7 +3829,7 @@ model_i960KA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3845,7 +3845,7 @@ model_i960KA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3861,7 +3861,7 @@ model_i960KA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3877,7 +3877,7 @@ model_i960KA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3893,7 +3893,7 @@ model_i960KA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3909,7 +3909,7 @@ model_i960KA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3925,7 +3925,7 @@ model_i960KA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3941,7 +3941,7 @@ model_i960KA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3957,7 +3957,7 @@ model_i960KA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3973,7 +3973,7 @@ model_i960KA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3989,7 +3989,7 @@ model_i960KA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4005,7 +4005,7 @@ model_i960KA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4021,7 +4021,7 @@ model_i960KA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4037,7 +4037,7 @@ model_i960KA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4053,7 +4053,7 @@ model_i960KA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4069,7 +4069,7 @@ model_i960KA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4085,7 +4085,7 @@ model_i960KA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4101,7 +4101,7 @@ model_i960KA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4117,7 +4117,7 @@ model_i960KA_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4133,7 +4133,7 @@ model_i960KA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4149,7 +4149,7 @@ model_i960KA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4165,7 +4165,7 @@ model_i960KA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4181,7 +4181,7 @@ model_i960KA_cmpo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4197,7 +4197,7 @@ model_i960KA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4213,7 +4213,7 @@ model_i960KA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4229,7 +4229,7 @@ model_i960KA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testno_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4245,7 +4245,7 @@ model_i960KA_testno_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testg_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4261,7 +4261,7 @@ model_i960KA_testg_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_teste_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4277,7 +4277,7 @@ model_i960KA_teste_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testge_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4293,7 +4293,7 @@ model_i960KA_testge_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testl_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4309,7 +4309,7 @@ model_i960KA_testl_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testne_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4325,7 +4325,7 @@ model_i960KA_testne_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testle_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4341,7 +4341,7 @@ model_i960KA_testle_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_testo_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4357,7 +4357,7 @@ model_i960KA_testo_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bno (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4373,7 +4373,7 @@ model_i960KA_bno (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4389,7 +4389,7 @@ model_i960KA_bg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_be (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4405,7 +4405,7 @@ model_i960KA_be (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bge (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4421,7 +4421,7 @@ model_i960KA_bge (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4437,7 +4437,7 @@ model_i960KA_bl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bne (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4453,7 +4453,7 @@ model_i960KA_bne (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ble (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4469,7 +4469,7 @@ model_i960KA_ble (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4485,7 +4485,7 @@ model_i960KA_bo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_b (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_b.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4501,7 +4501,7 @@ model_i960KA_b (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4517,7 +4517,7 @@ model_i960KA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4533,7 +4533,7 @@ model_i960KA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4549,7 +4549,7 @@ model_i960KA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bx_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4565,7 +4565,7 @@ model_i960KA_bx_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4581,7 +4581,7 @@ model_i960KA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_callx_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4597,7 +4597,7 @@ model_i960KA_callx_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4613,7 +4613,7 @@ model_i960KA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4629,7 +4629,7 @@ model_i960KA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_ret (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4645,7 +4645,7 @@ model_i960KA_ret (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_calls (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_calls.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4661,7 +4661,7 @@ model_i960KA_calls (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_fmark (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4677,7 +4677,7 @@ model_i960KA_fmark (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960KA_flushreg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_flushreg.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4693,7 +4693,7 @@ model_i960KA_flushreg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_mulo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4709,7 +4709,7 @@ model_i960CA_mulo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_mulo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4725,7 +4725,7 @@ model_i960CA_mulo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_mulo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4741,7 +4741,7 @@ model_i960CA_mulo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_mulo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4757,7 +4757,7 @@ model_i960CA_mulo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4773,7 +4773,7 @@ model_i960CA_remo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4789,7 +4789,7 @@ model_i960CA_remo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4805,7 +4805,7 @@ model_i960CA_remo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4821,7 +4821,7 @@ model_i960CA_remo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4837,7 +4837,7 @@ model_i960CA_divo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4853,7 +4853,7 @@ model_i960CA_divo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4869,7 +4869,7 @@ model_i960CA_divo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4885,7 +4885,7 @@ model_i960CA_divo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4901,7 +4901,7 @@ model_i960CA_remi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remi1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4917,7 +4917,7 @@ model_i960CA_remi1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remi2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4933,7 +4933,7 @@ model_i960CA_remi2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_remi3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4949,7 +4949,7 @@ model_i960CA_remi3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4965,7 +4965,7 @@ model_i960CA_divi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divi1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4981,7 +4981,7 @@ model_i960CA_divi1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divi2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4997,7 +4997,7 @@ model_i960CA_divi2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_divi3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5013,7 +5013,7 @@ model_i960CA_divi3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_addo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5029,7 +5029,7 @@ model_i960CA_addo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_addo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5045,7 +5045,7 @@ model_i960CA_addo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_addo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5061,7 +5061,7 @@ model_i960CA_addo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_addo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5077,7 +5077,7 @@ model_i960CA_addo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_subo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5093,7 +5093,7 @@ model_i960CA_subo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_subo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5109,7 +5109,7 @@ model_i960CA_subo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_subo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5125,7 +5125,7 @@ model_i960CA_subo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_subo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5141,7 +5141,7 @@ model_i960CA_subo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notbit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5157,7 +5157,7 @@ model_i960CA_notbit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notbit1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5173,7 +5173,7 @@ model_i960CA_notbit1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notbit2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5189,7 +5189,7 @@ model_i960CA_notbit2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notbit3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5205,7 +5205,7 @@ model_i960CA_notbit3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_and (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5221,7 +5221,7 @@ model_i960CA_and (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_and1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5237,7 +5237,7 @@ model_i960CA_and1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_and2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5253,7 +5253,7 @@ model_i960CA_and2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_and3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5269,7 +5269,7 @@ model_i960CA_and3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_andnot (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5285,7 +5285,7 @@ model_i960CA_andnot (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_andnot1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5301,7 +5301,7 @@ model_i960CA_andnot1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_andnot2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5317,7 +5317,7 @@ model_i960CA_andnot2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_andnot3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5333,7 +5333,7 @@ model_i960CA_andnot3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_setbit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5349,7 +5349,7 @@ model_i960CA_setbit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_setbit1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5365,7 +5365,7 @@ model_i960CA_setbit1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_setbit2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5381,7 +5381,7 @@ model_i960CA_setbit2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_setbit3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5397,7 +5397,7 @@ model_i960CA_setbit3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notand (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5413,7 +5413,7 @@ model_i960CA_notand (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notand1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5429,7 +5429,7 @@ model_i960CA_notand1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notand2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5445,7 +5445,7 @@ model_i960CA_notand2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_notand3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5461,7 +5461,7 @@ model_i960CA_notand3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5477,7 +5477,7 @@ model_i960CA_xor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xor1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5493,7 +5493,7 @@ model_i960CA_xor1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xor2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5509,7 +5509,7 @@ model_i960CA_xor2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5525,7 +5525,7 @@ model_i960CA_xor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_or (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5541,7 +5541,7 @@ model_i960CA_or (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_or1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5557,7 +5557,7 @@ model_i960CA_or1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_or2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5573,7 +5573,7 @@ model_i960CA_or2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_or3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5589,7 +5589,7 @@ model_i960CA_or3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_nor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5605,7 +5605,7 @@ model_i960CA_nor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_nor1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5621,7 +5621,7 @@ model_i960CA_nor1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_nor2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5637,7 +5637,7 @@ model_i960CA_nor2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_nor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5653,7 +5653,7 @@ model_i960CA_nor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xnor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5669,7 +5669,7 @@ model_i960CA_xnor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xnor1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5685,7 +5685,7 @@ model_i960CA_xnor1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xnor2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5701,7 +5701,7 @@ model_i960CA_xnor2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_xnor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5717,7 +5717,7 @@ model_i960CA_xnor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_not (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5733,7 +5733,7 @@ model_i960CA_not (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_not1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5749,7 +5749,7 @@ model_i960CA_not1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_not2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5765,7 +5765,7 @@ model_i960CA_not2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_not3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5781,7 +5781,7 @@ model_i960CA_not3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ornot (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5797,7 +5797,7 @@ model_i960CA_ornot (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ornot1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5813,7 +5813,7 @@ model_i960CA_ornot1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ornot2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5829,7 +5829,7 @@ model_i960CA_ornot2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ornot3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5845,7 +5845,7 @@ model_i960CA_ornot3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_clrbit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5861,7 +5861,7 @@ model_i960CA_clrbit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5877,7 +5877,7 @@ model_i960CA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5893,7 +5893,7 @@ model_i960CA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5909,7 +5909,7 @@ model_i960CA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shlo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5925,7 +5925,7 @@ model_i960CA_shlo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shlo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5941,7 +5941,7 @@ model_i960CA_shlo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shlo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5957,7 +5957,7 @@ model_i960CA_shlo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shlo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5973,7 +5973,7 @@ model_i960CA_shlo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shro (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5989,7 +5989,7 @@ model_i960CA_shro (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shro1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6005,7 +6005,7 @@ model_i960CA_shro1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shro2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6021,7 +6021,7 @@ model_i960CA_shro2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shro3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6037,7 +6037,7 @@ model_i960CA_shro3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shli (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6053,7 +6053,7 @@ model_i960CA_shli (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shli1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6069,7 +6069,7 @@ model_i960CA_shli1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shli2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6085,7 +6085,7 @@ model_i960CA_shli2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shli3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6101,7 +6101,7 @@ model_i960CA_shli3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shri (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6117,7 +6117,7 @@ model_i960CA_shri (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shri1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6133,7 +6133,7 @@ model_i960CA_shri1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shri2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6149,7 +6149,7 @@ model_i960CA_shri2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_shri3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6165,7 +6165,7 @@ model_i960CA_shri3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_emul (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6181,7 +6181,7 @@ model_i960CA_emul (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_emul1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6197,7 +6197,7 @@ model_i960CA_emul1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_emul2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6213,7 +6213,7 @@ model_i960CA_emul2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_emul3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6229,7 +6229,7 @@ model_i960CA_emul3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_mov (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6245,7 +6245,7 @@ model_i960CA_mov (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_mov1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6261,7 +6261,7 @@ model_i960CA_mov1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_movl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movl.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6277,7 +6277,7 @@ model_i960CA_movl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_movl1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movl1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6293,7 +6293,7 @@ model_i960CA_movl1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_movt (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movt.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6309,7 +6309,7 @@ model_i960CA_movt (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_movt1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movt1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6325,7 +6325,7 @@ model_i960CA_movt1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_movq (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movq.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6341,7 +6341,7 @@ model_i960CA_movq (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_movq1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movq1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6357,7 +6357,7 @@ model_i960CA_movq1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_modpc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6373,7 +6373,7 @@ model_i960CA_modpc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_modac (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6389,7 +6389,7 @@ model_i960CA_modac (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6405,7 +6405,7 @@ model_i960CA_lda_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6421,7 +6421,7 @@ model_i960CA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6437,7 +6437,7 @@ model_i960CA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6453,7 +6453,7 @@ model_i960CA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6469,7 +6469,7 @@ model_i960CA_lda_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6485,7 +6485,7 @@ model_i960CA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6501,7 +6501,7 @@ model_i960CA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6517,7 +6517,7 @@ model_i960CA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6533,7 +6533,7 @@ model_i960CA_ld_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6549,7 +6549,7 @@ model_i960CA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6565,7 +6565,7 @@ model_i960CA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6581,7 +6581,7 @@ model_i960CA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6597,7 +6597,7 @@ model_i960CA_ld_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6613,7 +6613,7 @@ model_i960CA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6629,7 +6629,7 @@ model_i960CA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6645,7 +6645,7 @@ model_i960CA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6661,7 +6661,7 @@ model_i960CA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6677,7 +6677,7 @@ model_i960CA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6693,7 +6693,7 @@ model_i960CA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6709,7 +6709,7 @@ model_i960CA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6725,7 +6725,7 @@ model_i960CA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6741,7 +6741,7 @@ model_i960CA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6757,7 +6757,7 @@ model_i960CA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6773,7 +6773,7 @@ model_i960CA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6789,7 +6789,7 @@ model_i960CA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6805,7 +6805,7 @@ model_i960CA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6821,7 +6821,7 @@ model_i960CA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6837,7 +6837,7 @@ model_i960CA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6853,7 +6853,7 @@ model_i960CA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6869,7 +6869,7 @@ model_i960CA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6885,7 +6885,7 @@ model_i960CA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6901,7 +6901,7 @@ model_i960CA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6917,7 +6917,7 @@ model_i960CA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6933,7 +6933,7 @@ model_i960CA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6949,7 +6949,7 @@ model_i960CA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6965,7 +6965,7 @@ model_i960CA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6981,7 +6981,7 @@ model_i960CA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -6997,7 +6997,7 @@ model_i960CA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7013,7 +7013,7 @@ model_i960CA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7029,7 +7029,7 @@ model_i960CA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7045,7 +7045,7 @@ model_i960CA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7061,7 +7061,7 @@ model_i960CA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7077,7 +7077,7 @@ model_i960CA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7093,7 +7093,7 @@ model_i960CA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7109,7 +7109,7 @@ model_i960CA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7125,7 +7125,7 @@ model_i960CA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7141,7 +7141,7 @@ model_i960CA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7157,7 +7157,7 @@ model_i960CA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7173,7 +7173,7 @@ model_i960CA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7189,7 +7189,7 @@ model_i960CA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7205,7 +7205,7 @@ model_i960CA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7221,7 +7221,7 @@ model_i960CA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7237,7 +7237,7 @@ model_i960CA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7253,7 +7253,7 @@ model_i960CA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7269,7 +7269,7 @@ model_i960CA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7285,7 +7285,7 @@ model_i960CA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7301,7 +7301,7 @@ model_i960CA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7317,7 +7317,7 @@ model_i960CA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7333,7 +7333,7 @@ model_i960CA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7349,7 +7349,7 @@ model_i960CA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7365,7 +7365,7 @@ model_i960CA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7381,7 +7381,7 @@ model_i960CA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7397,7 +7397,7 @@ model_i960CA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7413,7 +7413,7 @@ model_i960CA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7429,7 +7429,7 @@ model_i960CA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7445,7 +7445,7 @@ model_i960CA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7461,7 +7461,7 @@ model_i960CA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7477,7 +7477,7 @@ model_i960CA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7493,7 +7493,7 @@ model_i960CA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7509,7 +7509,7 @@ model_i960CA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7525,7 +7525,7 @@ model_i960CA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7541,7 +7541,7 @@ model_i960CA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7557,7 +7557,7 @@ model_i960CA_st_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7573,7 +7573,7 @@ model_i960CA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7589,7 +7589,7 @@ model_i960CA_st_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7605,7 +7605,7 @@ model_i960CA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7621,7 +7621,7 @@ model_i960CA_st_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7637,7 +7637,7 @@ model_i960CA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7653,7 +7653,7 @@ model_i960CA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7669,7 +7669,7 @@ model_i960CA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7685,7 +7685,7 @@ model_i960CA_stob_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7701,7 +7701,7 @@ model_i960CA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7717,7 +7717,7 @@ model_i960CA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7733,7 +7733,7 @@ model_i960CA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7749,7 +7749,7 @@ model_i960CA_stob_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7765,7 +7765,7 @@ model_i960CA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7781,7 +7781,7 @@ model_i960CA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7797,7 +7797,7 @@ model_i960CA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7813,7 +7813,7 @@ model_i960CA_stos_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7829,7 +7829,7 @@ model_i960CA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7845,7 +7845,7 @@ model_i960CA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7861,7 +7861,7 @@ model_i960CA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7877,7 +7877,7 @@ model_i960CA_stos_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7893,7 +7893,7 @@ model_i960CA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7909,7 +7909,7 @@ model_i960CA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7925,7 +7925,7 @@ model_i960CA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7941,7 +7941,7 @@ model_i960CA_stl_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7957,7 +7957,7 @@ model_i960CA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7973,7 +7973,7 @@ model_i960CA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -7989,7 +7989,7 @@ model_i960CA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8005,7 +8005,7 @@ model_i960CA_stl_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8021,7 +8021,7 @@ model_i960CA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8037,7 +8037,7 @@ model_i960CA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8053,7 +8053,7 @@ model_i960CA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8069,7 +8069,7 @@ model_i960CA_stt_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8085,7 +8085,7 @@ model_i960CA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8101,7 +8101,7 @@ model_i960CA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8117,7 +8117,7 @@ model_i960CA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8133,7 +8133,7 @@ model_i960CA_stt_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8149,7 +8149,7 @@ model_i960CA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8165,7 +8165,7 @@ model_i960CA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8181,7 +8181,7 @@ model_i960CA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8197,7 +8197,7 @@ model_i960CA_stq_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8213,7 +8213,7 @@ model_i960CA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8229,7 +8229,7 @@ model_i960CA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8245,7 +8245,7 @@ model_i960CA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8261,7 +8261,7 @@ model_i960CA_stq_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8277,7 +8277,7 @@ model_i960CA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8293,7 +8293,7 @@ model_i960CA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8309,7 +8309,7 @@ model_i960CA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8325,7 +8325,7 @@ model_i960CA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8341,7 +8341,7 @@ model_i960CA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8357,7 +8357,7 @@ model_i960CA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8373,7 +8373,7 @@ model_i960CA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8389,7 +8389,7 @@ model_i960CA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8405,7 +8405,7 @@ model_i960CA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8421,7 +8421,7 @@ model_i960CA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8437,7 +8437,7 @@ model_i960CA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8453,7 +8453,7 @@ model_i960CA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8469,7 +8469,7 @@ model_i960CA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8485,7 +8485,7 @@ model_i960CA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8501,7 +8501,7 @@ model_i960CA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8517,7 +8517,7 @@ model_i960CA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8533,7 +8533,7 @@ model_i960CA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8549,7 +8549,7 @@ model_i960CA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8565,7 +8565,7 @@ model_i960CA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8581,7 +8581,7 @@ model_i960CA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8597,7 +8597,7 @@ model_i960CA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8613,7 +8613,7 @@ model_i960CA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8629,7 +8629,7 @@ model_i960CA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8645,7 +8645,7 @@ model_i960CA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8661,7 +8661,7 @@ model_i960CA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8677,7 +8677,7 @@ model_i960CA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8693,7 +8693,7 @@ model_i960CA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8709,7 +8709,7 @@ model_i960CA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8725,7 +8725,7 @@ model_i960CA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8741,7 +8741,7 @@ model_i960CA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8757,7 +8757,7 @@ model_i960CA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8773,7 +8773,7 @@ model_i960CA_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8789,7 +8789,7 @@ model_i960CA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8805,7 +8805,7 @@ model_i960CA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8821,7 +8821,7 @@ model_i960CA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8837,7 +8837,7 @@ model_i960CA_cmpo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8853,7 +8853,7 @@ model_i960CA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8869,7 +8869,7 @@ model_i960CA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8885,7 +8885,7 @@ model_i960CA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testno_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8901,7 +8901,7 @@ model_i960CA_testno_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testg_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8917,7 +8917,7 @@ model_i960CA_testg_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_teste_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8933,7 +8933,7 @@ model_i960CA_teste_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testge_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8949,7 +8949,7 @@ model_i960CA_testge_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testl_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8965,7 +8965,7 @@ model_i960CA_testl_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testne_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8981,7 +8981,7 @@ model_i960CA_testne_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testle_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -8997,7 +8997,7 @@ model_i960CA_testle_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_testo_reg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9013,7 +9013,7 @@ model_i960CA_testo_reg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bno (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9029,7 +9029,7 @@ model_i960CA_bno (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9045,7 +9045,7 @@ model_i960CA_bg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_be (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9061,7 +9061,7 @@ model_i960CA_be (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bge (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9077,7 +9077,7 @@ model_i960CA_bge (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9093,7 +9093,7 @@ model_i960CA_bl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bne (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9109,7 +9109,7 @@ model_i960CA_bne (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ble (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9125,7 +9125,7 @@ model_i960CA_ble (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9141,7 +9141,7 @@ model_i960CA_bo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_b (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_b.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9157,7 +9157,7 @@ model_i960CA_b (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9173,7 +9173,7 @@ model_i960CA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9189,7 +9189,7 @@ model_i960CA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9205,7 +9205,7 @@ model_i960CA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bx_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9221,7 +9221,7 @@ model_i960CA_bx_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9237,7 +9237,7 @@ model_i960CA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_callx_disp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9253,7 +9253,7 @@ model_i960CA_callx_disp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9269,7 +9269,7 @@ model_i960CA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9285,7 +9285,7 @@ model_i960CA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_ret (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9301,7 +9301,7 @@ model_i960CA_ret (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_calls (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_calls.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9317,7 +9317,7 @@ model_i960CA_calls (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_fmark (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -9333,7 +9333,7 @@ model_i960CA_fmark (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_i960CA_flushreg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_flushreg.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
diff --git a/sim/i960/sem-switch.c b/sim/i960/sem-switch.c
index b45109f..15f6b70 100644
--- a/sim/i960/sem-switch.c
+++ b/sim/i960/sem-switch.c
@@ -334,11 +334,13 @@ with this program; if not, write to the Free Software Foundation, Inc.,
   int i;
 
   for (i = 0; labels[i].label != 0; ++i)
+    {
 #if FAST_P
-    CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
+      CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 #else
-    CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
+      CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 #endif
+    }
 
 #undef DEFINE_LABELS
 #endif /* DEFINE_LABELS */
@@ -458,12 +460,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 #if WITH_SCACHE_PBB_I960BASE
 #ifdef DEFINE_SWITCH
     vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
-			       pbb_br_npc_ptr, pbb_br_npc);
+			       pbb_br_type, pbb_br_npc);
     BREAK (sem);
 #else
     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
     vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
-			       CPU_PBB_BR_NPC_PTR (current_cpu),
+			       CPU_PBB_BR_TYPE (current_cpu),
 			       CPU_PBB_BR_NPC (current_cpu));
 #endif
 #endif
@@ -524,7 +526,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -543,7 +545,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -562,7 +564,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -581,7 +583,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -600,7 +602,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -619,7 +621,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -638,7 +640,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -657,7 +659,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -676,7 +678,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -695,7 +697,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -714,7 +716,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -733,7 +735,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -752,7 +754,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -771,7 +773,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -790,7 +792,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -809,7 +811,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -828,7 +830,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -847,7 +849,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -866,7 +868,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -885,7 +887,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -904,7 +906,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -923,7 +925,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -942,7 +944,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -961,7 +963,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -980,7 +982,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -999,7 +1001,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1018,7 +1020,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1037,7 +1039,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1056,7 +1058,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1075,7 +1077,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1094,7 +1096,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1113,7 +1115,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1132,7 +1134,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1151,7 +1153,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1170,7 +1172,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1189,7 +1191,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1208,7 +1210,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1227,7 +1229,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1246,7 +1248,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1265,7 +1267,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1284,7 +1286,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1303,7 +1305,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1322,7 +1324,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1341,7 +1343,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1360,7 +1362,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1379,7 +1381,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1398,7 +1400,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1417,7 +1419,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1436,7 +1438,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1455,7 +1457,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1474,7 +1476,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1493,7 +1495,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1512,7 +1514,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1531,7 +1533,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1550,7 +1552,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1569,7 +1571,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1588,7 +1590,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1607,7 +1609,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1626,7 +1628,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1645,7 +1647,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1664,7 +1666,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1683,7 +1685,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1702,7 +1704,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1721,7 +1723,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1740,7 +1742,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_not.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1759,7 +1761,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_not1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1778,7 +1780,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1797,7 +1799,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1816,7 +1818,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1835,7 +1837,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1854,7 +1856,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1873,7 +1875,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1892,7 +1894,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1911,7 +1913,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1930,7 +1932,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1949,7 +1951,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1968,7 +1970,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -1987,7 +1989,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2006,7 +2008,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2025,7 +2027,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2044,7 +2046,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2063,7 +2065,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2082,7 +2084,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2101,7 +2103,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2120,7 +2122,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2139,7 +2141,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2158,7 +2160,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2177,7 +2179,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2196,7 +2198,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2215,7 +2217,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2234,7 +2236,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2253,7 +2255,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2272,7 +2274,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_emul.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2302,7 +2304,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_emul1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2332,7 +2334,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_emul2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2362,7 +2364,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_emul3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2392,7 +2394,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2411,7 +2413,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2430,7 +2432,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movl.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2460,7 +2462,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movl1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2488,7 +2490,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movt.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2523,7 +2525,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movt1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2556,7 +2558,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movq.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2596,7 +2598,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movq1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2634,7 +2636,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2653,7 +2655,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2672,7 +2674,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2691,7 +2693,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2710,7 +2712,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2729,7 +2731,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2748,7 +2750,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2767,7 +2769,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2786,7 +2788,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2805,7 +2807,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2824,7 +2826,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2843,7 +2845,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2862,7 +2864,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2881,7 +2883,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2900,7 +2902,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2919,7 +2921,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2938,7 +2940,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2957,7 +2959,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -2976,7 +2978,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2995,7 +2997,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3014,7 +3016,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3033,7 +3035,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3052,7 +3054,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3071,7 +3073,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3090,7 +3092,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3109,7 +3111,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3128,7 +3130,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3147,7 +3149,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3166,7 +3168,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3185,7 +3187,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3204,7 +3206,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3223,7 +3225,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3242,7 +3244,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3261,7 +3263,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3280,7 +3282,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3299,7 +3301,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3318,7 +3320,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3337,7 +3339,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3356,7 +3358,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3375,7 +3377,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3394,7 +3396,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3413,7 +3415,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3432,7 +3434,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3451,7 +3453,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3470,7 +3472,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3489,7 +3491,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3508,7 +3510,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3527,7 +3529,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3546,7 +3548,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3565,7 +3567,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3584,7 +3586,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3614,7 +3616,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3644,7 +3646,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3674,7 +3676,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3704,7 +3706,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3734,7 +3736,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3764,7 +3766,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3794,7 +3796,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3824,7 +3826,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3859,7 +3861,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3894,7 +3896,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3929,7 +3931,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -3964,7 +3966,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -3999,7 +4001,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4034,7 +4036,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4069,7 +4071,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4104,7 +4106,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4144,7 +4146,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4184,7 +4186,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4224,7 +4226,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4264,7 +4266,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4304,7 +4306,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4344,7 +4346,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4384,7 +4386,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4424,7 +4426,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4443,7 +4445,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4462,7 +4464,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4481,7 +4483,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4500,7 +4502,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4519,7 +4521,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4538,7 +4540,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4557,7 +4559,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4576,7 +4578,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4595,7 +4597,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4614,7 +4616,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4633,7 +4635,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4652,7 +4654,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4671,7 +4673,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4690,7 +4692,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4709,7 +4711,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4728,7 +4730,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4747,7 +4749,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4766,7 +4768,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4785,7 +4787,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4804,7 +4806,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4823,7 +4825,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4842,7 +4844,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4861,7 +4863,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -4880,7 +4882,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4908,7 +4910,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4936,7 +4938,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4964,7 +4966,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4992,7 +4994,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5020,7 +5022,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5048,7 +5050,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5076,7 +5078,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5104,7 +5106,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5137,7 +5139,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5170,7 +5172,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5203,7 +5205,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5236,7 +5238,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5269,7 +5271,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5302,7 +5304,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5335,7 +5337,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5368,7 +5370,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5406,7 +5408,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5444,7 +5446,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5482,7 +5484,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -5520,7 +5522,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5558,7 +5560,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5596,7 +5598,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5634,7 +5636,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
@@ -5672,7 +5674,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5681,7 +5683,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5697,7 +5699,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5706,7 +5708,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5722,7 +5724,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5731,7 +5733,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5747,7 +5749,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5756,7 +5758,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5772,7 +5774,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5781,7 +5783,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5797,7 +5799,7 @@ if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5806,7 +5808,7 @@ if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5822,7 +5824,7 @@ if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5831,7 +5833,7 @@ if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5847,7 +5849,7 @@ if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5856,7 +5858,7 @@ if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5872,7 +5874,7 @@ if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5881,7 +5883,7 @@ if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5897,7 +5899,7 @@ if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5906,7 +5908,7 @@ if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5922,7 +5924,7 @@ if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5931,7 +5933,7 @@ if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5947,7 +5949,7 @@ if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5956,7 +5958,7 @@ if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5972,7 +5974,7 @@ if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -5981,7 +5983,7 @@ if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5997,7 +5999,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6006,7 +6008,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6022,7 +6024,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6031,7 +6033,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6047,7 +6049,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6056,7 +6058,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6072,7 +6074,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6081,7 +6083,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6097,7 +6099,7 @@ if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6106,7 +6108,7 @@ if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6122,7 +6124,7 @@ if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6131,7 +6133,7 @@ if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6147,7 +6149,7 @@ if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6156,7 +6158,7 @@ if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6172,7 +6174,7 @@ if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6181,7 +6183,7 @@ if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6197,7 +6199,7 @@ if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6206,7 +6208,7 @@ if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6222,7 +6224,7 @@ if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6231,7 +6233,7 @@ if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6247,7 +6249,7 @@ if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6256,7 +6258,7 @@ if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6272,7 +6274,7 @@ if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6281,7 +6283,7 @@ if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6297,7 +6299,7 @@ if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6306,7 +6308,7 @@ if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
 if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6322,7 +6324,7 @@ if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6331,7 +6333,7 @@ if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6347,7 +6349,7 @@ if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6356,7 +6358,7 @@ if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
 if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6372,7 +6374,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6391,7 +6393,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpi1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6410,7 +6412,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpi2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6429,7 +6431,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpi3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6448,7 +6450,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6467,7 +6469,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6486,7 +6488,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6505,7 +6507,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6524,7 +6526,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6543,7 +6545,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6562,7 +6564,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6581,7 +6583,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6600,7 +6602,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6619,7 +6621,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6638,7 +6640,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6657,7 +6659,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -6676,7 +6678,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6685,7 +6687,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 if (EQSI (CPU (h_cc), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6701,7 +6703,7 @@ if (EQSI (CPU (h_cc), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6710,7 +6712,7 @@ if (EQSI (CPU (h_cc), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6726,7 +6728,7 @@ if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6735,7 +6737,7 @@ if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6751,7 +6753,7 @@ if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6760,7 +6762,7 @@ if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6776,7 +6778,7 @@ if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6785,7 +6787,7 @@ if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6801,7 +6803,7 @@ if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6810,7 +6812,7 @@ if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6826,7 +6828,7 @@ if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6835,7 +6837,7 @@ if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6851,7 +6853,7 @@ if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6860,7 +6862,7 @@ if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
 if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6876,7 +6878,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_b.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6884,7 +6886,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 
@@ -6897,7 +6899,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6918,7 +6920,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6939,7 +6941,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6960,7 +6962,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -6968,7 +6970,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 
   {
     USI opval = FLD (f_optdisp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 
@@ -6981,7 +6983,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7002,7 +7004,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7034,7 +7036,7 @@ SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT
 SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
   {
     USI opval = FLD (f_optdisp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
@@ -7079,7 +7081,7 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7156,7 +7158,7 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7233,7 +7235,7 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7277,7 +7279,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_calls.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7298,7 +7300,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -7319,7 +7321,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_flushreg.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
diff --git a/sim/i960/sem.c b/sim/i960/sem.c
index 45f4f7f..7d5f28b 100644
--- a/sim/i960/sem.c
+++ b/sim/i960/sem.c
@@ -32,9 +32,20 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #undef GET_ATTR
 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 
+/* This is used so that we can compile two copies of the semantic code,
+   one with full feature support and one without that runs fast(er).
+   FAST_P, when desired, is defined on the command line, -DFAST_P=1.  */
+#if FAST_P
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
+#undef TRACE_RESULT
+#define TRACE_RESULT(cpu, abuf, name, type, val)
+#else
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
+#endif
+
 /* x-invalid: --invalid-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -59,7 +70,7 @@ SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-after: --after-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -80,7 +91,7 @@ SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-before: --before-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -101,7 +112,7 @@ SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-cti-chain: --cti-chain-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -114,12 +125,12 @@ SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 #if WITH_SCACHE_PBB_I960BASE
 #ifdef DEFINE_SWITCH
     vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
-			       pbb_br_npc_ptr, pbb_br_npc);
+			       pbb_br_type, pbb_br_npc);
     BREAK (sem);
 #else
     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
     vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
-			       CPU_PBB_BR_NPC_PTR (current_cpu),
+			       CPU_PBB_BR_TYPE (current_cpu),
 			       CPU_PBB_BR_NPC (current_cpu));
 #endif
 #endif
@@ -131,7 +142,7 @@ SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-chain: --chain-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -155,7 +166,7 @@ SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-begin: --begin-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -182,10 +193,10 @@ SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mulo: mulo $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -203,10 +214,10 @@ SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mulo1: mulo $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -224,10 +235,10 @@ SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mulo2: mulo $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -245,10 +256,10 @@ SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mulo3: mulo $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -266,10 +277,10 @@ SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remo: remo $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -287,10 +298,10 @@ SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remo1: remo $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -308,10 +319,10 @@ SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remo2: remo $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -329,10 +340,10 @@ SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remo3: remo $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -350,10 +361,10 @@ SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divo: divo $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -371,10 +382,10 @@ SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divo1: divo $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -392,10 +403,10 @@ SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divo2: divo $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -413,10 +424,10 @@ SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divo3: divo $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -434,10 +445,10 @@ SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remi: remi $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -455,10 +466,10 @@ SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remi1: remi $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -476,10 +487,10 @@ SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remi2: remi $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -497,10 +508,10 @@ SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* remi3: remi $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -518,10 +529,10 @@ SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divi: divi $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -539,10 +550,10 @@ SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divi1: divi $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -560,10 +571,10 @@ SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divi2: divi $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -581,10 +592,10 @@ SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* divi3: divi $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -602,10 +613,10 @@ SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addo: addo $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -623,10 +634,10 @@ SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addo1: addo $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -644,10 +655,10 @@ SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addo2: addo $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -665,10 +676,10 @@ SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addo3: addo $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -686,10 +697,10 @@ SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* subo: subo $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -707,10 +718,10 @@ SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* subo1: subo $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -728,10 +739,10 @@ SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* subo2: subo $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -749,10 +760,10 @@ SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* subo3: subo $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -770,10 +781,10 @@ SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notbit: notbit $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -791,10 +802,10 @@ SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notbit1: notbit $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -812,10 +823,10 @@ SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notbit2: notbit $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -833,10 +844,10 @@ SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notbit3: notbit $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -854,10 +865,10 @@ SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* and: and $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -875,10 +886,10 @@ SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* and1: and $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -896,10 +907,10 @@ SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* and2: and $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -917,10 +928,10 @@ SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* and3: and $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -938,10 +949,10 @@ SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andnot: andnot $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -959,10 +970,10 @@ SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andnot1: andnot $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -980,10 +991,10 @@ SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andnot2: andnot $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1001,10 +1012,10 @@ SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andnot3: andnot $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1022,10 +1033,10 @@ SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* setbit: setbit $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1043,10 +1054,10 @@ SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* setbit1: setbit $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1064,10 +1075,10 @@ SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* setbit2: setbit $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1085,10 +1096,10 @@ SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* setbit3: setbit $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1106,10 +1117,10 @@ SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notand: notand $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1127,10 +1138,10 @@ SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notand1: notand $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1148,10 +1159,10 @@ SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notand2: notand $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1169,10 +1180,10 @@ SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* notand3: notand $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1190,10 +1201,10 @@ SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xor: xor $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1211,10 +1222,10 @@ SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xor1: xor $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1232,10 +1243,10 @@ SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xor2: xor $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1253,10 +1264,10 @@ SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xor3: xor $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1274,10 +1285,10 @@ SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* or: or $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1295,10 +1306,10 @@ SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* or1: or $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1316,10 +1327,10 @@ SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* or2: or $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1337,10 +1348,10 @@ SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* or3: or $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1358,10 +1369,10 @@ SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* nor: nor $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1379,10 +1390,10 @@ SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* nor1: nor $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1400,10 +1411,10 @@ SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* nor2: nor $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1421,10 +1432,10 @@ SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* nor3: nor $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1442,10 +1453,10 @@ SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xnor: xnor $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1463,10 +1474,10 @@ SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xnor1: xnor $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1484,10 +1495,10 @@ SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xnor2: xnor $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1505,10 +1516,10 @@ SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xnor3: xnor $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1526,10 +1537,10 @@ SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* not: not $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1547,10 +1558,10 @@ SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* not1: not $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1568,10 +1579,10 @@ SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* not2: not $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1589,10 +1600,10 @@ SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* not3: not $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1610,10 +1621,10 @@ SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ornot: ornot $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1631,10 +1642,10 @@ SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ornot1: ornot $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1652,10 +1663,10 @@ SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ornot2: ornot $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1673,10 +1684,10 @@ SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ornot3: ornot $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1694,10 +1705,10 @@ SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* clrbit: clrbit $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1715,10 +1726,10 @@ SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* clrbit1: clrbit $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1736,10 +1747,10 @@ SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* clrbit2: clrbit $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1757,10 +1768,10 @@ SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* clrbit3: clrbit $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_notbit3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1778,10 +1789,10 @@ SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shlo: shlo $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1799,10 +1810,10 @@ SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shlo1: shlo $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1820,10 +1831,10 @@ SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shlo2: shlo $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1841,10 +1852,10 @@ SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shlo3: shlo $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1862,10 +1873,10 @@ SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shro: shro $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1883,10 +1894,10 @@ SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shro1: shro $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1904,10 +1915,10 @@ SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shro2: shro $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1925,10 +1936,10 @@ SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shro3: shro $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1946,10 +1957,10 @@ SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shli: shli $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1967,10 +1978,10 @@ SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shli1: shli $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1988,10 +1999,10 @@ SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shli2: shli $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2009,10 +2020,10 @@ SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shli3: shli $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2030,10 +2041,10 @@ SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shri: shri $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2051,10 +2062,10 @@ SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shri1: shri $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2072,10 +2083,10 @@ SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shri2: shri $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2093,10 +2104,10 @@ SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* shri3: shri $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_shlo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2114,10 +2125,10 @@ SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* emul: emul $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2146,10 +2157,10 @@ SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* emul1: emul $lit1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2178,10 +2189,10 @@ SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* emul2: emul $src1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2210,10 +2221,10 @@ SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* emul3: emul $lit1, $lit2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_emul3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2242,10 +2253,10 @@ SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mov: mov $src1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2263,10 +2274,10 @@ SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mov1: mov $lit1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_not3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2284,10 +2295,10 @@ SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movl: movl $src1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movl.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2316,10 +2327,10 @@ SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movl1: movl $lit1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movl1.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2346,10 +2357,10 @@ SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movt: movt $src1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movt.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2383,10 +2394,10 @@ SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movt1: movt $lit1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movt1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2418,10 +2429,10 @@ SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movq: movq $src1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movq.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2460,10 +2471,10 @@ SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movq1: movq $lit1, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movq1.f
+#define FLD(f) abuf->fields.sfmt_movq.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2500,10 +2511,10 @@ SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* modpc: modpc $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2521,10 +2532,10 @@ SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* modac: modac $src1, $src2, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_modpc.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2542,10 +2553,10 @@ SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lda-offset: lda $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2563,10 +2574,10 @@ SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lda-indirect-offset: lda $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2584,10 +2595,10 @@ SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* lda-indirect: lda ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2605,10 +2616,10 @@ SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lda-indirect-index: lda ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2626,10 +2637,10 @@ SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* lda-disp: lda $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2647,10 +2658,10 @@ SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lda-indirect-disp: lda $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2668,10 +2679,10 @@ SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lda-index-disp: lda $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2689,10 +2700,10 @@ SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lda-indirect-index-disp: lda $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2710,10 +2721,10 @@ SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* ld-offset: ld $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2731,10 +2742,10 @@ SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld-indirect-offset: ld $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2752,10 +2763,10 @@ SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ld-indirect: ld ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2773,10 +2784,10 @@ SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld-indirect-index: ld ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2794,10 +2805,10 @@ SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld-disp: ld $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2815,10 +2826,10 @@ SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld-indirect-disp: ld $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2836,10 +2847,10 @@ SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld-index-disp: ld $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2857,10 +2868,10 @@ SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld-indirect-index-disp: ld $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2878,10 +2889,10 @@ SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem
 
 /* ldob-offset: ldob $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2899,10 +2910,10 @@ SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldob-indirect-offset: ldob $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2920,10 +2931,10 @@ SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a
 
 /* ldob-indirect: ldob ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2941,10 +2952,10 @@ SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldob-indirect-index: ldob ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2962,10 +2973,10 @@ SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldob-disp: ldob $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2983,10 +2994,10 @@ SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldob-indirect-disp: ldob $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3004,10 +3015,10 @@ SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldob-index-disp: ldob $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3025,10 +3036,10 @@ SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldob-indirect-index-disp: ldob $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3046,10 +3057,10 @@ SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s
 
 /* ldos-offset: ldos $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3067,10 +3078,10 @@ SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldos-indirect-offset: ldos $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3088,10 +3099,10 @@ SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a
 
 /* ldos-indirect: ldos ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3109,10 +3120,10 @@ SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldos-indirect-index: ldos ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3130,10 +3141,10 @@ SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldos-disp: ldos $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3151,10 +3162,10 @@ SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldos-indirect-disp: ldos $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3172,10 +3183,10 @@ SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldos-index-disp: ldos $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3193,10 +3204,10 @@ SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldos-indirect-index-disp: ldos $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3214,10 +3225,10 @@ SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s
 
 /* ldib-offset: ldib $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3235,10 +3246,10 @@ SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldib-indirect-offset: ldib $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3256,10 +3267,10 @@ SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a
 
 /* ldib-indirect: ldib ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3277,10 +3288,10 @@ SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldib-indirect-index: ldib ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3298,10 +3309,10 @@ SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldib-disp: ldib $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3319,10 +3330,10 @@ SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldib-indirect-disp: ldib $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3340,10 +3351,10 @@ SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldib-index-disp: ldib $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3361,10 +3372,10 @@ SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldib-indirect-index-disp: ldib $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3382,10 +3393,10 @@ SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s
 
 /* ldis-offset: ldis $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3403,10 +3414,10 @@ SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldis-indirect-offset: ldis $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3424,10 +3435,10 @@ SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a
 
 /* ldis-indirect: ldis ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3445,10 +3456,10 @@ SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldis-indirect-index: ldis ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3466,10 +3477,10 @@ SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldis-disp: ldis $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3487,10 +3498,10 @@ SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldis-indirect-disp: ldis $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3508,10 +3519,10 @@ SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldis-index-disp: ldis $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3529,10 +3540,10 @@ SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldis-indirect-index-disp: ldis $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3550,10 +3561,10 @@ SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s
 
 /* ldl-offset: ldl $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3582,10 +3593,10 @@ SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldl-indirect-offset: ldl $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3614,10 +3625,10 @@ SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldl-indirect: ldl ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3646,10 +3657,10 @@ SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldl-indirect-index: ldl ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3678,10 +3689,10 @@ SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldl-disp: ldl $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3710,10 +3721,10 @@ SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldl-indirect-disp: ldl $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3742,10 +3753,10 @@ SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldl-index-disp: ldl $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3774,10 +3785,10 @@ SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldl-indirect-index-disp: ldl $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3806,10 +3817,10 @@ SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* ldt-offset: ldt $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3843,10 +3854,10 @@ SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldt-indirect-offset: ldt $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3880,10 +3891,10 @@ SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldt-indirect: ldt ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3917,10 +3928,10 @@ SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldt-indirect-index: ldt ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3954,10 +3965,10 @@ SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldt-disp: ldt $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3991,10 +4002,10 @@ SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldt-indirect-disp: ldt $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4028,10 +4039,10 @@ SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldt-index-disp: ldt $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4065,10 +4076,10 @@ SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldt-indirect-index-disp: ldt $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4102,10 +4113,10 @@ SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* ldq-offset: ldq $offset, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4144,10 +4155,10 @@ SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldq-indirect-offset: ldq $offset($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4186,10 +4197,10 @@ SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* ldq-indirect: ldq ($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4228,10 +4239,10 @@ SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldq-indirect-index: ldq ($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4270,10 +4281,10 @@ SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* ldq-disp: ldq $optdisp, $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4312,10 +4323,10 @@ SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldq-indirect-disp: ldq $optdisp($abase), $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4354,10 +4365,10 @@ SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldq-index-disp: ldq $optdisp[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4396,10 +4407,10 @@ SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldq-indirect-index-disp: ldq $optdisp($abase)[$index*S$scale], $dst */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4438,10 +4449,10 @@ SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* st-offset: st $st_src, $offset */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4459,10 +4470,10 @@ SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st-indirect-offset: st $st_src, $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4480,10 +4491,10 @@ SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* st-indirect: st $st_src, ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4501,10 +4512,10 @@ SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st-indirect-index: st $st_src, ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4522,10 +4533,10 @@ SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st-disp: st $st_src, $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4543,10 +4554,10 @@ SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st-indirect-disp: st $st_src, $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4564,10 +4575,10 @@ SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st-index-disp: st $st_src, $optdisp[$index*S$scale */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4585,10 +4596,10 @@ SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st-indirect-index-disp: st $st_src, $optdisp($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4606,10 +4617,10 @@ SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem
 
 /* stob-offset: stob $st_src, $offset */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4627,10 +4638,10 @@ SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stob-indirect-offset: stob $st_src, $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4648,10 +4659,10 @@ SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a
 
 /* stob-indirect: stob $st_src, ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4669,10 +4680,10 @@ SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stob-indirect-index: stob $st_src, ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4690,10 +4701,10 @@ SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* stob-disp: stob $st_src, $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4711,10 +4722,10 @@ SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stob-indirect-disp: stob $st_src, $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4732,10 +4743,10 @@ SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* stob-index-disp: stob $st_src, $optdisp[$index*S$scale */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4753,10 +4764,10 @@ SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stob-indirect-index-disp: stob $st_src, $optdisp($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4774,10 +4785,10 @@ SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s
 
 /* stos-offset: stos $st_src, $offset */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4795,10 +4806,10 @@ SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stos-indirect-offset: stos $st_src, $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4816,10 +4827,10 @@ SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a
 
 /* stos-indirect: stos $st_src, ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4837,10 +4848,10 @@ SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stos-indirect-index: stos $st_src, ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4858,10 +4869,10 @@ SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* stos-disp: stos $st_src, $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4879,10 +4890,10 @@ SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stos-indirect-disp: stos $st_src, $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4900,10 +4911,10 @@ SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* stos-index-disp: stos $st_src, $optdisp[$index*S$scale */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4921,10 +4932,10 @@ SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stos-indirect-index-disp: stos $st_src, $optdisp($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4942,10 +4953,10 @@ SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s
 
 /* stl-offset: stl $st_src, $offset */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4972,10 +4983,10 @@ SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stl-indirect-offset: stl $st_src, $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5002,10 +5013,10 @@ SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* stl-indirect: stl $st_src, ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5032,10 +5043,10 @@ SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stl-indirect-index: stl $st_src, ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5062,10 +5073,10 @@ SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* stl-disp: stl $st_src, $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5092,10 +5103,10 @@ SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stl-indirect-disp: stl $st_src, $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5122,10 +5133,10 @@ SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stl-index-disp: stl $st_src, $optdisp[$index*S$scale */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5152,10 +5163,10 @@ SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stl-indirect-index-disp: stl $st_src, $optdisp($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5182,10 +5193,10 @@ SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* stt-offset: stt $st_src, $offset */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5217,10 +5228,10 @@ SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stt-indirect-offset: stt $st_src, $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5252,10 +5263,10 @@ SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* stt-indirect: stt $st_src, ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5287,10 +5298,10 @@ SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stt-indirect-index: stt $st_src, ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5322,10 +5333,10 @@ SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* stt-disp: stt $st_src, $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5357,10 +5368,10 @@ SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stt-indirect-disp: stt $st_src, $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5392,10 +5403,10 @@ SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stt-index-disp: stt $st_src, $optdisp[$index*S$scale */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5427,10 +5438,10 @@ SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stt-indirect-index-disp: stt $st_src, $optdisp($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5462,10 +5473,10 @@ SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* stq-offset: stq $st_src, $offset */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5502,10 +5513,10 @@ SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stq-indirect-offset: stq $st_src, $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5542,10 +5553,10 @@ SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar
 
 /* stq-indirect: stq $st_src, ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5582,10 +5593,10 @@ SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stq-indirect-index: stq $st_src, ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5622,10 +5633,10 @@ SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* stq-disp: stq $st_src, $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5662,10 +5673,10 @@ SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stq-indirect-disp: stq $st_src, $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5702,10 +5713,10 @@ SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stq-index-disp: stq $st_src, $optdisp[$index*S$scale */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5742,10 +5753,10 @@ SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stq-indirect-index-disp: stq $st_src, $optdisp($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5782,10 +5793,10 @@ SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se
 
 /* cmpobe-reg: cmpobe $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5795,7 +5806,7 @@ SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5809,10 +5820,10 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobe-lit: cmpobe $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5822,7 +5833,7 @@ SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5836,10 +5847,10 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobne-reg: cmpobne $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5849,7 +5860,7 @@ SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5863,10 +5874,10 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobne-lit: cmpobne $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5876,7 +5887,7 @@ SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5890,10 +5901,10 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobl-reg: cmpobl $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5903,7 +5914,7 @@ SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5917,10 +5928,10 @@ if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobl-lit: cmpobl $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5930,7 +5941,7 @@ SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5944,10 +5955,10 @@ if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpoble-reg: cmpoble $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5957,7 +5968,7 @@ SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5971,10 +5982,10 @@ if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpoble-lit: cmpoble $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5984,7 +5995,7 @@ SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -5998,10 +6009,10 @@ if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobg-reg: cmpobg $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6011,7 +6022,7 @@ SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6025,10 +6036,10 @@ if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobg-lit: cmpobg $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6038,7 +6049,7 @@ SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6052,10 +6063,10 @@ if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobge-reg: cmpobge $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6065,7 +6076,7 @@ SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6079,10 +6090,10 @@ if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpobge-lit: cmpobge $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6092,7 +6103,7 @@ SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6106,10 +6117,10 @@ if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibe-reg: cmpibe $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6119,7 +6130,7 @@ SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6133,10 +6144,10 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibe-lit: cmpibe $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6146,7 +6157,7 @@ SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6160,10 +6171,10 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibne-reg: cmpibne $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6173,7 +6184,7 @@ SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6187,10 +6198,10 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibne-lit: cmpibne $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6200,7 +6211,7 @@ SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6214,10 +6225,10 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibl-reg: cmpibl $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6227,7 +6238,7 @@ SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6241,10 +6252,10 @@ if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibl-lit: cmpibl $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6254,7 +6265,7 @@ SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6268,10 +6279,10 @@ if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpible-reg: cmpible $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6281,7 +6292,7 @@ SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6295,10 +6306,10 @@ if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpible-lit: cmpible $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6308,7 +6319,7 @@ SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6322,10 +6333,10 @@ if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibg-reg: cmpibg $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6335,7 +6346,7 @@ SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6349,10 +6360,10 @@ if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibg-lit: cmpibg $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6362,7 +6373,7 @@ SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6376,10 +6387,10 @@ if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibge-reg: cmpibge $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6389,7 +6400,7 @@ SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6403,10 +6414,10 @@ if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
 
 /* cmpibge-lit: cmpibge $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6416,7 +6427,7 @@ SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6430,10 +6441,10 @@ if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
 
 /* bbc-reg: bbc $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6443,7 +6454,7 @@ SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6457,10 +6468,10 @@ if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
 
 /* bbc-lit: bbc $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6470,7 +6481,7 @@ SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6484,10 +6495,10 @@ if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 
 /* bbs-reg: bbs $br_src1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6497,7 +6508,7 @@ SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6511,10 +6522,10 @@ if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
 
 /* bbs-lit: bbs $br_lit1, $br_src2, $br_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f
+#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6524,7 +6535,7 @@ SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
   {
     USI opval = FLD (i_br_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6538,10 +6549,10 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
 
 /* cmpi: cmpi $src1, $src2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6559,10 +6570,10 @@ SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpi1: cmpi $lit1, $src2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6580,10 +6591,10 @@ SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpi2: cmpi $src1, $lit2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6601,10 +6612,10 @@ SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpi3: cmpi $lit1, $lit2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6622,10 +6633,10 @@ SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpo: cmpo $src1, $src2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo.f
+#define FLD(f) abuf->fields.sfmt_emul.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6643,10 +6654,10 @@ SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpo1: cmpo $lit1, $src2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo1.f
+#define FLD(f) abuf->fields.sfmt_emul1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6664,10 +6675,10 @@ SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpo2: cmpo $src1, $lit2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo2.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6685,10 +6696,10 @@ SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpo3: cmpo $lit1, $lit2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpo3.f
+#define FLD(f) abuf->fields.sfmt_emul3.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6706,10 +6717,10 @@ SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testno-reg: testno $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6727,10 +6738,10 @@ SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testg-reg: testg $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6748,10 +6759,10 @@ SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* teste-reg: teste $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6769,10 +6780,10 @@ SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testge-reg: testge $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6790,10 +6801,10 @@ SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testl-reg: testl $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6811,10 +6822,10 @@ SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testne-reg: testne $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6832,10 +6843,10 @@ SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testle-reg: testle $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6853,10 +6864,10 @@ SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* testo-reg: testo $br_src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_testno_reg.f
+#define FLD(f) abuf->fields.sfmt_testno_reg.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6874,10 +6885,10 @@ SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bno: bno $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6887,7 +6898,7 @@ SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQSI (CPU (h_cc), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6901,10 +6912,10 @@ if (EQSI (CPU (h_cc), 0)) {
 
 /* bg: bg $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6914,7 +6925,7 @@ SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6928,10 +6939,10 @@ if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
 
 /* be: be $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6941,7 +6952,7 @@ SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6955,10 +6966,10 @@ if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
 
 /* bge: bge $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6968,7 +6979,7 @@ SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -6982,10 +6993,10 @@ if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
 
 /* bl: bl $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -6995,7 +7006,7 @@ SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -7009,10 +7020,10 @@ if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
 
 /* bne: bne $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7022,7 +7033,7 @@ SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -7036,10 +7047,10 @@ if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
 
 /* ble: ble $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7049,7 +7060,7 @@ SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -7063,10 +7074,10 @@ if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
 
 /* bo: bo $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bno.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7076,7 +7087,7 @@ SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -7090,10 +7101,10 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
 
 /* b: b $ctrl_disp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_b.f
+#define FLD(f) abuf->fields.sfmt_bno.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7102,7 +7113,7 @@ SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
   {
     USI opval = FLD (i_ctrl_disp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 
@@ -7113,10 +7124,10 @@ SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bx-indirect-offset: bx $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7136,10 +7147,10 @@ SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg
 
 /* bx-indirect: bx ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7159,10 +7170,10 @@ SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bx-indirect-index: bx ($abase)[$index*S$scale] */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7182,10 +7193,10 @@ SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bx-disp: bx $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7194,7 +7205,7 @@ SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
   {
     USI opval = FLD (f_optdisp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 
@@ -7205,10 +7216,10 @@ SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bx-indirect-disp: bx $optdisp($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f
+#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7228,10 +7239,10 @@ SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* callx-disp: callx $optdisp */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,callx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7264,7 +7275,7 @@ SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT
 SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
   {
     USI opval = FLD (f_optdisp);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
@@ -7307,10 +7318,10 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
 
 /* callx-indirect: callx ($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,callx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7386,10 +7397,10 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
 
 /* callx-indirect-offset: callx $offset($abase) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,callx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f
+#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7465,10 +7476,10 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
 
 /* ret: ret */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.sfmt_callx_disp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7511,10 +7522,10 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31
 
 /* calls: calls $src1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_calls.f
+#define FLD(f) abuf->fields.sfmt_emul2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7534,10 +7545,10 @@ SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* fmark: fmark */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7557,10 +7568,10 @@ SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* flushreg: flushreg */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (i960base,flushreg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_flushreg.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -7572,3 +7583,324 @@ do { } while (0); /*nop*/
 #undef FLD
 }
 
+/* Table of all semantic fns.  */
+
+static const struct sem_fn_desc sem_fns[] = {
+  { I960BASE_INSN_X_INVALID, SEM_FN_NAME (i960base,x_invalid) },
+  { I960BASE_INSN_X_AFTER, SEM_FN_NAME (i960base,x_after) },
+  { I960BASE_INSN_X_BEFORE, SEM_FN_NAME (i960base,x_before) },
+  { I960BASE_INSN_X_CTI_CHAIN, SEM_FN_NAME (i960base,x_cti_chain) },
+  { I960BASE_INSN_X_CHAIN, SEM_FN_NAME (i960base,x_chain) },
+  { I960BASE_INSN_X_BEGIN, SEM_FN_NAME (i960base,x_begin) },
+  { I960BASE_INSN_MULO, SEM_FN_NAME (i960base,mulo) },
+  { I960BASE_INSN_MULO1, SEM_FN_NAME (i960base,mulo1) },
+  { I960BASE_INSN_MULO2, SEM_FN_NAME (i960base,mulo2) },
+  { I960BASE_INSN_MULO3, SEM_FN_NAME (i960base,mulo3) },
+  { I960BASE_INSN_REMO, SEM_FN_NAME (i960base,remo) },
+  { I960BASE_INSN_REMO1, SEM_FN_NAME (i960base,remo1) },
+  { I960BASE_INSN_REMO2, SEM_FN_NAME (i960base,remo2) },
+  { I960BASE_INSN_REMO3, SEM_FN_NAME (i960base,remo3) },
+  { I960BASE_INSN_DIVO, SEM_FN_NAME (i960base,divo) },
+  { I960BASE_INSN_DIVO1, SEM_FN_NAME (i960base,divo1) },
+  { I960BASE_INSN_DIVO2, SEM_FN_NAME (i960base,divo2) },
+  { I960BASE_INSN_DIVO3, SEM_FN_NAME (i960base,divo3) },
+  { I960BASE_INSN_REMI, SEM_FN_NAME (i960base,remi) },
+  { I960BASE_INSN_REMI1, SEM_FN_NAME (i960base,remi1) },
+  { I960BASE_INSN_REMI2, SEM_FN_NAME (i960base,remi2) },
+  { I960BASE_INSN_REMI3, SEM_FN_NAME (i960base,remi3) },
+  { I960BASE_INSN_DIVI, SEM_FN_NAME (i960base,divi) },
+  { I960BASE_INSN_DIVI1, SEM_FN_NAME (i960base,divi1) },
+  { I960BASE_INSN_DIVI2, SEM_FN_NAME (i960base,divi2) },
+  { I960BASE_INSN_DIVI3, SEM_FN_NAME (i960base,divi3) },
+  { I960BASE_INSN_ADDO, SEM_FN_NAME (i960base,addo) },
+  { I960BASE_INSN_ADDO1, SEM_FN_NAME (i960base,addo1) },
+  { I960BASE_INSN_ADDO2, SEM_FN_NAME (i960base,addo2) },
+  { I960BASE_INSN_ADDO3, SEM_FN_NAME (i960base,addo3) },
+  { I960BASE_INSN_SUBO, SEM_FN_NAME (i960base,subo) },
+  { I960BASE_INSN_SUBO1, SEM_FN_NAME (i960base,subo1) },
+  { I960BASE_INSN_SUBO2, SEM_FN_NAME (i960base,subo2) },
+  { I960BASE_INSN_SUBO3, SEM_FN_NAME (i960base,subo3) },
+  { I960BASE_INSN_NOTBIT, SEM_FN_NAME (i960base,notbit) },
+  { I960BASE_INSN_NOTBIT1, SEM_FN_NAME (i960base,notbit1) },
+  { I960BASE_INSN_NOTBIT2, SEM_FN_NAME (i960base,notbit2) },
+  { I960BASE_INSN_NOTBIT3, SEM_FN_NAME (i960base,notbit3) },
+  { I960BASE_INSN_AND, SEM_FN_NAME (i960base,and) },
+  { I960BASE_INSN_AND1, SEM_FN_NAME (i960base,and1) },
+  { I960BASE_INSN_AND2, SEM_FN_NAME (i960base,and2) },
+  { I960BASE_INSN_AND3, SEM_FN_NAME (i960base,and3) },
+  { I960BASE_INSN_ANDNOT, SEM_FN_NAME (i960base,andnot) },
+  { I960BASE_INSN_ANDNOT1, SEM_FN_NAME (i960base,andnot1) },
+  { I960BASE_INSN_ANDNOT2, SEM_FN_NAME (i960base,andnot2) },
+  { I960BASE_INSN_ANDNOT3, SEM_FN_NAME (i960base,andnot3) },
+  { I960BASE_INSN_SETBIT, SEM_FN_NAME (i960base,setbit) },
+  { I960BASE_INSN_SETBIT1, SEM_FN_NAME (i960base,setbit1) },
+  { I960BASE_INSN_SETBIT2, SEM_FN_NAME (i960base,setbit2) },
+  { I960BASE_INSN_SETBIT3, SEM_FN_NAME (i960base,setbit3) },
+  { I960BASE_INSN_NOTAND, SEM_FN_NAME (i960base,notand) },
+  { I960BASE_INSN_NOTAND1, SEM_FN_NAME (i960base,notand1) },
+  { I960BASE_INSN_NOTAND2, SEM_FN_NAME (i960base,notand2) },
+  { I960BASE_INSN_NOTAND3, SEM_FN_NAME (i960base,notand3) },
+  { I960BASE_INSN_XOR, SEM_FN_NAME (i960base,xor) },
+  { I960BASE_INSN_XOR1, SEM_FN_NAME (i960base,xor1) },
+  { I960BASE_INSN_XOR2, SEM_FN_NAME (i960base,xor2) },
+  { I960BASE_INSN_XOR3, SEM_FN_NAME (i960base,xor3) },
+  { I960BASE_INSN_OR, SEM_FN_NAME (i960base,or) },
+  { I960BASE_INSN_OR1, SEM_FN_NAME (i960base,or1) },
+  { I960BASE_INSN_OR2, SEM_FN_NAME (i960base,or2) },
+  { I960BASE_INSN_OR3, SEM_FN_NAME (i960base,or3) },
+  { I960BASE_INSN_NOR, SEM_FN_NAME (i960base,nor) },
+  { I960BASE_INSN_NOR1, SEM_FN_NAME (i960base,nor1) },
+  { I960BASE_INSN_NOR2, SEM_FN_NAME (i960base,nor2) },
+  { I960BASE_INSN_NOR3, SEM_FN_NAME (i960base,nor3) },
+  { I960BASE_INSN_XNOR, SEM_FN_NAME (i960base,xnor) },
+  { I960BASE_INSN_XNOR1, SEM_FN_NAME (i960base,xnor1) },
+  { I960BASE_INSN_XNOR2, SEM_FN_NAME (i960base,xnor2) },
+  { I960BASE_INSN_XNOR3, SEM_FN_NAME (i960base,xnor3) },
+  { I960BASE_INSN_NOT, SEM_FN_NAME (i960base,not) },
+  { I960BASE_INSN_NOT1, SEM_FN_NAME (i960base,not1) },
+  { I960BASE_INSN_NOT2, SEM_FN_NAME (i960base,not2) },
+  { I960BASE_INSN_NOT3, SEM_FN_NAME (i960base,not3) },
+  { I960BASE_INSN_ORNOT, SEM_FN_NAME (i960base,ornot) },
+  { I960BASE_INSN_ORNOT1, SEM_FN_NAME (i960base,ornot1) },
+  { I960BASE_INSN_ORNOT2, SEM_FN_NAME (i960base,ornot2) },
+  { I960BASE_INSN_ORNOT3, SEM_FN_NAME (i960base,ornot3) },
+  { I960BASE_INSN_CLRBIT, SEM_FN_NAME (i960base,clrbit) },
+  { I960BASE_INSN_CLRBIT1, SEM_FN_NAME (i960base,clrbit1) },
+  { I960BASE_INSN_CLRBIT2, SEM_FN_NAME (i960base,clrbit2) },
+  { I960BASE_INSN_CLRBIT3, SEM_FN_NAME (i960base,clrbit3) },
+  { I960BASE_INSN_SHLO, SEM_FN_NAME (i960base,shlo) },
+  { I960BASE_INSN_SHLO1, SEM_FN_NAME (i960base,shlo1) },
+  { I960BASE_INSN_SHLO2, SEM_FN_NAME (i960base,shlo2) },
+  { I960BASE_INSN_SHLO3, SEM_FN_NAME (i960base,shlo3) },
+  { I960BASE_INSN_SHRO, SEM_FN_NAME (i960base,shro) },
+  { I960BASE_INSN_SHRO1, SEM_FN_NAME (i960base,shro1) },
+  { I960BASE_INSN_SHRO2, SEM_FN_NAME (i960base,shro2) },
+  { I960BASE_INSN_SHRO3, SEM_FN_NAME (i960base,shro3) },
+  { I960BASE_INSN_SHLI, SEM_FN_NAME (i960base,shli) },
+  { I960BASE_INSN_SHLI1, SEM_FN_NAME (i960base,shli1) },
+  { I960BASE_INSN_SHLI2, SEM_FN_NAME (i960base,shli2) },
+  { I960BASE_INSN_SHLI3, SEM_FN_NAME (i960base,shli3) },
+  { I960BASE_INSN_SHRI, SEM_FN_NAME (i960base,shri) },
+  { I960BASE_INSN_SHRI1, SEM_FN_NAME (i960base,shri1) },
+  { I960BASE_INSN_SHRI2, SEM_FN_NAME (i960base,shri2) },
+  { I960BASE_INSN_SHRI3, SEM_FN_NAME (i960base,shri3) },
+  { I960BASE_INSN_EMUL, SEM_FN_NAME (i960base,emul) },
+  { I960BASE_INSN_EMUL1, SEM_FN_NAME (i960base,emul1) },
+  { I960BASE_INSN_EMUL2, SEM_FN_NAME (i960base,emul2) },
+  { I960BASE_INSN_EMUL3, SEM_FN_NAME (i960base,emul3) },
+  { I960BASE_INSN_MOV, SEM_FN_NAME (i960base,mov) },
+  { I960BASE_INSN_MOV1, SEM_FN_NAME (i960base,mov1) },
+  { I960BASE_INSN_MOVL, SEM_FN_NAME (i960base,movl) },
+  { I960BASE_INSN_MOVL1, SEM_FN_NAME (i960base,movl1) },
+  { I960BASE_INSN_MOVT, SEM_FN_NAME (i960base,movt) },
+  { I960BASE_INSN_MOVT1, SEM_FN_NAME (i960base,movt1) },
+  { I960BASE_INSN_MOVQ, SEM_FN_NAME (i960base,movq) },
+  { I960BASE_INSN_MOVQ1, SEM_FN_NAME (i960base,movq1) },
+  { I960BASE_INSN_MODPC, SEM_FN_NAME (i960base,modpc) },
+  { I960BASE_INSN_MODAC, SEM_FN_NAME (i960base,modac) },
+  { I960BASE_INSN_LDA_OFFSET, SEM_FN_NAME (i960base,lda_offset) },
+  { I960BASE_INSN_LDA_INDIRECT_OFFSET, SEM_FN_NAME (i960base,lda_indirect_offset) },
+  { I960BASE_INSN_LDA_INDIRECT, SEM_FN_NAME (i960base,lda_indirect) },
+  { I960BASE_INSN_LDA_INDIRECT_INDEX, SEM_FN_NAME (i960base,lda_indirect_index) },
+  { I960BASE_INSN_LDA_DISP, SEM_FN_NAME (i960base,lda_disp) },
+  { I960BASE_INSN_LDA_INDIRECT_DISP, SEM_FN_NAME (i960base,lda_indirect_disp) },
+  { I960BASE_INSN_LDA_INDEX_DISP, SEM_FN_NAME (i960base,lda_index_disp) },
+  { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,lda_indirect_index_disp) },
+  { I960BASE_INSN_LD_OFFSET, SEM_FN_NAME (i960base,ld_offset) },
+  { I960BASE_INSN_LD_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ld_indirect_offset) },
+  { I960BASE_INSN_LD_INDIRECT, SEM_FN_NAME (i960base,ld_indirect) },
+  { I960BASE_INSN_LD_INDIRECT_INDEX, SEM_FN_NAME (i960base,ld_indirect_index) },
+  { I960BASE_INSN_LD_DISP, SEM_FN_NAME (i960base,ld_disp) },
+  { I960BASE_INSN_LD_INDIRECT_DISP, SEM_FN_NAME (i960base,ld_indirect_disp) },
+  { I960BASE_INSN_LD_INDEX_DISP, SEM_FN_NAME (i960base,ld_index_disp) },
+  { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ld_indirect_index_disp) },
+  { I960BASE_INSN_LDOB_OFFSET, SEM_FN_NAME (i960base,ldob_offset) },
+  { I960BASE_INSN_LDOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldob_indirect_offset) },
+  { I960BASE_INSN_LDOB_INDIRECT, SEM_FN_NAME (i960base,ldob_indirect) },
+  { I960BASE_INSN_LDOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldob_indirect_index) },
+  { I960BASE_INSN_LDOB_DISP, SEM_FN_NAME (i960base,ldob_disp) },
+  { I960BASE_INSN_LDOB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldob_indirect_disp) },
+  { I960BASE_INSN_LDOB_INDEX_DISP, SEM_FN_NAME (i960base,ldob_index_disp) },
+  { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldob_indirect_index_disp) },
+  { I960BASE_INSN_LDOS_OFFSET, SEM_FN_NAME (i960base,ldos_offset) },
+  { I960BASE_INSN_LDOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldos_indirect_offset) },
+  { I960BASE_INSN_LDOS_INDIRECT, SEM_FN_NAME (i960base,ldos_indirect) },
+  { I960BASE_INSN_LDOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldos_indirect_index) },
+  { I960BASE_INSN_LDOS_DISP, SEM_FN_NAME (i960base,ldos_disp) },
+  { I960BASE_INSN_LDOS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldos_indirect_disp) },
+  { I960BASE_INSN_LDOS_INDEX_DISP, SEM_FN_NAME (i960base,ldos_index_disp) },
+  { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldos_indirect_index_disp) },
+  { I960BASE_INSN_LDIB_OFFSET, SEM_FN_NAME (i960base,ldib_offset) },
+  { I960BASE_INSN_LDIB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldib_indirect_offset) },
+  { I960BASE_INSN_LDIB_INDIRECT, SEM_FN_NAME (i960base,ldib_indirect) },
+  { I960BASE_INSN_LDIB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldib_indirect_index) },
+  { I960BASE_INSN_LDIB_DISP, SEM_FN_NAME (i960base,ldib_disp) },
+  { I960BASE_INSN_LDIB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldib_indirect_disp) },
+  { I960BASE_INSN_LDIB_INDEX_DISP, SEM_FN_NAME (i960base,ldib_index_disp) },
+  { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldib_indirect_index_disp) },
+  { I960BASE_INSN_LDIS_OFFSET, SEM_FN_NAME (i960base,ldis_offset) },
+  { I960BASE_INSN_LDIS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldis_indirect_offset) },
+  { I960BASE_INSN_LDIS_INDIRECT, SEM_FN_NAME (i960base,ldis_indirect) },
+  { I960BASE_INSN_LDIS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldis_indirect_index) },
+  { I960BASE_INSN_LDIS_DISP, SEM_FN_NAME (i960base,ldis_disp) },
+  { I960BASE_INSN_LDIS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldis_indirect_disp) },
+  { I960BASE_INSN_LDIS_INDEX_DISP, SEM_FN_NAME (i960base,ldis_index_disp) },
+  { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldis_indirect_index_disp) },
+  { I960BASE_INSN_LDL_OFFSET, SEM_FN_NAME (i960base,ldl_offset) },
+  { I960BASE_INSN_LDL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldl_indirect_offset) },
+  { I960BASE_INSN_LDL_INDIRECT, SEM_FN_NAME (i960base,ldl_indirect) },
+  { I960BASE_INSN_LDL_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldl_indirect_index) },
+  { I960BASE_INSN_LDL_DISP, SEM_FN_NAME (i960base,ldl_disp) },
+  { I960BASE_INSN_LDL_INDIRECT_DISP, SEM_FN_NAME (i960base,ldl_indirect_disp) },
+  { I960BASE_INSN_LDL_INDEX_DISP, SEM_FN_NAME (i960base,ldl_index_disp) },
+  { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldl_indirect_index_disp) },
+  { I960BASE_INSN_LDT_OFFSET, SEM_FN_NAME (i960base,ldt_offset) },
+  { I960BASE_INSN_LDT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldt_indirect_offset) },
+  { I960BASE_INSN_LDT_INDIRECT, SEM_FN_NAME (i960base,ldt_indirect) },
+  { I960BASE_INSN_LDT_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldt_indirect_index) },
+  { I960BASE_INSN_LDT_DISP, SEM_FN_NAME (i960base,ldt_disp) },
+  { I960BASE_INSN_LDT_INDIRECT_DISP, SEM_FN_NAME (i960base,ldt_indirect_disp) },
+  { I960BASE_INSN_LDT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_index_disp) },
+  { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_indirect_index_disp) },
+  { I960BASE_INSN_LDQ_OFFSET, SEM_FN_NAME (i960base,ldq_offset) },
+  { I960BASE_INSN_LDQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldq_indirect_offset) },
+  { I960BASE_INSN_LDQ_INDIRECT, SEM_FN_NAME (i960base,ldq_indirect) },
+  { I960BASE_INSN_LDQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldq_indirect_index) },
+  { I960BASE_INSN_LDQ_DISP, SEM_FN_NAME (i960base,ldq_disp) },
+  { I960BASE_INSN_LDQ_INDIRECT_DISP, SEM_FN_NAME (i960base,ldq_indirect_disp) },
+  { I960BASE_INSN_LDQ_INDEX_DISP, SEM_FN_NAME (i960base,ldq_index_disp) },
+  { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldq_indirect_index_disp) },
+  { I960BASE_INSN_ST_OFFSET, SEM_FN_NAME (i960base,st_offset) },
+  { I960BASE_INSN_ST_INDIRECT_OFFSET, SEM_FN_NAME (i960base,st_indirect_offset) },
+  { I960BASE_INSN_ST_INDIRECT, SEM_FN_NAME (i960base,st_indirect) },
+  { I960BASE_INSN_ST_INDIRECT_INDEX, SEM_FN_NAME (i960base,st_indirect_index) },
+  { I960BASE_INSN_ST_DISP, SEM_FN_NAME (i960base,st_disp) },
+  { I960BASE_INSN_ST_INDIRECT_DISP, SEM_FN_NAME (i960base,st_indirect_disp) },
+  { I960BASE_INSN_ST_INDEX_DISP, SEM_FN_NAME (i960base,st_index_disp) },
+  { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,st_indirect_index_disp) },
+  { I960BASE_INSN_STOB_OFFSET, SEM_FN_NAME (i960base,stob_offset) },
+  { I960BASE_INSN_STOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stob_indirect_offset) },
+  { I960BASE_INSN_STOB_INDIRECT, SEM_FN_NAME (i960base,stob_indirect) },
+  { I960BASE_INSN_STOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,stob_indirect_index) },
+  { I960BASE_INSN_STOB_DISP, SEM_FN_NAME (i960base,stob_disp) },
+  { I960BASE_INSN_STOB_INDIRECT_DISP, SEM_FN_NAME (i960base,stob_indirect_disp) },
+  { I960BASE_INSN_STOB_INDEX_DISP, SEM_FN_NAME (i960base,stob_index_disp) },
+  { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stob_indirect_index_disp) },
+  { I960BASE_INSN_STOS_OFFSET, SEM_FN_NAME (i960base,stos_offset) },
+  { I960BASE_INSN_STOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stos_indirect_offset) },
+  { I960BASE_INSN_STOS_INDIRECT, SEM_FN_NAME (i960base,stos_indirect) },
+  { I960BASE_INSN_STOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,stos_indirect_index) },
+  { I960BASE_INSN_STOS_DISP, SEM_FN_NAME (i960base,stos_disp) },
+  { I960BASE_INSN_STOS_INDIRECT_DISP, SEM_FN_NAME (i960base,stos_indirect_disp) },
+  { I960BASE_INSN_STOS_INDEX_DISP, SEM_FN_NAME (i960base,stos_index_disp) },
+  { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stos_indirect_index_disp) },
+  { I960BASE_INSN_STL_OFFSET, SEM_FN_NAME (i960base,stl_offset) },
+  { I960BASE_INSN_STL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stl_indirect_offset) },
+  { I960BASE_INSN_STL_INDIRECT, SEM_FN_NAME (i960base,stl_indirect) },
+  { I960BASE_INSN_STL_INDIRECT_INDEX, SEM_FN_NAME (i960base,stl_indirect_index) },
+  { I960BASE_INSN_STL_DISP, SEM_FN_NAME (i960base,stl_disp) },
+  { I960BASE_INSN_STL_INDIRECT_DISP, SEM_FN_NAME (i960base,stl_indirect_disp) },
+  { I960BASE_INSN_STL_INDEX_DISP, SEM_FN_NAME (i960base,stl_index_disp) },
+  { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stl_indirect_index_disp) },
+  { I960BASE_INSN_STT_OFFSET, SEM_FN_NAME (i960base,stt_offset) },
+  { I960BASE_INSN_STT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stt_indirect_offset) },
+  { I960BASE_INSN_STT_INDIRECT, SEM_FN_NAME (i960base,stt_indirect) },
+  { I960BASE_INSN_STT_INDIRECT_INDEX, SEM_FN_NAME (i960base,stt_indirect_index) },
+  { I960BASE_INSN_STT_DISP, SEM_FN_NAME (i960base,stt_disp) },
+  { I960BASE_INSN_STT_INDIRECT_DISP, SEM_FN_NAME (i960base,stt_indirect_disp) },
+  { I960BASE_INSN_STT_INDEX_DISP, SEM_FN_NAME (i960base,stt_index_disp) },
+  { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stt_indirect_index_disp) },
+  { I960BASE_INSN_STQ_OFFSET, SEM_FN_NAME (i960base,stq_offset) },
+  { I960BASE_INSN_STQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stq_indirect_offset) },
+  { I960BASE_INSN_STQ_INDIRECT, SEM_FN_NAME (i960base,stq_indirect) },
+  { I960BASE_INSN_STQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,stq_indirect_index) },
+  { I960BASE_INSN_STQ_DISP, SEM_FN_NAME (i960base,stq_disp) },
+  { I960BASE_INSN_STQ_INDIRECT_DISP, SEM_FN_NAME (i960base,stq_indirect_disp) },
+  { I960BASE_INSN_STQ_INDEX_DISP, SEM_FN_NAME (i960base,stq_index_disp) },
+  { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stq_indirect_index_disp) },
+  { I960BASE_INSN_CMPOBE_REG, SEM_FN_NAME (i960base,cmpobe_reg) },
+  { I960BASE_INSN_CMPOBE_LIT, SEM_FN_NAME (i960base,cmpobe_lit) },
+  { I960BASE_INSN_CMPOBNE_REG, SEM_FN_NAME (i960base,cmpobne_reg) },
+  { I960BASE_INSN_CMPOBNE_LIT, SEM_FN_NAME (i960base,cmpobne_lit) },
+  { I960BASE_INSN_CMPOBL_REG, SEM_FN_NAME (i960base,cmpobl_reg) },
+  { I960BASE_INSN_CMPOBL_LIT, SEM_FN_NAME (i960base,cmpobl_lit) },
+  { I960BASE_INSN_CMPOBLE_REG, SEM_FN_NAME (i960base,cmpoble_reg) },
+  { I960BASE_INSN_CMPOBLE_LIT, SEM_FN_NAME (i960base,cmpoble_lit) },
+  { I960BASE_INSN_CMPOBG_REG, SEM_FN_NAME (i960base,cmpobg_reg) },
+  { I960BASE_INSN_CMPOBG_LIT, SEM_FN_NAME (i960base,cmpobg_lit) },
+  { I960BASE_INSN_CMPOBGE_REG, SEM_FN_NAME (i960base,cmpobge_reg) },
+  { I960BASE_INSN_CMPOBGE_LIT, SEM_FN_NAME (i960base,cmpobge_lit) },
+  { I960BASE_INSN_CMPIBE_REG, SEM_FN_NAME (i960base,cmpibe_reg) },
+  { I960BASE_INSN_CMPIBE_LIT, SEM_FN_NAME (i960base,cmpibe_lit) },
+  { I960BASE_INSN_CMPIBNE_REG, SEM_FN_NAME (i960base,cmpibne_reg) },
+  { I960BASE_INSN_CMPIBNE_LIT, SEM_FN_NAME (i960base,cmpibne_lit) },
+  { I960BASE_INSN_CMPIBL_REG, SEM_FN_NAME (i960base,cmpibl_reg) },
+  { I960BASE_INSN_CMPIBL_LIT, SEM_FN_NAME (i960base,cmpibl_lit) },
+  { I960BASE_INSN_CMPIBLE_REG, SEM_FN_NAME (i960base,cmpible_reg) },
+  { I960BASE_INSN_CMPIBLE_LIT, SEM_FN_NAME (i960base,cmpible_lit) },
+  { I960BASE_INSN_CMPIBG_REG, SEM_FN_NAME (i960base,cmpibg_reg) },
+  { I960BASE_INSN_CMPIBG_LIT, SEM_FN_NAME (i960base,cmpibg_lit) },
+  { I960BASE_INSN_CMPIBGE_REG, SEM_FN_NAME (i960base,cmpibge_reg) },
+  { I960BASE_INSN_CMPIBGE_LIT, SEM_FN_NAME (i960base,cmpibge_lit) },
+  { I960BASE_INSN_BBC_REG, SEM_FN_NAME (i960base,bbc_reg) },
+  { I960BASE_INSN_BBC_LIT, SEM_FN_NAME (i960base,bbc_lit) },
+  { I960BASE_INSN_BBS_REG, SEM_FN_NAME (i960base,bbs_reg) },
+  { I960BASE_INSN_BBS_LIT, SEM_FN_NAME (i960base,bbs_lit) },
+  { I960BASE_INSN_CMPI, SEM_FN_NAME (i960base,cmpi) },
+  { I960BASE_INSN_CMPI1, SEM_FN_NAME (i960base,cmpi1) },
+  { I960BASE_INSN_CMPI2, SEM_FN_NAME (i960base,cmpi2) },
+  { I960BASE_INSN_CMPI3, SEM_FN_NAME (i960base,cmpi3) },
+  { I960BASE_INSN_CMPO, SEM_FN_NAME (i960base,cmpo) },
+  { I960BASE_INSN_CMPO1, SEM_FN_NAME (i960base,cmpo1) },
+  { I960BASE_INSN_CMPO2, SEM_FN_NAME (i960base,cmpo2) },
+  { I960BASE_INSN_CMPO3, SEM_FN_NAME (i960base,cmpo3) },
+  { I960BASE_INSN_TESTNO_REG, SEM_FN_NAME (i960base,testno_reg) },
+  { I960BASE_INSN_TESTG_REG, SEM_FN_NAME (i960base,testg_reg) },
+  { I960BASE_INSN_TESTE_REG, SEM_FN_NAME (i960base,teste_reg) },
+  { I960BASE_INSN_TESTGE_REG, SEM_FN_NAME (i960base,testge_reg) },
+  { I960BASE_INSN_TESTL_REG, SEM_FN_NAME (i960base,testl_reg) },
+  { I960BASE_INSN_TESTNE_REG, SEM_FN_NAME (i960base,testne_reg) },
+  { I960BASE_INSN_TESTLE_REG, SEM_FN_NAME (i960base,testle_reg) },
+  { I960BASE_INSN_TESTO_REG, SEM_FN_NAME (i960base,testo_reg) },
+  { I960BASE_INSN_BNO, SEM_FN_NAME (i960base,bno) },
+  { I960BASE_INSN_BG, SEM_FN_NAME (i960base,bg) },
+  { I960BASE_INSN_BE, SEM_FN_NAME (i960base,be) },
+  { I960BASE_INSN_BGE, SEM_FN_NAME (i960base,bge) },
+  { I960BASE_INSN_BL, SEM_FN_NAME (i960base,bl) },
+  { I960BASE_INSN_BNE, SEM_FN_NAME (i960base,bne) },
+  { I960BASE_INSN_BLE, SEM_FN_NAME (i960base,ble) },
+  { I960BASE_INSN_BO, SEM_FN_NAME (i960base,bo) },
+  { I960BASE_INSN_B, SEM_FN_NAME (i960base,b) },
+  { I960BASE_INSN_BX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,bx_indirect_offset) },
+  { I960BASE_INSN_BX_INDIRECT, SEM_FN_NAME (i960base,bx_indirect) },
+  { I960BASE_INSN_BX_INDIRECT_INDEX, SEM_FN_NAME (i960base,bx_indirect_index) },
+  { I960BASE_INSN_BX_DISP, SEM_FN_NAME (i960base,bx_disp) },
+  { I960BASE_INSN_BX_INDIRECT_DISP, SEM_FN_NAME (i960base,bx_indirect_disp) },
+  { I960BASE_INSN_CALLX_DISP, SEM_FN_NAME (i960base,callx_disp) },
+  { I960BASE_INSN_CALLX_INDIRECT, SEM_FN_NAME (i960base,callx_indirect) },
+  { I960BASE_INSN_CALLX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,callx_indirect_offset) },
+  { I960BASE_INSN_RET, SEM_FN_NAME (i960base,ret) },
+  { I960BASE_INSN_CALLS, SEM_FN_NAME (i960base,calls) },
+  { I960BASE_INSN_FMARK, SEM_FN_NAME (i960base,fmark) },
+  { I960BASE_INSN_FLUSHREG, SEM_FN_NAME (i960base,flushreg) },
+  { 0, 0 }
+};
+
+/* Add the semantic fns to IDESC_TABLE.  */
+
+void
+SEM_FN_NAME (i960base,init_idesc_table) (SIM_CPU *current_cpu)
+{
+  IDESC *idesc_table = CPU_IDESC (current_cpu);
+  const struct sem_fn_desc *sf;
+
+  for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
+    {
+#if FAST_P
+      idesc_table[sf->index].sem_fast = sf->fn;
+#else
+      idesc_table[sf->index].sem_full = sf->fn;
+#endif
+    }
+}
+