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| author | Andrew Cagney <cagney@redhat.com> | 1997-11-10 22:40:14 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-11-10 22:40:14 +0000 |
| commit | 87192c630ab39b03e70efdfce66117f8b253a843 (patch) | |
| tree | feda46aa8902fcb093eef2676d92ae97354a6847 /sim/d10v | |
| parent | 13c83300807ed09e0d4b936fab00798b4a86ef59 (diff) | |
| download | fsf-binutils-gdb-87192c630ab39b03e70efdfce66117f8b253a843.zip fsf-binutils-gdb-87192c630ab39b03e70efdfce66117f8b253a843.tar.gz fsf-binutils-gdb-87192c630ab39b03e70efdfce66117f8b253a843.tar.bz2 | |
* simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign
extend bit 44 all constants.
(OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
Diffstat (limited to 'sim/d10v')
| -rw-r--r-- | sim/d10v/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index f82bf7e..a967c78 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,9 @@ +Mon Nov 10 17:50:18 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign + extend bit 44 all constants. + (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro. + Fri Oct 24 10:26:29 1997 Andrew Cagney <cagney@b1.cygnus.com> * d10v_sim.h: Include sim-types.h. |