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authorAndrew Cagney <cagney@redhat.com>1998-02-11 06:34:30 +0000
committerAndrew Cagney <cagney@redhat.com>1998-02-11 06:34:30 +0000
commit19431a02809968af77b87776ecd346574f7c0f87 (patch)
treed7891ae6867150377e4a354b9005f4e549652ac5 /sim/d10v/d10v_sim.h
parent14926763d651dc3406b77685d92a5ca9cc4d0423 (diff)
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Ensure zero-hardwired bits in DPSW remain zero.
Diffstat (limited to 'sim/d10v/d10v_sim.h')
-rw-r--r--sim/d10v/d10v_sim.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v_sim.h
index 59787f1..df95426 100644
--- a/sim/d10v/d10v_sim.h
+++ b/sim/d10v/d10v_sim.h
@@ -12,6 +12,7 @@
#define DEBUG_LINE_NUMBER 0x00000004
#define DEBUG_MEMSIZE 0x00000008
#define DEBUG_INSTRUCTION 0x00000010
+#define DEBUG_TRAP 0x00000020
#ifndef DEBUG
#define DEBUG (DEBUG_TRACE | DEBUG_VALUES | DEBUG_LINE_NUMBER)
@@ -115,6 +116,7 @@ enum
BPSW_CR = 1,
PC_CR = 2,
BPC_CR = 3,
+ DPSW_CR = 4,
RPT_C_CR = 7,
RPT_S_CR = 8,
RPT_E_CR = 9,
@@ -143,7 +145,7 @@ enum
or assigned-to directly */
#define PC (State.cregs[PC_CR])
#define PSW (move_from_cr (PSW_CR))
-#define BPSW (0 + State.cregs[PSW_CR])
+#define BPSW (0 + State.cregs[BPSW_CR])
#define BPC (State.cregs[BPC_CR])
#define RPT_C (State.cregs[RPT_C_CR])
#define RPT_S (State.cregs[RPT_S_CR])
@@ -190,6 +192,7 @@ enum
#define INC_ADDR(x,i) x = ((State.MD && x == (MOD_E & ~((i)-1))) ? MOD_S : (x)+(i))
extern uint8 *dmem_addr PARAMS ((uint32));
+extern uint8 *imem_addr PARAMS ((uint32));
extern bfd_vma decode_pc PARAMS ((void));
#define RB(x) (*(dmem_addr(x)))