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| author | Andrew Cagney <cagney@redhat.com> | 1997-12-02 05:18:27 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-12-02 05:18:27 +0000 |
| commit | ae55807561cc4c213d1ff8439b831a4bec28b2e2 (patch) | |
| tree | 2f458b450903e087e04e1a2d2948814f16ccb9f4 /sim/d10v/ChangeLog | |
| parent | 8b9c29f5cbe612e040212ddb899abf7a673ade35 (diff) | |
| download | fsf-binutils-gdb-ae55807561cc4c213d1ff8439b831a4bec28b2e2.zip fsf-binutils-gdb-ae55807561cc4c213d1ff8439b831a4bec28b2e2.tar.gz fsf-binutils-gdb-ae55807561cc4c213d1ff8439b831a4bec28b2e2.tar.bz2 | |
For MACU add unsigned multiply to accumulator.
Test.
Diffstat (limited to 'sim/d10v/ChangeLog')
| -rw-r--r-- | sim/d10v/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index a5f9e99..d801cb2 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,8 @@ +Tue Dec 2 15:01:08 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * simops.c (OP_3A00): For "macu", perform multiply stage using 32 + bit rather than 16 bit precision. + Tue Dec 2 11:04:37 1997 Andrew Cagney <cagney@b1.cygnus.com> * simops.c (OP_1000): For "sub2w", compute carry by comparing |