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authorHans-Peter Nilsson <hp@axis.com>2006-04-03 03:01:45 +0000
committerHans-Peter Nilsson <hp@axis.com>2006-04-03 03:01:45 +0000
commitaad3b3cbc1391fb0091d03b252bd53fbd1d2dd84 (patch)
treed084f6526cd6241af91f2bb5c097a86b07a71a87 /sim/cris/crisv32f.c
parent4c3a323bb9b03802339b28311c228a5152829474 (diff)
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* cris/dv-cris.c, cris/dv-rv.c, cris/rvdummy.c: New files.
* cris/Makefile.in (CONFIG_DEVICES): Remove redundant setting. (dv-cris.o, dv-rv.o rvdummy$(EXEEXT), rvdummy.o): New rules. (all): Depend on rvdummy$(EXEEXT). * cris/configure.ac: Call SIM_AC_OPTION_WARNINGS. Check for sys/socket.h and sys/select.h. Call SIM_AC_OPTION_HARDWARE, default off. * cris/configure: Regenerate. * cris/cris-sim.h (cris_have_900000xxif): Declare here. (enum cris_interrupt_type, crisv10deliver_interrupt) (crisv32deliver_interrupt: New declarations. * cris/cris-tmpl.c [WITH_HW] (MY (f_model_insn_after)): Call sim_events_tickn and set state-events member work_pending when it's time for the next event. [WITH_HW] (MY (f_specific_init)): Set CPU-model-specific interrupt-delivery function. * cris/crisv10f.c (MY (deliver_interrupt)): New function. * cris/crisv32f.c (MY (deliver_interrupt)): New function. * cris/devices.c: Include hw-device.h. (device_io_read_buffer) [WITH_HW]: Call hw_io_read_buffer. (device_io_write_buffer): Only perform 0x900000xx-functions if cris_have_900000xxif is nonzero. Else if WITH_HW defined, call hw_io_write_buffer. Add return 0 last in function. * cris/sim-if.c (cris_have_900000xxif): Now global. (sim_open) [WITH_HW]: Clear deliver_interrupt cpu member. Force "-model" option, effectively. * cris/sim-main.h (cris_interrupt_delivery_fn): New type. (struct _sim_cpu) [WITH_HW]: New member deliver_interrupt.
Diffstat (limited to 'sim/cris/crisv32f.c')
-rw-r--r--sim/cris/crisv32f.c70
1 files changed, 69 insertions, 1 deletions
diff --git a/sim/cris/crisv32f.c b/sim/cris/crisv32f.c
index d1d5fc9..cd14d3e 100644
--- a/sim/cris/crisv32f.c
+++ b/sim/cris/crisv32f.c
@@ -1,5 +1,5 @@
/* CRIS v32 simulator support code
- Copyright (C) 2004, 2005 Free Software Foundation, Inc.
+ Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
Contributed by Axis Communications.
This file is part of the GNU simulators.
@@ -556,3 +556,71 @@ MY (XCONCAT3 (f_model_crisv,BASENUM,
}
#endif /* WITH_PROFILE_MODEL_P */
+
+int
+MY (deliver_interrupt) (SIM_CPU *current_cpu,
+ enum cris_interrupt_type type,
+ unsigned int vec)
+{
+ unsigned32 old_ccs, shifted_ccs, new_ccs;
+ unsigned char entryaddr_le[4];
+ int was_user;
+ SIM_DESC sd = CPU_STATE (current_cpu);
+ unsigned32 entryaddr;
+
+ /* We haven't implemented other interrupt-types yet. */
+ if (type != CRIS_INT_INT)
+ abort ();
+
+ /* We're called outside of branch delay slots etc, so we don't check
+ for that. */
+ if (!GET_H_IBIT_V32 ())
+ return 0;
+
+ old_ccs = GET_H_SR_V32 (H_SR_CCS);
+ shifted_ccs = (old_ccs << 10) & ((1 << 30) - 1);
+
+ /* The M bit is handled by code below and the M bit setter function, but
+ we need to preserve the Q bit. */
+ new_ccs = shifted_ccs | (old_ccs & (unsigned32) 0x80000000UL);
+ was_user = GET_H_UBIT_V32 ();
+
+ /* We need to force kernel mode since the setter method doesn't allow
+ it. Then we can use setter methods at will, since they then
+ recognize that we're in kernel mode. */
+ CPU (h_ubit_v32) = 0;
+
+ if (was_user)
+ {
+ /* These methods require that user mode is unset. */
+ SET_H_SR (H_SR_USP, GET_H_GR (H_GR_SP));
+ SET_H_GR (H_GR_SP, GET_H_KERNEL_SP ());
+ }
+
+ /* ERP setting is simplified by not taking interrupts in delay-slots
+ or when halting. */
+ /* For all other exceptions than guru and NMI, store the return
+ address in ERP and set EXS and EXD here. */
+ SET_H_SR (H_SR_ERP, GET_H_PC ());
+
+ /* Simplified by not having exception types (fault indications). */
+ SET_H_SR_V32 (H_SR_EXS, (vec * 256));
+ SET_H_SR_V32 (H_SR_EDA, 0);
+
+ if (sim_core_read_buffer (sd,
+ current_cpu,
+ read_map, entryaddr_le,
+ GET_H_SR (H_SR_EBP) + vec * 4, 4) == 0)
+ {
+ /* Nothing to do actually; either abort or send a signal. */
+ sim_core_signal (sd, current_cpu, CIA_GET (current_cpu), 0, 4,
+ GET_H_SR (H_SR_EBP) + vec * 4,
+ read_transfer, sim_core_unmapped_signal);
+ return 0;
+ }
+
+ entryaddr = bfd_getl32 (entryaddr_le);
+ SET_H_PC (entryaddr);
+
+ return 1;
+}