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author | Mike Frysinger <vapier@gentoo.org> | 2021-05-18 21:54:36 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2021-05-24 18:42:34 -0400 |
commit | 547112801156ff51bbb44f86dd9a2ca4b4723d41 (patch) | |
tree | 6051d6e2c890279b8faed6a4f736ad2dbde023ae /sim/cris/Makefile.in | |
parent | 32e2770e59582f3bea022e20d0cf6722700e7578 (diff) | |
download | fsf-binutils-gdb-547112801156ff51bbb44f86dd9a2ca4b4723d41.zip fsf-binutils-gdb-547112801156ff51bbb44f86dd9a2ca4b4723d41.tar.gz fsf-binutils-gdb-547112801156ff51bbb44f86dd9a2ca4b4723d41.tar.bz2 |
opcodes: cris: move desc & opc files from sim/
All other cgen ports keep their generated desc & opc files under
opcodes/, so move the cris files over too. The cris-opc.c file,
while not generated, is already here to complement.
Diffstat (limited to 'sim/cris/Makefile.in')
-rw-r--r-- | sim/cris/Makefile.in | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index 3dcdbb2..d5e8a88 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -29,14 +29,13 @@ SIM_OBJS = \ sim-if.o arch.o \ $(CRISV10F_OBJS) \ $(CRISV32F_OBJS) \ - traps.o \ - cris-desc.o + traps.o # Extra headers included by sim-main.h. # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \ - arch.h cpuall.h cris-sim.h cris-desc.h engv10.h engv32.h + arch.h cpuall.h cris-sim.h engv10.h engv32.h SIM_EXTRA_CLEAN = cris-clean @@ -97,7 +96,7 @@ cris-clean: rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \ rm -f stamp-v$${v}fcpu; \ done - -rm -f stamp-arch stamp-desc + -rm -f stamp-arch -rm -f tmp-* # cgen support, enable with --enable-cgen-maint @@ -106,7 +105,7 @@ CGEN_MAINT = ; @true @CGEN_MAINT@CGEN_MAINT = # Useful when making CGEN-generated files manually, without --enable-cgen-maint. -stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc +stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \ @@ -135,10 +134,3 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr mv decodev32.c.tmp $(srcdir)/decodev32.c touch stamp-v32fcpu cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu - -stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile - $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ - archfile=$(CPU_DIR)/cris.cpu \ - cpu=cris mach=all - touch stamp-desc -cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc |