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authorMike Frysinger <vapier@gentoo.org>2015-06-11 18:28:25 +0800
committerMike Frysinger <vapier@gentoo.org>2015-06-12 06:34:20 -0400
commitbb11f3ed2bd9eeddca84cc3a80c3643ddae517f3 (patch)
tree12dba53f4b4234217584f24d345980060c93271a /sim/bfin/bfin-sim.c
parent29bc024d07fe480cd37f36097f23d5585b15e71c (diff)
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sim: trace: add common macros for logging info
The Blackfin port had some TRACE_xxx macros for easily logging trace data. Use these as a base for common ones that have a simple form and match the existing sets of helper macros.
Diffstat (limited to 'sim/bfin/bfin-sim.c')
-rw-r--r--sim/bfin/bfin-sim.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 24b29e7..8b19ead 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -1741,7 +1741,7 @@ hwloop_get_next_pc (SIM_CPU *cpu, bu32 pc, bu32 insn_len)
for (i = 1; i >= 0; --i)
if (LCREG (i) > 1 && pc == LBREG (i))
{
- TRACE_BRANCH (cpu, pc, LTREG (i), i, "Hardware loop %i", i);
+ BFIN_TRACE_BRANCH (cpu, pc, LTREG (i), i, "Hardware loop %i", i);
return LTREG (i);
}
@@ -1773,7 +1773,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
- TRACE_BRANCH (cpu, pc, newpc, -1, "RTS");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "RTS");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
CYCLE_DELAY = 5;
@@ -1893,7 +1893,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
- TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (Preg)");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (Preg)");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
PROFILE_BRANCH_TAKEN (cpu);
@@ -1907,7 +1907,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
- TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (Preg)");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (Preg)");
/* If we're at the end of a hardware loop, RETS is going to be
the top of the loop rather than the next instruction. */
SET_RETSREG (hwloop_get_next_pc (cpu, pc, 2));
@@ -1924,7 +1924,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
- TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (PC + Preg)");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (PC + Preg)");
SET_RETSREG (hwloop_get_next_pc (cpu, pc, 2));
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
@@ -1939,7 +1939,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
- TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (PC + Preg)");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (PC + Preg)");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
PROFILE_BRANCH_TAKEN (cpu);
@@ -2444,7 +2444,7 @@ decode_BRCC_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
if (cond)
{
bu32 newpc = pc + pcrel;
- TRACE_BRANCH (cpu, pc, newpc, -1, "Conditional JUMP");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "Conditional JUMP");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
PROFILE_BRANCH_TAKEN (cpu);
@@ -2477,7 +2477,7 @@ decode_UJUMP_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
- TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.S");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.S");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
@@ -3619,11 +3619,11 @@ decode_CALLa_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1, bu32 pc)
if (S == 1)
{
- TRACE_BRANCH (cpu, pc, newpc, -1, "CALL");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "CALL");
SET_RETSREG (hwloop_get_next_pc (cpu, pc, 4));
}
else
- TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.L");
+ BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.L");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;