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| author | Stafford Horne <shorne@gmail.com> | 2017-12-09 05:57:25 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2017-12-12 23:44:14 +0900 |
| commit | fa8b7c2128cd03135b7d31ae2ecbc2d3273e990d (patch) | |
| tree | a8014af075efa262869a91c4114ab4adb0e20d68 /sim/ChangeLog | |
| parent | 58884b0e451043ed2fb4d2fba18134f0fb451ce5 (diff) | |
| download | fsf-binutils-gdb-fa8b7c2128cd03135b7d31ae2ecbc2d3273e990d.zip fsf-binutils-gdb-fa8b7c2128cd03135b7d31ae2ecbc2d3273e990d.tar.gz fsf-binutils-gdb-fa8b7c2128cd03135b7d31ae2ecbc2d3273e990d.tar.bz2 | |
sim: or1k: add or1k target to sim
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN
based sim so the bulk of the code is generated from the .cpu files by
CGEN. The engine decode and execute logic in mloop uses scache with
pseudo-basic-block extraction and supports both full and fast (switch)
modes.
The sim does not implement an mmu at the moment. The sim does implement
fpu instructions via the common sim-fpu implementation.
sim/ChangeLog:
2017-12-12 Stafford Horne <shorne@gmail.com>
Peter Gavin <pgavin@gmail.com>
* configure.tgt: Add or1k sim.
* or1k/README: New file.
* or1k/Makefile.in: New file.
* or1k/configure.ac: New file.
* or1k/mloop.in: New file.
* or1k/or1k-sim.h: New file.
* or1k/or1k.c: New file.
* or1k/sim-if.c: New file.
* or1k/sim-main.h: New file.
* or1k/traps.c: New file.
Diffstat (limited to 'sim/ChangeLog')
| -rw-r--r-- | sim/ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog index 3c1a351..253b91e 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,17 @@ +2017-12-12 Stafford Horne <shorne@gmail.com> + Peter Gavin <pgavin@gmail.com> + + * configure.tgt: Add or1k sim. + * or1k/README: New file. + * or1k/Makefile.in: New file. + * or1k/configure.ac: New file. + * or1k/mloop.in: New file. + * or1k/or1k-sim.h: New file. + * or1k/or1k.c: New file. + * or1k/sim-if.c: New file. + * or1k/sim-main.h: New file. + * or1k/traps.c: New file. + 2017-11-01 James Bowman <james.bowman@ftdichip.com> * ft32/interp.c (step_once): Add ft32 shortcode decoder. |