diff options
| author | Nick Clifton <nickc@redhat.com> | 2009-11-19 14:07:11 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2009-11-19 14:07:11 +0000 |
| commit | 945ee43039cf180d2b6b77b0d72953af50359d72 (patch) | |
| tree | b91f40dcb05441fc4804aeea6f0c2a85131844db /opcodes | |
| parent | ac96f0c73de2dea58c9e18b2ec97ef3c8862c475 (diff) | |
| download | fsf-binutils-gdb-945ee43039cf180d2b6b77b0d72953af50359d72.zip fsf-binutils-gdb-945ee43039cf180d2b6b77b0d72953af50359d72.tar.gz fsf-binutils-gdb-945ee43039cf180d2b6b77b0d72953af50359d72.tar.bz2 | |
PR binutils/10924
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
instructions using Immediate Offset addressing with an offset of
zero.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
tst instructions.
PR binutils/10924
* arm-dis.c (print_insn_arm): Do not print an offset of zero when
decoding Immediaate Offset addressing.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 28 |
2 files changed, 27 insertions, 7 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index accb7b9..ad09adc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2009-11-19 Nick Clifton <nickc@redhat.com> + + PR binutils/10924 + * arm-dis.c (print_insn_arm): Do not print an offset of zero when + decoding Immediaate Offset addressing. + 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> PR binutils/10973 diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index e59cc6c..38e1b66 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -2871,7 +2871,10 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) if (PRE_BIT_SET) { - func (stream, "[pc, #%d]\t; ", offset); + if (offset) + func (stream, "[pc, #%d]\t; ", offset); + else + func (stream, "[pc]\t; "); info->print_address_func (offset + pc + 8, info); } else @@ -2892,14 +2895,20 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) if (PRE_BIT_SET) { - /* Pre-indexed. */ if (IMMEDIATE_BIT_SET) { - /* PR 10924: Offset must be printed, even if it is zero. */ - func (stream, ", #%d", offset); + if (WRITEBACK_BIT_SET) + /* Immediate Pre-indexed. */ + /* PR 10924: Offset must be printed, even if it is zero. */ + func (stream, ", #%d", offset); + else if (offset) + /* Immediate Offset: printing zero offset is optional. */ + func (stream, ", #%d", offset); + value_in_comment = offset; } - else /* Register. */ + else + /* Register Offset or Register Pre-Indexed. */ func (stream, ", %s%s", NEGATIVE_BIT_SET ? "-" : "", arm_regnames[given & 0xf]); @@ -2907,19 +2916,24 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) func (stream, "]%s", WRITEBACK_BIT_SET ? "!" : ""); } - else /* Post-indexed. */ + else { if (IMMEDIATE_BIT_SET) { + /* Immediate Post-indexed. */ /* PR 10924: Offset must be printed, even if it is zero. */ func (stream, "], #%d", offset); value_in_comment = offset; } - else /* Register. */ + else + /* Register Post-indexed. */ func (stream, "], %s%s", NEGATIVE_BIT_SET ? "-" : "", arm_regnames[given & 0xf]); + /* Writeback is automatically implied by post- addressing. + Setting the W bit is unnecessary and ARM specify it as + being unpredictable. */ if (WRITEBACK_BIT_SET && ! allow_unpredictable) func (stream, UNPREDICTABLE_INSTRUCTION); } |