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authorTsukasa OI <research_trasio@irq.a4lg.com>2022-08-27 00:11:01 +0000
committerNelson Chu <nelson@rivosinc.com>2022-09-02 14:03:28 +0800
commit8fe1be5fabd097a8b9110ab63729e08c0d686660 (patch)
treeff5688584010bebd58ea37cfdc8900eafb40b85d /opcodes
parent48525554d5222d98953202b9252ff65fdead58a4 (diff)
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RISC-V: Print highest address (-1) on the disassembler
This patch makes possible to print the highest address (-1) and the addresses related to gp which value is -1. This is particularly useful if the highest address space is used for I/O registers and corresponding symbols are defined. Besides, despite that it is very rare to have GP the highest address, it would be nice because we enabled highest address printing on regular cases. gas/ChangeLog: * testsuite/gas/riscv/dis-addr-topaddr.s: New test for the top address (-1) printing. * testsuite/gas/riscv/dis-addr-topaddr-32.d: Likewise. * testsuite/gas/riscv/dis-addr-topaddr-64.d: Likewise. * testsuite/gas/riscv/dis-addr-topaddr-gp.s: New test for GP-relative addressing when GP is the highest address (-1). * testsuite/gas/riscv/dis-addr-topaddr-gp-32.d: Likewise. * testsuite/gas/riscv/dis-addr-topaddr-gp-64.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (struct riscv_private_data): Add `to_print_addr' to enable printing the highest address. (maybe_print_address): Utilize `to_print_addr'. (riscv_disassemble_insn): Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/riscv-dis.c20
1 files changed, 14 insertions, 6 deletions
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index b3ca680..160cc40 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -52,6 +52,8 @@ struct riscv_private_data
bfd_vma gp;
bfd_vma print_addr;
bfd_vma hi_addr[OP_MASK_RD + 1];
+ bool to_print_addr;
+ bool has_gp;
};
/* Used for mapping symbols. */
@@ -177,12 +179,13 @@ maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset,
pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset;
pd->hi_addr[base_reg] = -1;
}
- else if (base_reg == X_GP && pd->gp != (bfd_vma)-1)
+ else if (base_reg == X_GP && pd->has_gp)
pd->print_addr = pd->gp + offset;
else if (base_reg == X_TP || base_reg == 0)
pd->print_addr = offset;
else
return; /* Don't print the address. */
+ pd->to_print_addr = true;
/* Sign-extend a 32-bit value to a 64-bit value. */
if (wide)
@@ -601,14 +604,19 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
int i;
pd = info->private_data = xcalloc (1, sizeof (struct riscv_private_data));
- pd->gp = -1;
- pd->print_addr = -1;
+ pd->gp = 0;
+ pd->print_addr = 0;
for (i = 0; i < (int)ARRAY_SIZE (pd->hi_addr); i++)
pd->hi_addr[i] = -1;
+ pd->to_print_addr = false;
+ pd->has_gp = false;
for (i = 0; i < info->symtab_size; i++)
if (strcmp (bfd_asymbol_name (info->symtab[i]), RISCV_GP_SYMBOL) == 0)
- pd->gp = bfd_asymbol_value (info->symtab[i]);
+ {
+ pd->gp = bfd_asymbol_value (info->symtab[i]);
+ pd->has_gp = true;
+ }
}
else
pd = info->private_data;
@@ -668,13 +676,13 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
print_insn_args (op->args, word, memaddr, info);
/* Try to disassemble multi-instruction addressing sequences. */
- if (pd->print_addr != (bfd_vma)-1)
+ if (pd->to_print_addr)
{
info->target = pd->print_addr;
(*info->fprintf_styled_func)
(info->stream, dis_style_comment_start, " # ");
(*info->print_address_func) (info->target, info);
- pd->print_addr = -1;
+ pd->to_print_addr = false;
}
/* Finish filling out insn_info fields. */