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authorMichael Meissner <gnu@the-meissners.org>1996-01-03 16:51:46 +0000
committerMichael Meissner <gnu@the-meissners.org>1996-01-03 16:51:46 +0000
commit1d935cf62c73c597c900bd2b83228e77c690bb3f (patch)
tree010a925ab00a1f89d0eb56ee3cf90fff2f99d7a6 /opcodes
parent978be38ec27446c63ff495e7f6fe336702084fef (diff)
downloadfsf-binutils-gdb-1d935cf62c73c597c900bd2b83228e77c690bb3f.zip
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Add Pentium Pro support
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog17
-rw-r--r--opcodes/i386-dis.c40
2 files changed, 37 insertions, 20 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index dec59a2..e105190 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,20 @@
+Thu Dec 28 13:29:19 1995 John Hassey <hassey@rtp.dg.com>
+
+ * i386-dis.c: Added Pentium Pro instructions.
+
+Tue Dec 19 22:56:35 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
+ being for Power2.
+
+Fri Dec 15 14:14:15 1995 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * sh-opc.h (sh_nibble_type): Added REG_B.
+ (sh_arg_type): Added A_REG_B.
+ (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
+ and stc.l opcodes.
+ * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
+
Fri Dec 15 16:44:31 1995 Ian Lance Taylor <ian@cygnus.com>
* disassemble.c (disassembler): Use new bfd_big_endian macro.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 7bbd765..4628a1f 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -524,7 +524,7 @@ struct dis386 dis386_twobyte[] = {
/* 08 */
{ "invd" },
{ "wbinvd" },
- { "(bad)" }, { "(bad)" },
+ { "(bad)" }, { "ud2a" },
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
/* 10 */
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
@@ -546,17 +546,17 @@ struct dis386 dis386_twobyte[] = {
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
/* 30 */
- { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "(bad)" },
+ { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" },
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
/* 38 */
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
/* 40 */
- { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
- { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
+ { "cmovo", Gv,Ev }, { "cmovno", Gv,Ev }, { "cmovb", Gv,Ev }, { "cmovae", Gv,Ev },
+ { "cmove", Gv,Ev }, { "cmovne", Gv,Ev }, { "cmovbe", Gv,Ev }, { "cmova", Gv,Ev },
/* 48 */
- { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
- { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
+ { "cmovs", Gv,Ev }, { "cmovns", Gv,Ev }, { "cmovp", Gv,Ev }, { "cmovnp", Gv,Ev },
+ { "cmovl", Gv,Ev }, { "cmovge", Gv,Ev }, { "cmovle", Gv,Ev }, { "cmovg", Gv,Ev },
/* 50 */
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
{ "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
@@ -639,7 +639,7 @@ struct dis386 dis386_twobyte[] = {
{ "movzbS", Gv, Eb },
{ "movzwS", Gv, Ew },
/* b8 */
- { "(bad)" },
+ { "ud2b" },
{ "(bad)" },
{ GRP8 },
{ "btcS", Ev, Gv },
@@ -889,7 +889,7 @@ struct dis386 grps[][8] = {
/* GRP9 */
{
{ "(bad)" },
- { "cmpxch8b", Ev },
+ { "cmpxchg8b", Ev },
{ "(bad)" },
{ "(bad)" },
{ "(bad)" },
@@ -1270,10 +1270,10 @@ struct dis386 float_reg[][8] = {
},
/* da */
{
- { "(bad)" },
- { "(bad)" },
- { "(bad)" },
- { "(bad)" },
+ { "fcmovb", ST, STi },
+ { "fcmove", ST, STi },
+ { "fcmovbe",ST, STi },
+ { "fcmovu", ST, STi },
{ "(bad)" },
{ FGRPda_5 },
{ "(bad)" },
@@ -1281,13 +1281,13 @@ struct dis386 float_reg[][8] = {
},
/* db */
{
- { "(bad)" },
- { "(bad)" },
- { "(bad)" },
- { "(bad)" },
+ { "fcmovnb",ST, STi },
+ { "fcmovne",ST, STi },
+ { "fcmovnbe",ST, STi },
+ { "fcmovnu",ST, STi },
{ FGRPdb_4 },
- { "(bad)" },
- { "(bad)" },
+ { "fucomi", ST, STi },
+ { "fcomi", ST, STi },
{ "(bad)" },
},
/* dc */
@@ -1330,8 +1330,8 @@ struct dis386 float_reg[][8] = {
{ "(bad)" },
{ "(bad)" },
{ FGRPdf_4 },
- { "(bad)" },
- { "(bad)" },
+ { "fucomip",ST, STi },
+ { "fcomip", ST, STi },
{ "(bad)" },
},
};