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| author | Andrew Waterman <andrew@sifive.com> | 2016-12-18 22:53:47 -0800 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2016-12-20 12:26:33 +1030 |
| commit | 1d65abb5e2cb1624b358dda27a53a070bec685cc (patch) | |
| tree | fc2595c0626c5c415fe596dd9c1b98ca5aecf26a /opcodes | |
| parent | 96b0927de3ebdb302d8d571c43da3db5ec23847e (diff) | |
| download | fsf-binutils-gdb-1d65abb5e2cb1624b358dda27a53a070bec685cc.zip fsf-binutils-gdb-1d65abb5e2cb1624b358dda27a53a070bec685cc.tar.gz fsf-binutils-gdb-1d65abb5e2cb1624b358dda27a53a070bec685cc.tar.bz2 | |
Formatting changes for RISC-V
This is a mixed bag of format changes:
* Replacing constants with macros (0xffffffff with MINUS_ONE, for
example). There's one technically functional change in here (some
MINUS_ONEs are changed to 0), but it only changes the behavior of an
otherwise-unused field.
* Using 0 instead of 0x0 in the relocation table.
* There were some missing spaces before parens, the spaces have been
added.
* A handful of comments are now more descriptive.
* A bunch of whitespace-only changes, mostly alignment and brace
newlines.
bfd/
* elfnn-riscv.c: Formatting and comment fixes throughout.
* elfxx-riscv.c: Likewise.
(howto_table): Change the src_mask field from MINUS_ONE to 0 for
R_RISCV_TLS_DTPMOD32, R_RISCV_TLS_DTPMOD64, R_RISCV_TLS_DTPREL32,
R_RISCV_TLS_DTPREL64, R_RISCV_TLS_TPREL32, R_RISCV_TLS_TPREL64.
opcodes/
* riscv-opc.c: Formatting fixes.
gas/
* config/tc-riscv.c: Formatting and comment fixes throughout.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/riscv-opc.c | 14 |
2 files changed, 10 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 430b1f4..df466ef 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2016-12-20 Andrew Waterman <andrew@sifive.com> + + * riscv-opc.c: Formatting fixes. + 2016-12-20 Alan Modra <amodra@gmail.com> * Makefile.am (TARGET_LIBOPCODES_CFILES): Add riscv files. diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 1d8d579..256e089 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -34,8 +34,7 @@ const char * const riscv_gpr_names_numeric[NGPR] = "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31" }; -const char * const riscv_gpr_names_abi[NGPR] = -{ +const char * const riscv_gpr_names_abi[NGPR] = { "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", @@ -50,8 +49,7 @@ const char * const riscv_fpr_names_numeric[NFPR] = "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" }; -const char * const riscv_fpr_names_abi[NFPR] = -{ +const char * const riscv_fpr_names_abi[NFPR] = { "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5", "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", @@ -72,9 +70,9 @@ const char * const riscv_fpr_names_abi[NFPR] = #define MASK_RS2 (OP_MASK_RS2 << OP_SH_RS2) #define MASK_RD (OP_MASK_RD << OP_SH_RD) #define MASK_CRS2 (OP_MASK_CRS2 << OP_SH_CRS2) -#define MASK_IMM ENCODE_ITYPE_IMM(-1U) -#define MASK_RVC_IMM ENCODE_RVC_IMM(-1U) -#define MASK_UIMM ENCODE_UTYPE_IMM(-1U) +#define MASK_IMM ENCODE_ITYPE_IMM (-1U) +#define MASK_RVC_IMM ENCODE_RVC_IMM (-1U) +#define MASK_UIMM ENCODE_UTYPE_IMM (-1U) #define MASK_RM (OP_MASK_RM << OP_SH_RM) #define MASK_PRED (OP_MASK_PRED << OP_SH_PRED) #define MASK_SUCC (OP_MASK_SUCC << OP_SH_SUCC) @@ -240,7 +238,7 @@ const struct riscv_opcode riscv_opcodes[] = {"or", "I", "d,s,t", MATCH_OR, MASK_OR, match_opcode, 0 }, {"or", "I", "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, INSN_ALIAS }, {"auipc", "I", "d,u", MATCH_AUIPC, MASK_AUIPC, match_opcode, 0 }, -{"seqz", "I", "d,s", MATCH_SLTIU | ENCODE_ITYPE_IMM(1), MASK_SLTIU | MASK_IMM, match_opcode, INSN_ALIAS }, +{"seqz", "I", "d,s", MATCH_SLTIU | ENCODE_ITYPE_IMM (1), MASK_SLTIU | MASK_IMM, match_opcode, INSN_ALIAS }, {"snez", "I", "d,t", MATCH_SLTU, MASK_SLTU | MASK_RS1, match_opcode, INSN_ALIAS }, {"sltz", "I", "d,s", MATCH_SLT, MASK_SLT | MASK_RS2, match_opcode, INSN_ALIAS }, {"sgtz", "I", "d,t", MATCH_SLT, MASK_SLT | MASK_RS1, match_opcode, INSN_ALIAS }, |