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| author | H.J. Lu <hjl.tools@gmail.com> | 2011-08-01 19:25:48 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2011-08-01 19:25:48 +0000 |
| commit | 00f51a41a8ea1955fad20b755e0936195811cbff (patch) | |
| tree | db48833cb7440d005d81f1f493a7e939b642c5ae /opcodes | |
| parent | 3fbb6ffa986212910c71ca7915530962b7f9c146 (diff) | |
| download | fsf-binutils-gdb-00f51a41a8ea1955fad20b755e0936195811cbff.zip fsf-binutils-gdb-00f51a41a8ea1955fad20b755e0936195811cbff.tar.gz fsf-binutils-gdb-00f51a41a8ea1955fad20b755e0936195811cbff.tar.bz2 | |
Add Disp32S to 64bit call.
gas/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* gas/i386/x86-64-branch.s: Add tests for direct branch.
* gas/i386/x86-64-branch.d: Updated.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
opcodes/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* i386-opc.tbl: Add Disp32S to 64bit call.
* i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/i386-opc.tbl | 2 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 2 |
3 files changed, 8 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9b5494e..4e39050 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2011-08-01 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/13046 + * i386-opc.tbl: Add Disp32S to 64bit call. + * i386-tbl.h: Regenerated. + 2011-07-24 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 4c29ab7..eb7dae9 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -320,7 +320,7 @@ shrd, 2, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { // Control transfer instructions. call, 1, 0xe8, None, 1, CpuNo64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp16|Disp32 } -call, 1, 0xe8, None, 1, Cpu64, JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Disp16|Disp32 } +call, 1, 0xe8, None, 1, Cpu64, JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Disp16|Disp32|Disp32S } call, 1, 0xff, 0x2, 1, CpuNo64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|JumpAbsolute } call, 1, 0xff, 0x2, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S|JumpAbsolute } // Intel Syntax diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index f133b80..795f71d 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -2558,7 +2558,7 @@ const insn_template i386_optab[] = 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "call", 1, 0xff, 0x2, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |