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| author | Jan Beulich <jbeulich@novell.com> | 2007-09-26 13:40:59 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@novell.com> | 2007-09-26 13:40:59 +0000 |
| commit | 9a04903eea44cbc4642f10d2a8f8db416a694737 (patch) | |
| tree | cac4c7f77941510808897374bc350e58ffd8140a /opcodes | |
| parent | 8977835cde2576229bb1ad01f32bb3e6279b5afe (diff) | |
| download | fsf-binutils-gdb-9a04903eea44cbc4642f10d2a8f8db416a694737.zip fsf-binutils-gdb-9a04903eea44cbc4642f10d2a8f8db416a694737.tar.gz fsf-binutils-gdb-9a04903eea44cbc4642f10d2a8f8db416a694737.tar.bz2 | |
gas/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Also check for RegEip
when considering IP-relative addressing.
gas/testsuite/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
longer generating errors.
* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
for %eip-realtive addressing case.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegEip): Define.
(RegEiz): Adjust.
* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
* i386-tbl.h: Re-generate.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/i386-opc.h | 3 | ||||
| -rw-r--r-- | opcodes/i386-reg.tbl | 7 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 6 |
4 files changed, 18 insertions, 5 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index add8f6a..cada410 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2007-09-26 Jan Beulich <jbeulich@novell.com> + + * i386-opc.h (RegEip): Define. + (RegEiz): Adjust. + * i386-reg.tbl: Add eip. Mark rip and eip with RegRex64. + * i386-tbl.h: Re-generate. + 2007-09-25 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (process_i386_opcodes): Process opcode_length. diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index b052e81..2f6e5b3 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -447,8 +447,9 @@ typedef struct #define RegRex64 0x2 /* Extended 8 bit register. */ unsigned int reg_num; #define RegRip ((unsigned int ) ~0) +#define RegEip (RegRip - 1) /* EIZ and RIZ are fake index registers. */ -#define RegEiz (RegRip - 1) +#define RegEiz (RegEip - 1) #define RegRiz (RegEiz - 1) } reg_entry; diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl index 373aba7..4a86cff 100644 --- a/opcodes/i386-reg.tbl +++ b/opcodes/i386-reg.tbl @@ -187,9 +187,10 @@ xmm12, RegXMM, RegRex, 4 xmm13, RegXMM, RegRex, 5 xmm14, RegXMM, RegRex, 6 xmm15, RegXMM, RegRex, 7 -// No type will make this register rejected for all purposes except -// for addressing. This saves creating one extra type for RIP. -rip, BaseIndex, 0, RegRip +// No type will make these registers rejected for all purposes except +// for addressing. This saves creating one extra type for RIP/EIP. +rip, BaseIndex, RegRex64, RegRip +eip, BaseIndex, RegRex64, RegEip // No type will make these registers rejected for all purposes except // for addressing. eiz, BaseIndex, 0, RegEiz diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 9927bf9..5926fb8 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -13278,7 +13278,11 @@ const reg_entry i386_regtab[] = { "rip", { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - 0, RegRip }, + RegRex64, RegRip }, + { "eip", + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + RegRex64, RegEip }, { "eiz", { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, |