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authorAlan Modra <amodra@gmail.com>2020-09-25 20:52:46 +0930
committerAlan Modra <amodra@gmail.com>2020-09-26 15:28:22 +0930
commit0be2fe677c53c6d363a40ae3612d4490ba377e02 (patch)
treedf15146097019c76042a73b056bee7d82af3b5b4 /opcodes
parent0919fa3c461ab524ee6ed2acf0a5b9f4a5c62de8 (diff)
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ubsan: opcodes/csky-opc.h:929 shift exponent 536870912
opcodes/ * csky-opc.h: Formatting. (GENERAL_REG_BANK): Correct spelling. Update use throughout file. (get_register_name): Mask arch with CSKY_ARCH_MASK for shift, and shift 1u. (get_register_number): Likewise. * csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag. gas/ * config/tc-csky.c (parse_type_ctrlreg): Don't mask mach_flag for csky_get_control_regno. (csky_get_reg_val): Likewise when calling csky_get_general_regno.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog28
-rw-r--r--opcodes/csky-dis.c4
-rw-r--r--opcodes/csky-opc.h30
3 files changed, 34 insertions, 28 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 957c694..307194d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,7 +1,16 @@
+2020-09-26 Alan Modra <amodra@gmail.com>
+
+ * csky-opc.h: Formatting.
+ (GENERAL_REG_BANK): Correct spelling. Update use throughout file.
+ (get_register_name): Mask arch with CSKY_ARCH_MASK for shift,
+ and shift 1u.
+ (get_register_number): Likewise.
+ * csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag.
+
2020-09-24 Lili Cui <lili.cui@intel.com>
PR 26654
- *i386-dis.c (enum): Put MOD_VEX_0F38* together.
+ * i386-dis.c (enum): Put MOD_VEX_0F38* together.
2020-09-24 Andrew Burgess <andrew.burgess@embecosm.com>
@@ -28,7 +37,6 @@
2020-09-17 Cooper Qu <<cooper.qu@linux.alibaba.com>>
- opcodes/
* csky-dis.c (using_abi): New.
(parse_csky_dis_options): New function.
(get_gr_name): New function.
@@ -36,7 +44,7 @@
(csky_output_operand): Use get_gr_name and get_cr_name to
disassemble and add handle of OPRND_TYPE_IMM5b_LS.
(print_insn_csky): Parse disassembler options.
- * opcodes/csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
+ * csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
(GENARAL_REG_BANK): Define.
(REG_SUPPORT_ALL): Define.
(REG_SUPPORT_ALL): New.
@@ -872,7 +880,7 @@
EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
- respectively.
+ respectively.
(dis386_twobyte, three_byte_table, vex_table, vex_len_table,
vex_w_table, mod_table): Replace / remove respective entries.
(print_insn): Move up dp->prefix_requirement handling. Handle
@@ -2696,7 +2704,7 @@
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25376
- * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
+ * arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
(neon_opcodes): Likewise.
(select_arm_features): Make sure we enable MVE bits when selecting
armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
@@ -2750,13 +2758,13 @@
* i386-dis.c (print_insn): Initialize the insn info fields, and
detect jumps.
-2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
+2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
* arc-opc.c (C_NE): Make it required.
-2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
+2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
- * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
+ * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
reserved register name.
2020-01-13 Alan Modra <amodra@gmail.com>
@@ -2893,13 +2901,13 @@
* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
uzip{1,2}.
- * opcodes/aarch64-dis-2.c: Re-generate.
+ * aarch64-dis-2.c: Re-generate.
2020-01-03 Jan Beulich <jbeulich@suse.com>
* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
FMMLA encoding.
- * opcodes/aarch64-dis-2.c: Re-generate.
+ * aarch64-dis-2.c: Re-generate.
2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
diff --git a/opcodes/csky-dis.c b/opcodes/csky-dis.c
index ce20f58..b31b685 100644
--- a/opcodes/csky-dis.c
+++ b/opcodes/csky-dis.c
@@ -287,14 +287,14 @@ parse_csky_dis_options (const char *opts_in)
static const char *
get_gr_name (int regno)
{
- return csky_get_general_reg_name (mach_flag & CSKY_ABI_MASK, regno, using_abi);
+ return csky_get_general_reg_name (mach_flag, regno, using_abi);
}
/* Get control register name. */
static const char *
get_cr_name (unsigned int regno, int bank)
{
- return csky_get_control_reg_name (mach_flag & CSKY_ABI_MASK, bank, regno, using_abi);
+ return csky_get_control_reg_name (mach_flag, bank, regno, using_abi);
}
static int
diff --git a/opcodes/csky-opc.h b/opcodes/csky-opc.h
index 8cd0d1e..199b891 100644
--- a/opcodes/csky-opc.h
+++ b/opcodes/csky-opc.h
@@ -653,7 +653,7 @@ const struct psrbit cskyv2_psr_bits[] =
{0, 0, NULL},
};
-#define GENARAL_REG_BANK 0x80000000
+#define GENERAL_REG_BANK 0x80000000
#define REG_SUPPORT_ALL 0xffffffff
/* CSKY register description. */
@@ -698,7 +698,7 @@ struct csky_reg_def
static struct csky_reg_def csky_abiv1_general_regs[] =
{
#define DECLARE_REG(regno, abi_name, support) \
- {GENARAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
+ {GENERAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
DECLARE_REG (0, "sp", REG_SUPPORT_ALL),
DECLARE_REG (1, NULL, REG_SUPPORT_ALL),
@@ -769,7 +769,7 @@ static struct csky_reg_def csky_abiv2_general_regs[] =
#undef DECLARE_REG
#endif
#define DECLARE_REG(regno, abi_name, support) \
- {GENARAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
+ {GENERAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
DECLARE_REG (0, "a0", REG_SUPPORT_ALL),
DECLARE_REG (1, "a1", REG_SUPPORT_ALL),
@@ -926,7 +926,7 @@ get_register_name (struct csky_reg_def *reg_table,
{
if (reg_table[i].bank == bank
&& reg_table[i].regno == regno
- && (reg_table[i].arch_flag & (1 << arch)))
+ && (reg_table[i].arch_flag & (1u << (arch & CSKY_ARCH_MASK))))
{
if (is_abi && reg_table[i].abi_name)
return reg_table[i].abi_name;
@@ -957,7 +957,7 @@ get_register_number (struct csky_reg_def *reg_table,
len = strlen (reg_table[i].name);
if ((strncasecmp (reg_table[i].name, s, len) == 0)
&& !(ISDIGIT (s[len]))
- && (reg_table[i].arch_flag & (1 << arch)))
+ && (reg_table[i].arch_flag & (1u << (arch & CSKY_ARCH_MASK))))
{
*end = s + len;
*bank = reg_table[i].bank;
@@ -973,7 +973,7 @@ get_register_number (struct csky_reg_def *reg_table,
len = strlen (reg_table[i].abi_name);
if ((strncasecmp (reg_table[i].abi_name, s, len) == 0)
&& !(ISALNUM (s[len]))
- && (reg_table[i].arch_flag & (1 << arch)))
+ && (reg_table[i].arch_flag & (1u << (arch & CSKY_ARCH_MASK))))
{
*end = s + len;
*bank = reg_table[i].bank;
@@ -990,23 +990,22 @@ csky_get_general_reg_name (int arch, int regno, int is_abi)
{
struct csky_reg_def *reg_table;
- if (IS_CSKY_ARCH_V1(arch))
+ if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_general_regs;
else
reg_table = csky_abiv2_general_regs;
- return get_register_name (reg_table, arch,
- GENARAL_REG_BANK, regno, is_abi);
+ return get_register_name (reg_table, arch, GENERAL_REG_BANK, regno, is_abi);
}
/* Return general register's number. */
static inline int
-csky_get_general_regno(int arch, char *s, char **end)
+csky_get_general_regno (int arch, char *s, char **end)
{
struct csky_reg_def *reg_table;
int bank = 0;
- if (IS_CSKY_ARCH_V1(arch))
+ if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_general_regs;
else
reg_table = csky_abiv2_general_regs;
@@ -1020,22 +1019,21 @@ csky_get_control_reg_name (int arch, int bank, int regno, int is_abi)
{
struct csky_reg_def *reg_table;
- if (IS_CSKY_ARCH_V1(arch))
+ if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_control_regs;
else
reg_table = csky_abiv2_control_regs;
- return get_register_name (reg_table, arch, bank,
- regno, is_abi);
+ return get_register_name (reg_table, arch, bank, regno, is_abi);
}
/* Return control register's number. */
static inline int
-csky_get_control_regno(int arch, char *s, char **end, int *bank)
+csky_get_control_regno (int arch, char *s, char **end, int *bank)
{
struct csky_reg_def *reg_table;
- if (IS_CSKY_ARCH_V1(arch))
+ if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_control_regs;
else
reg_table = csky_abiv2_control_regs;