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authorRichard Sandiford <rdsandiford@googlemail.com>2011-06-29 20:42:48 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2011-06-29 20:42:48 +0000
commitceb94aa50d68ec7393fac7e2b239aff8ec656f85 (patch)
treea7a6d2fba69b070303f5ee57ab319e87c4ff174d /opcodes
parent4c26037942d435934e3523a6979bff47cae4ef81 (diff)
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* config/tc-mips.c (find_altered_mips16_opcode): New function. (append_insn): Use it. opcodes/ * mips16-opc.c (jalrc, jrc): Move earlier in file.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/mips16-opc.c11
2 files changed, 11 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 158d456..6cc01c7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * mips16-opc.c (jalrc, jrc): Move earlier in file.
+
2011-06-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and
diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c
index c42ab27..0e50aec 100644
--- a/opcodes/mips16-opc.c
+++ b/opcodes/mips16-opc.c
@@ -171,6 +171,13 @@ const struct mips_opcode mips16_opcodes[] =
{"jr", "R", 0xe820, 0xffff, UBD|RD_31, 0, I1 },
{"j", "x", 0xe800, 0xf8ff, UBD|RD_x, 0, I1 },
{"j", "R", 0xe820, 0xffff, UBD|RD_31, 0, I1 },
+/* MIPS16e compact branches. We keep them near the ordinary branches
+ so that we easily find them when converting a normal branch to a
+ compact one. */
+{"jalrc", "x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|TRAP, 0, I32 },
+{"jalrc", "R,x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|TRAP, 0, I32 },
+{"jrc", "x", 0xe880, 0xf8ff, UBR|RD_x|TRAP, 0, I32 },
+{"jrc", "R", 0xe8a0, 0xffff, UBR|RD_31|TRAP, 0, I32 },
{"lb", "y,5(x)", 0x8000, 0xf800, WR_y|RD_x, 0, I1 },
{"lbu", "y,5(x)", 0xa000, 0xf800, WR_y|RD_x, 0, I1 },
{"ld", "y,D(x)", 0x3800, 0xf800, WR_y|RD_x, 0, I3 },
@@ -227,10 +234,6 @@ const struct mips_opcode mips16_opcodes[] =
{"sw", "R,V(S)", 0x6200, 0xff00, RD_31|RD_SP, 0, I1 },
{"xor", "x,y", 0xe80e, 0xf81f, WR_x|RD_x|RD_y, 0, I1 },
/* MIPS16e additions */
-{"jalrc", "x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|TRAP, 0, I32 },
-{"jalrc", "R,x", 0xe8c0, 0xf8ff, UBR|WR_31|RD_x|TRAP, 0, I32 },
-{"jrc", "x", 0xe880, 0xf8ff, UBR|RD_x|TRAP, 0, I32 },
-{"jrc", "R", 0xe8a0, 0xffff, UBR|RD_31|TRAP, 0, I32 },
{"restore", "M", 0x6400, 0xff80, WR_31|RD_SP|WR_SP|TRAP, 0, I32 },
{"save", "m", 0x6480, 0xff80, RD_31|RD_SP|WR_SP|TRAP, 0, I32 },
{"sdbbp", "6", 0xe801, 0xf81f, TRAP, 0, I32 },